cpu/intr_control.cc
cpu/profile.cc
- dev/alpha_console.cc
- dev/baddev.cc
- dev/disk_image.cc
- dev/etherbus.cc
- dev/etherdump.cc
- dev/etherint.cc
- dev/etherlink.cc
- dev/etherpkt.cc
- dev/ethertap.cc
- dev/ide_ctrl.cc
- dev/ide_disk.cc
- dev/io_device.cc
- dev/isa_fake.cc
- dev/ns_gige.cc
- dev/pciconfigall.cc
- dev/pcidev.cc
- dev/pcifake.cc
- dev/pktfifo.cc
- dev/platform.cc
- dev/simconsole.cc
- dev/simple_disk.cc
- dev/tsunami.cc
- dev/tsunami_cchip.cc
- dev/tsunami_io.cc
- dev/tsunami_fake.cc
- dev/tsunami_pchip.cc
-
dev/uart.cc
dev/uart8250.cc
#dev/sinic.cc
#dev/i8254xGBe.cc
-
if env['TARGET_ISA'] == 'alpha':
full_system_sources += Split('''
kern/tru64/dump_mbuf.cc
# Add a flag defining what THE_ISA should be for all compilation
env.Append(CPPDEFINES=[('THE_ISA','%s_ISA' % env['TARGET_ISA'].upper())])
-arch_sources = SConscript('arch/SConscript', exports = 'env')
+arch_sources = SConscript(os.path.join('arch', 'SConscript'), exports = 'env')
+
+cpu_sources = SConscript(os.path.join('cpu', 'SConscript'), exports = 'env')
-cpu_sources = SConscript('cpu/SConscript', exports = 'env')
+dev_sources = SConscript(os.path.join('dev', 'SConscript'), exports = 'env')
+full_system_sources += dev_sources
# This is outside of cpu/SConscript since the source directory isn't
# underneath 'cpu'.
--- /dev/null
+/*
+ * Copyright (c) 1992, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * This software was developed by the Computer Systems Engineering group
+ * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
+ * contributed to Berkeley.
+ *
+ * All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Lawrence Berkeley Laboratories.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#)remote-sl.h 8.1 (Berkeley) 6/11/93
+ */
+
+/* $NetBSD: kgdb.h,v 1.4 1998/08/13 02:10:59 eeh Exp $ */
+
+#ifndef __KGDB_H__
+#define __KGDB_H__
+
+/*
+ * Message types.
+ */
+#define KGDB_SIGNAL '?' // last sigal
+#define KGDB_SET_BAUD 'b' // set baud (deprecated)
+#define KGDB_SET_BREAK 'B' // set breakpoint (deprecated)
+#define KGDB_CONT 'c' // resume
+#define KGDB_ASYNC_CONT 'C' // continue with signal
+#define KGDB_DEBUG 'd' // toggle debug flags (deprecated)
+#define KGDB_DETACH 'D' // detach remote gdb
+#define KGDB_REG_R 'g' // read general registers
+#define KGDB_REG_W 'G' // write general registers
+#define KGDB_SET_THREAD 'H' // set thread
+#define KGDB_CYCLE_STEP 'i' // step a single cycle
+#define KGDB_SIG_CYCLE_STEP 'I' // signal then single cycle step
+#define KGDB_KILL 'k' // kill program
+#define KGDB_MEM_R 'm' // read memory
+#define KGDB_MEM_W 'M' // write memory
+#define KGDB_READ_REG 'p' // read register
+#define KGDB_SET_REG 'P' // write register
+#define KGDB_QUERY_VAR 'q' // query variable
+#define KGDB_SET_VAR 'Q' // set variable
+#define KGDB_RESET 'r' // reset system. (Deprecated)
+#define KGDB_STEP 's' // step
+#define KGDB_ASYNC_STEP 'S' // signal and step
+#define KGDB_THREAD_ALIVE 'T' // find out if the thread is alive.
+#define KGDB_TARGET_EXIT 'W' // target exited
+#define KGDB_BINARY_DLOAD 'X' // write memory
+#define KGDB_CLR_HW_BKPT 'z' // remove breakpoint or watchpoint
+#define KGDB_SET_HW_BKPT 'Z' // insert breakpoint or watchpoint
+
+/*
+ * start of frame/end of frame
+ */
+#define KGDB_START '$'
+#define KGDB_END '#'
+#define KGDB_GOODP '+'
+#define KGDB_BADP '-'
+
+/*
+ * Stuff for KGDB.
+ */
+#define KGDB_NUMREGS 66 /* from tm-alpha.h, NUM_REGS */
+#define KGDB_REG_V0 0
+#define KGDB_REG_T0 1
+#define KGDB_REG_T1 2
+#define KGDB_REG_T2 3
+#define KGDB_REG_T3 4
+#define KGDB_REG_T4 5
+#define KGDB_REG_T5 6
+#define KGDB_REG_T6 7
+#define KGDB_REG_T7 8
+#define KGDB_REG_S0 9
+#define KGDB_REG_S1 10
+#define KGDB_REG_S2 11
+#define KGDB_REG_S3 12
+#define KGDB_REG_S4 13
+#define KGDB_REG_S5 14
+#define KGDB_REG_S6 15 /* FP */
+#define KGDB_REG_A0 16
+#define KGDB_REG_A1 17
+#define KGDB_REG_A2 18
+#define KGDB_REG_A3 19
+#define KGDB_REG_A4 20
+#define KGDB_REG_A5 21
+#define KGDB_REG_T8 22
+#define KGDB_REG_T9 23
+#define KGDB_REG_T10 24
+#define KGDB_REG_T11 25
+#define KGDB_REG_RA 26
+#define KGDB_REG_T12 27
+#define KGDB_REG_AT 28
+#define KGDB_REG_GP 29
+#define KGDB_REG_SP 30
+#define KGDB_REG_ZERO 31
+#define KGDB_REG_F0 32
+#define KGDB_REG_F1 33
+#define KGDB_REG_F2 34
+#define KGDB_REG_F3 35
+#define KGDB_REG_F4 36
+#define KGDB_REG_F5 37
+#define KGDB_REG_F6 38
+#define KGDB_REG_F7 39
+#define KGDB_REG_F8 40
+#define KGDB_REG_F9 41
+#define KGDB_REG_F10 42
+#define KGDB_REG_F11 43
+#define KGDB_REG_F12 44
+#define KGDB_REG_F13 45
+#define KGDB_REG_F14 46
+#define KGDB_REG_F15 47
+#define KGDB_REG_F16 48
+#define KGDB_REG_F17 49
+#define KGDB_REG_F18 50
+#define KGDB_REG_F19 51
+#define KGDB_REG_F20 52
+#define KGDB_REG_F21 53
+#define KGDB_REG_F22 54
+#define KGDB_REG_F23 55
+#define KGDB_REG_F24 56
+#define KGDB_REG_F25 57
+#define KGDB_REG_F26 58
+#define KGDB_REG_F27 59
+#define KGDB_REG_F28 60
+#define KGDB_REG_F29 61
+#define KGDB_REG_F30 62
+#define KGDB_REG_F31 63
+#define KGDB_REG_PC 64
+#define KGDB_REG_VFP 65
+
+/* Too much? Must be large enough for register transfer. */
+#define KGDB_BUFLEN 1024
+
+/*
+ * Kernel Entry Vectors. [OSF/1 PALcode Specific]
+ */
+
+#define ALPHA_KENTRY_INT 0
+#define ALPHA_KENTRY_ARITH 1
+#define ALPHA_KENTRY_MM 2
+#define ALPHA_KENTRY_IF 3
+#define ALPHA_KENTRY_UNA 4
+#define ALPHA_KENTRY_SYS 5
+
+#endif /* __KGDB_H__ */
+++ /dev/null
-/*
- * Copyright (c) 1992, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * This software was developed by the Computer Systems Engineering group
- * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
- * contributed to Berkeley.
- *
- * All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Lawrence Berkeley Laboratories.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)remote-sl.h 8.1 (Berkeley) 6/11/93
- */
-
-/* $NetBSD: kgdb.h,v 1.4 1998/08/13 02:10:59 eeh Exp $ */
-
-#ifndef __KGDB_H__
-#define __KGDB_H__
-
-/*
- * Message types.
- */
-#define KGDB_SIGNAL '?' // last sigal
-#define KGDB_SET_BAUD 'b' // set baud (deprecated)
-#define KGDB_SET_BREAK 'B' // set breakpoint (deprecated)
-#define KGDB_CONT 'c' // resume
-#define KGDB_ASYNC_CONT 'C' // continue with signal
-#define KGDB_DEBUG 'd' // toggle debug flags (deprecated)
-#define KGDB_DETACH 'D' // detach remote gdb
-#define KGDB_REG_R 'g' // read general registers
-#define KGDB_REG_W 'G' // write general registers
-#define KGDB_SET_THREAD 'H' // set thread
-#define KGDB_CYCLE_STEP 'i' // step a single cycle
-#define KGDB_SIG_CYCLE_STEP 'I' // signal then single cycle step
-#define KGDB_KILL 'k' // kill program
-#define KGDB_MEM_R 'm' // read memory
-#define KGDB_MEM_W 'M' // write memory
-#define KGDB_READ_REG 'p' // read register
-#define KGDB_SET_REG 'P' // write register
-#define KGDB_QUERY_VAR 'q' // query variable
-#define KGDB_SET_VAR 'Q' // set variable
-#define KGDB_RESET 'r' // reset system. (Deprecated)
-#define KGDB_STEP 's' // step
-#define KGDB_ASYNC_STEP 'S' // signal and step
-#define KGDB_THREAD_ALIVE 'T' // find out if the thread is alive.
-#define KGDB_TARGET_EXIT 'W' // target exited
-#define KGDB_BINARY_DLOAD 'X' // write memory
-#define KGDB_CLR_HW_BKPT 'z' // remove breakpoint or watchpoint
-#define KGDB_SET_HW_BKPT 'Z' // insert breakpoint or watchpoint
-
-/*
- * start of frame/end of frame
- */
-#define KGDB_START '$'
-#define KGDB_END '#'
-#define KGDB_GOODP '+'
-#define KGDB_BADP '-'
-
-/*
- * Stuff for KGDB.
- */
-#define KGDB_NUMREGS 66 /* from tm-alpha.h, NUM_REGS */
-#define KGDB_REG_V0 0
-#define KGDB_REG_T0 1
-#define KGDB_REG_T1 2
-#define KGDB_REG_T2 3
-#define KGDB_REG_T3 4
-#define KGDB_REG_T4 5
-#define KGDB_REG_T5 6
-#define KGDB_REG_T6 7
-#define KGDB_REG_T7 8
-#define KGDB_REG_S0 9
-#define KGDB_REG_S1 10
-#define KGDB_REG_S2 11
-#define KGDB_REG_S3 12
-#define KGDB_REG_S4 13
-#define KGDB_REG_S5 14
-#define KGDB_REG_S6 15 /* FP */
-#define KGDB_REG_A0 16
-#define KGDB_REG_A1 17
-#define KGDB_REG_A2 18
-#define KGDB_REG_A3 19
-#define KGDB_REG_A4 20
-#define KGDB_REG_A5 21
-#define KGDB_REG_T8 22
-#define KGDB_REG_T9 23
-#define KGDB_REG_T10 24
-#define KGDB_REG_T11 25
-#define KGDB_REG_RA 26
-#define KGDB_REG_T12 27
-#define KGDB_REG_AT 28
-#define KGDB_REG_GP 29
-#define KGDB_REG_SP 30
-#define KGDB_REG_ZERO 31
-#define KGDB_REG_F0 32
-#define KGDB_REG_F1 33
-#define KGDB_REG_F2 34
-#define KGDB_REG_F3 35
-#define KGDB_REG_F4 36
-#define KGDB_REG_F5 37
-#define KGDB_REG_F6 38
-#define KGDB_REG_F7 39
-#define KGDB_REG_F8 40
-#define KGDB_REG_F9 41
-#define KGDB_REG_F10 42
-#define KGDB_REG_F11 43
-#define KGDB_REG_F12 44
-#define KGDB_REG_F13 45
-#define KGDB_REG_F14 46
-#define KGDB_REG_F15 47
-#define KGDB_REG_F16 48
-#define KGDB_REG_F17 49
-#define KGDB_REG_F18 50
-#define KGDB_REG_F19 51
-#define KGDB_REG_F20 52
-#define KGDB_REG_F21 53
-#define KGDB_REG_F22 54
-#define KGDB_REG_F23 55
-#define KGDB_REG_F24 56
-#define KGDB_REG_F25 57
-#define KGDB_REG_F26 58
-#define KGDB_REG_F27 59
-#define KGDB_REG_F28 60
-#define KGDB_REG_F29 61
-#define KGDB_REG_F30 62
-#define KGDB_REG_F31 63
-#define KGDB_REG_PC 64
-#define KGDB_REG_VFP 65
-
-/* Too much? Must be large enough for register transfer. */
-#define KGDB_BUFLEN 1024
-
-/*
- * Kernel Entry Vectors. [OSF/1 PALcode Specific]
- */
-
-#define ALPHA_KENTRY_INT 0
-#define ALPHA_KENTRY_ARITH 1
-#define ALPHA_KENTRY_MM 2
-#define ALPHA_KENTRY_IF 3
-#define ALPHA_KENTRY_UNA 4
-#define ALPHA_KENTRY_SYS 5
-
-#endif /* __KGDB_H__ */
--- /dev/null
+# -*- mode:python -*-
+
+# Copyright (c) 2006 The Regents of The University of Michigan
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Steve Reinhardt
+# Gabe Black
+
+import os.path, sys
+
+# Import build environment variable from SConstruct.
+Import('env')
+
+# Right now there are no source files immediately in this directory
+sources = []
+
+#
+# Now include other ISA-specific sources from the ISA subdirectories.
+#
+
+isa = env['TARGET_ISA'] # someday this may be a list of ISAs
+
+#
+# These source files can be used by any architecture
+#
+
+sources += Split('''
+ baddev.cc
+ disk_image.cc
+ etherbus.cc
+ etherdump.cc
+ etherint.cc
+ etherlink.cc
+ etherpkt.cc
+ ethertap.cc
+ ide_ctrl.cc
+ ide_disk.cc
+ io_device.cc
+ isa_fake.cc
+ ns_gige.cc
+ pciconfigall.cc
+ pcidev.cc
+ pcifake.cc
+ pktfifo.cc
+ platform.cc
+ simconsole.cc
+ simple_disk.cc
+ tsunami.cc
+ tsunami_cchip.cc
+ tsunami_io.cc
+ tsunami_fake.cc
+ tsunami_pchip.cc
+ ''')
+
+# Let the target architecture define what additional sources it needs
+sources += SConscript(os.path.join(isa, 'SConscript'), exports = 'env')
+
+# Convert file names to SCons File objects. This takes care of the
+# path relative to the top of the directory tree.
+sources = [File(s) for s in sources]
+
+Return('sources')
--- /dev/null
+# -*- mode:python -*-
+
+# Copyright (c) 2006 The Regents of The University of Michigan
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Steve Reinhardt
+# Gabe Black
+
+import os.path, sys
+
+# Import build environment variable from SConstruct.
+Import('env')
+
+sources = Split('''
+ console.cc
+ ''')
+# dev/baddev.cc
+# dev/disk_image.cc
+# dev/etherbus.cc
+# dev/etherdump.cc
+# dev/etherint.cc
+# dev/etherlink.cc
+# dev/etherpkt.cc
+# dev/ethertap.cc
+# dev/ide_ctrl.cc
+# dev/ide_disk.cc
+# dev/io_device.cc
+# dev/isa_fake.cc
+# dev/ns_gige.cc
+# dev/pciconfigall.cc
+# dev/pcidev.cc
+# dev/pcifake.cc
+# dev/pktfifo.cc
+# dev/platform.cc
+# dev/simconsole.cc
+# dev/simple_disk.cc
+# dev/tsunami.cc
+# dev/tsunami_cchip.cc
+# dev/tsunami_io.cc
+# dev/tsunami_fake.cc
+# dev/tsunami_pchip.cc
+
+# Convert file names to SCons File objects. This takes care of the
+# path relative to the top of the directory tree.
+sources = [File(s) for s in sources]
+
+Return('sources')
--- /dev/null
+/*
+ * Copyright (c) 2002-2005 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
+ */
+
+#ifndef __ALPHA_ACCESS_H__
+#define __ALPHA_ACCESS_H__
+
+/** @file
+ * System Console Memory Mapped Register Definition
+ */
+
+#define ALPHA_ACCESS_VERSION (1305)
+
+#ifdef CONSOLE
+typedef unsigned uint32_t;
+typedef unsigned long uint64_t;
+#endif
+
+// This structure hacked up from simos
+struct AlphaAccess
+{
+ uint32_t last_offset; // 00: must be first field
+ uint32_t version; // 04:
+ uint32_t numCPUs; // 08:
+ uint32_t intrClockFrequency; // 0C: Hz
+ uint64_t cpuClock; // 10: MHz
+ uint64_t mem_size; // 18:
+
+ // Loaded kernel
+ uint64_t kernStart; // 20:
+ uint64_t kernEnd; // 28:
+ uint64_t entryPoint; // 30:
+
+ // console disk stuff
+ uint64_t diskUnit; // 38:
+ uint64_t diskCount; // 40:
+ uint64_t diskPAddr; // 48:
+ uint64_t diskBlock; // 50:
+ uint64_t diskOperation; // 58:
+
+ // console simple output stuff
+ uint64_t outputChar; // 60: Placeholder for output
+ uint64_t inputChar; // 68: Placeholder for input
+
+ // MP boot
+ uint64_t cpuStack[64]; // 70:
+};
+
+#endif // __ALPHA_ACCESS_H__
--- /dev/null
+/*
+ * Copyright (c) 2001-2005 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
+ * Ali Saidi
+ * Steve Reinhardt
+ * Erik Hallnor
+ */
+
+/** @file
+ * Alpha Console Definition
+ */
+
+#include <cstddef>
+#include <string>
+
+#include "arch/alpha/system.hh"
+#include "base/inifile.hh"
+#include "base/str.hh"
+#include "base/trace.hh"
+#include "cpu/base.hh"
+#include "cpu/thread_context.hh"
+#include "dev/alpha/console.hh"
+#include "dev/platform.hh"
+#include "dev/simconsole.hh"
+#include "dev/simple_disk.hh"
+#include "mem/packet.hh"
+#include "mem/packet_access.hh"
+#include "mem/physical.hh"
+#include "sim/builder.hh"
+#include "sim/sim_object.hh"
+
+using namespace std;
+using namespace AlphaISA;
+
+AlphaConsole::AlphaConsole(Params *p)
+ : BasicPioDevice(p), disk(p->disk),
+ console(params()->cons), system(params()->alpha_sys), cpu(params()->cpu)
+{
+
+ pioSize = sizeof(struct AlphaAccess);
+
+ alphaAccess = new Access();
+ alphaAccess->last_offset = pioSize - 1;
+
+ alphaAccess->version = ALPHA_ACCESS_VERSION;
+ alphaAccess->diskUnit = 1;
+
+ alphaAccess->diskCount = 0;
+ alphaAccess->diskPAddr = 0;
+ alphaAccess->diskBlock = 0;
+ alphaAccess->diskOperation = 0;
+ alphaAccess->outputChar = 0;
+ alphaAccess->inputChar = 0;
+ bzero(alphaAccess->cpuStack, sizeof(alphaAccess->cpuStack));
+
+}
+
+void
+AlphaConsole::startup()
+{
+ system->setAlphaAccess(pioAddr);
+ alphaAccess->numCPUs = system->getNumCPUs();
+ alphaAccess->kernStart = system->getKernelStart();
+ alphaAccess->kernEnd = system->getKernelEnd();
+ alphaAccess->entryPoint = system->getKernelEntry();
+ alphaAccess->mem_size = system->physmem->size();
+ alphaAccess->cpuClock = cpu->frequency() / 1000000; // In MHz
+ alphaAccess->intrClockFrequency = params()->platform->intrFrequency();
+}
+
+Tick
+AlphaConsole::read(PacketPtr pkt)
+{
+
+ /** XXX Do we want to push the addr munging to a bus brige or something? So
+ * the device has it's physical address and then the bridge adds on whatever
+ * machine dependent address swizzle is required?
+ */
+
+ assert(pkt->result == Packet::Unknown);
+ assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
+
+ Addr daddr = pkt->getAddr() - pioAddr;
+
+ pkt->allocate();
+
+ switch (pkt->getSize())
+ {
+ case sizeof(uint32_t):
+ switch (daddr)
+ {
+ case offsetof(AlphaAccess, last_offset):
+ pkt->set(alphaAccess->last_offset);
+ break;
+ case offsetof(AlphaAccess, version):
+ pkt->set(alphaAccess->version);
+ break;
+ case offsetof(AlphaAccess, numCPUs):
+ pkt->set(alphaAccess->numCPUs);
+ break;
+ case offsetof(AlphaAccess, intrClockFrequency):
+ pkt->set(alphaAccess->intrClockFrequency);
+ break;
+ default:
+ /* Old console code read in everyting as a 32bit int
+ * we now break that for better error checking.
+ */
+ pkt->result = Packet::BadAddress;
+ }
+ DPRINTF(AlphaConsole, "read: offset=%#x val=%#x\n", daddr,
+ pkt->get<uint32_t>());
+ break;
+ case sizeof(uint64_t):
+ switch (daddr)
+ {
+ case offsetof(AlphaAccess, inputChar):
+ pkt->set(console->console_in());
+ break;
+ case offsetof(AlphaAccess, cpuClock):
+ pkt->set(alphaAccess->cpuClock);
+ break;
+ case offsetof(AlphaAccess, mem_size):
+ pkt->set(alphaAccess->mem_size);
+ break;
+ case offsetof(AlphaAccess, kernStart):
+ pkt->set(alphaAccess->kernStart);
+ break;
+ case offsetof(AlphaAccess, kernEnd):
+ pkt->set(alphaAccess->kernEnd);
+ break;
+ case offsetof(AlphaAccess, entryPoint):
+ pkt->set(alphaAccess->entryPoint);
+ break;
+ case offsetof(AlphaAccess, diskUnit):
+ pkt->set(alphaAccess->diskUnit);
+ break;
+ case offsetof(AlphaAccess, diskCount):
+ pkt->set(alphaAccess->diskCount);
+ break;
+ case offsetof(AlphaAccess, diskPAddr):
+ pkt->set(alphaAccess->diskPAddr);
+ break;
+ case offsetof(AlphaAccess, diskBlock):
+ pkt->set(alphaAccess->diskBlock);
+ break;
+ case offsetof(AlphaAccess, diskOperation):
+ pkt->set(alphaAccess->diskOperation);
+ break;
+ case offsetof(AlphaAccess, outputChar):
+ pkt->set(alphaAccess->outputChar);
+ break;
+ default:
+ int cpunum = (daddr - offsetof(AlphaAccess, cpuStack)) /
+ sizeof(alphaAccess->cpuStack[0]);
+
+ if (cpunum >= 0 && cpunum < 64)
+ pkt->set(alphaAccess->cpuStack[cpunum]);
+ else
+ panic("Unknown 64bit access, %#x\n", daddr);
+ }
+ DPRINTF(AlphaConsole, "read: offset=%#x val=%#x\n", daddr,
+ pkt->get<uint64_t>());
+ break;
+ default:
+ pkt->result = Packet::BadAddress;
+ }
+ if (pkt->result == Packet::Unknown)
+ pkt->result = Packet::Success;
+ return pioDelay;
+}
+
+Tick
+AlphaConsole::write(PacketPtr pkt)
+{
+ assert(pkt->result == Packet::Unknown);
+ assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
+ Addr daddr = pkt->getAddr() - pioAddr;
+
+ uint64_t val = pkt->get<uint64_t>();
+ assert(pkt->getSize() == sizeof(uint64_t));
+
+ switch (daddr) {
+ case offsetof(AlphaAccess, diskUnit):
+ alphaAccess->diskUnit = val;
+ break;
+
+ case offsetof(AlphaAccess, diskCount):
+ alphaAccess->diskCount = val;
+ break;
+
+ case offsetof(AlphaAccess, diskPAddr):
+ alphaAccess->diskPAddr = val;
+ break;
+
+ case offsetof(AlphaAccess, diskBlock):
+ alphaAccess->diskBlock = val;
+ break;
+
+ case offsetof(AlphaAccess, diskOperation):
+ if (val == 0x13)
+ disk->read(alphaAccess->diskPAddr, alphaAccess->diskBlock,
+ alphaAccess->diskCount);
+ else
+ panic("Invalid disk operation!");
+
+ break;
+
+ case offsetof(AlphaAccess, outputChar):
+ console->out((char)(val & 0xff));
+ break;
+
+ default:
+ int cpunum = (daddr - offsetof(AlphaAccess, cpuStack)) /
+ sizeof(alphaAccess->cpuStack[0]);
+ warn("%d: Trying to launch CPU number %d!", curTick, cpunum);
+ assert(val > 0 && "Must not access primary cpu");
+ if (cpunum >= 0 && cpunum < 64)
+ alphaAccess->cpuStack[cpunum] = val;
+ else
+ panic("Unknown 64bit access, %#x\n", daddr);
+ }
+
+ pkt->result = Packet::Success;
+
+ return pioDelay;
+}
+
+void
+AlphaConsole::Access::serialize(ostream &os)
+{
+ SERIALIZE_SCALAR(last_offset);
+ SERIALIZE_SCALAR(version);
+ SERIALIZE_SCALAR(numCPUs);
+ SERIALIZE_SCALAR(mem_size);
+ SERIALIZE_SCALAR(cpuClock);
+ SERIALIZE_SCALAR(intrClockFrequency);
+ SERIALIZE_SCALAR(kernStart);
+ SERIALIZE_SCALAR(kernEnd);
+ SERIALIZE_SCALAR(entryPoint);
+ SERIALIZE_SCALAR(diskUnit);
+ SERIALIZE_SCALAR(diskCount);
+ SERIALIZE_SCALAR(diskPAddr);
+ SERIALIZE_SCALAR(diskBlock);
+ SERIALIZE_SCALAR(diskOperation);
+ SERIALIZE_SCALAR(outputChar);
+ SERIALIZE_SCALAR(inputChar);
+ SERIALIZE_ARRAY(cpuStack,64);
+}
+
+void
+AlphaConsole::Access::unserialize(Checkpoint *cp, const std::string §ion)
+{
+ UNSERIALIZE_SCALAR(last_offset);
+ UNSERIALIZE_SCALAR(version);
+ UNSERIALIZE_SCALAR(numCPUs);
+ UNSERIALIZE_SCALAR(mem_size);
+ UNSERIALIZE_SCALAR(cpuClock);
+ UNSERIALIZE_SCALAR(intrClockFrequency);
+ UNSERIALIZE_SCALAR(kernStart);
+ UNSERIALIZE_SCALAR(kernEnd);
+ UNSERIALIZE_SCALAR(entryPoint);
+ UNSERIALIZE_SCALAR(diskUnit);
+ UNSERIALIZE_SCALAR(diskCount);
+ UNSERIALIZE_SCALAR(diskPAddr);
+ UNSERIALIZE_SCALAR(diskBlock);
+ UNSERIALIZE_SCALAR(diskOperation);
+ UNSERIALIZE_SCALAR(outputChar);
+ UNSERIALIZE_SCALAR(inputChar);
+ UNSERIALIZE_ARRAY(cpuStack, 64);
+}
+
+void
+AlphaConsole::serialize(ostream &os)
+{
+ alphaAccess->serialize(os);
+}
+
+void
+AlphaConsole::unserialize(Checkpoint *cp, const std::string §ion)
+{
+ alphaAccess->unserialize(cp, section);
+}
+
+BEGIN_DECLARE_SIM_OBJECT_PARAMS(AlphaConsole)
+
+ SimObjectParam<SimConsole *> sim_console;
+ SimObjectParam<SimpleDisk *> disk;
+ Param<Addr> pio_addr;
+ SimObjectParam<AlphaSystem *> system;
+ SimObjectParam<BaseCPU *> cpu;
+ SimObjectParam<Platform *> platform;
+ Param<Tick> pio_latency;
+
+END_DECLARE_SIM_OBJECT_PARAMS(AlphaConsole)
+
+BEGIN_INIT_SIM_OBJECT_PARAMS(AlphaConsole)
+
+ INIT_PARAM(sim_console, "The Simulator Console"),
+ INIT_PARAM(disk, "Simple Disk"),
+ INIT_PARAM(pio_addr, "Device Address"),
+ INIT_PARAM(system, "system object"),
+ INIT_PARAM(cpu, "Processor"),
+ INIT_PARAM(platform, "platform"),
+ INIT_PARAM_DFLT(pio_latency, "Programmed IO latency", 1000)
+
+END_INIT_SIM_OBJECT_PARAMS(AlphaConsole)
+
+CREATE_SIM_OBJECT(AlphaConsole)
+{
+ AlphaConsole::Params *p = new AlphaConsole::Params;
+ p->name = getInstanceName();
+ p->platform = platform;
+ p->pio_addr = pio_addr;
+ p->pio_delay = pio_latency;
+ p->cons = sim_console;
+ p->disk = disk;
+ p->alpha_sys = system;
+ p->system = system;
+ p->cpu = cpu;
+ return new AlphaConsole(p);
+}
+
+REGISTER_SIM_OBJECT("AlphaConsole", AlphaConsole)
--- /dev/null
+/*
+ * Copyright (c) 2001-2005 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
+ */
+
+/** @file
+ * System Console Interface
+ */
+
+#ifndef __ALPHA_CONSOLE_HH__
+#define __ALPHA_CONSOLE_HH__
+
+#include "base/range.hh"
+#include "dev/alpha/access.h"
+#include "dev/io_device.hh"
+#include "sim/host.hh"
+#include "sim/sim_object.hh"
+
+class BaseCPU;
+class SimConsole;
+class AlphaSystem;
+class SimpleDisk;
+
+/**
+ * Memory mapped interface to the system console. This device
+ * represents a shared data region between the OS Kernel and the
+ * System Console.
+ *
+ * The system console is a small standalone program that is initially
+ * run when the system boots. It contains the necessary code to
+ * access the boot disk, to read/write from the console, and to pass
+ * boot parameters to the kernel.
+ *
+ * This version of the system console is very different from the one
+ * that would be found in a real system. Many of the functions use
+ * some sort of backdoor to get their job done. For example, reading
+ * from the boot device on a real system would require a minimal
+ * device driver to access the disk controller, but since we have a
+ * simulator here, we are able to bypass the disk controller and
+ * access the disk image directly. There are also some things like
+ * reading the kernel off the disk image into memory that are normally
+ * taken care of by the console that are now taken care of by the
+ * simulator.
+ *
+ * These shortcuts are acceptable since the system console is
+ * primarily used doing boot before the kernel has loaded its device
+ * drivers.
+ */
+class AlphaConsole : public BasicPioDevice
+{
+ protected:
+ struct Access : public AlphaAccess
+ {
+ void serialize(std::ostream &os);
+ void unserialize(Checkpoint *cp, const std::string §ion);
+ };
+
+ union {
+ Access *alphaAccess;
+ uint8_t *consoleData;
+ };
+
+ /** the disk must be accessed from the console */
+ SimpleDisk *disk;
+
+ /** the system console (the terminal) is accessable from the console */
+ SimConsole *console;
+
+ /** a pointer to the system we are running in */
+ AlphaSystem *system;
+
+ /** a pointer to the CPU boot cpu */
+ BaseCPU *cpu;
+
+ public:
+ struct Params : public BasicPioDevice::Params
+ {
+ SimConsole *cons;
+ SimpleDisk *disk;
+ AlphaSystem *alpha_sys;
+ BaseCPU *cpu;
+ };
+ protected:
+ const Params *params() const {return (const Params *)_params; }
+
+ public:
+
+ /** Standard Constructor */
+ AlphaConsole(Params *p);
+
+ virtual void startup();
+
+ /**
+ * memory mapped reads and writes
+ */
+ virtual Tick read(PacketPtr pkt);
+ virtual Tick write(PacketPtr pkt);
+
+ /**
+ * standard serialization routines for checkpointing
+ */
+ virtual void serialize(std::ostream &os);
+ virtual void unserialize(Checkpoint *cp, const std::string §ion);
+};
+
+#endif // __ALPHA_CONSOLE_HH__
+++ /dev/null
-/*
- * Copyright (c) 2002-2005 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Nathan Binkert
- */
-
-#ifndef __ALPHA_ACCESS_H__
-#define __ALPHA_ACCESS_H__
-
-/** @file
- * System Console Memory Mapped Register Definition
- */
-
-#define ALPHA_ACCESS_VERSION (1305)
-
-#ifdef CONSOLE
-typedef unsigned uint32_t;
-typedef unsigned long uint64_t;
-#endif
-
-// This structure hacked up from simos
-struct AlphaAccess
-{
- uint32_t last_offset; // 00: must be first field
- uint32_t version; // 04:
- uint32_t numCPUs; // 08:
- uint32_t intrClockFrequency; // 0C: Hz
- uint64_t cpuClock; // 10: MHz
- uint64_t mem_size; // 18:
-
- // Loaded kernel
- uint64_t kernStart; // 20:
- uint64_t kernEnd; // 28:
- uint64_t entryPoint; // 30:
-
- // console disk stuff
- uint64_t diskUnit; // 38:
- uint64_t diskCount; // 40:
- uint64_t diskPAddr; // 48:
- uint64_t diskBlock; // 50:
- uint64_t diskOperation; // 58:
-
- // console simple output stuff
- uint64_t outputChar; // 60: Placeholder for output
- uint64_t inputChar; // 68: Placeholder for input
-
- // MP boot
- uint64_t cpuStack[64]; // 70:
-};
-
-#endif // __ALPHA_ACCESS_H__
+++ /dev/null
-/*
- * Copyright (c) 2001-2005 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Nathan Binkert
- * Ali Saidi
- * Steve Reinhardt
- * Erik Hallnor
- */
-
-/** @file
- * Alpha Console Definition
- */
-
-#include <cstddef>
-#include <string>
-
-#include "arch/alpha/system.hh"
-#include "base/inifile.hh"
-#include "base/str.hh"
-#include "base/trace.hh"
-#include "cpu/base.hh"
-#include "cpu/thread_context.hh"
-#include "dev/alpha_console.hh"
-#include "dev/platform.hh"
-#include "dev/simconsole.hh"
-#include "dev/simple_disk.hh"
-#include "mem/packet.hh"
-#include "mem/packet_access.hh"
-#include "mem/physical.hh"
-#include "sim/builder.hh"
-#include "sim/sim_object.hh"
-
-using namespace std;
-using namespace AlphaISA;
-
-AlphaConsole::AlphaConsole(Params *p)
- : BasicPioDevice(p), disk(p->disk),
- console(params()->cons), system(params()->alpha_sys), cpu(params()->cpu)
-{
-
- pioSize = sizeof(struct AlphaAccess);
-
- alphaAccess = new Access();
- alphaAccess->last_offset = pioSize - 1;
-
- alphaAccess->version = ALPHA_ACCESS_VERSION;
- alphaAccess->diskUnit = 1;
-
- alphaAccess->diskCount = 0;
- alphaAccess->diskPAddr = 0;
- alphaAccess->diskBlock = 0;
- alphaAccess->diskOperation = 0;
- alphaAccess->outputChar = 0;
- alphaAccess->inputChar = 0;
- bzero(alphaAccess->cpuStack, sizeof(alphaAccess->cpuStack));
-
-}
-
-void
-AlphaConsole::startup()
-{
- system->setAlphaAccess(pioAddr);
- alphaAccess->numCPUs = system->getNumCPUs();
- alphaAccess->kernStart = system->getKernelStart();
- alphaAccess->kernEnd = system->getKernelEnd();
- alphaAccess->entryPoint = system->getKernelEntry();
- alphaAccess->mem_size = system->physmem->size();
- alphaAccess->cpuClock = cpu->frequency() / 1000000; // In MHz
- alphaAccess->intrClockFrequency = params()->platform->intrFrequency();
-}
-
-Tick
-AlphaConsole::read(PacketPtr pkt)
-{
-
- /** XXX Do we want to push the addr munging to a bus brige or something? So
- * the device has it's physical address and then the bridge adds on whatever
- * machine dependent address swizzle is required?
- */
-
- assert(pkt->result == Packet::Unknown);
- assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
-
- Addr daddr = pkt->getAddr() - pioAddr;
-
- pkt->allocate();
-
- switch (pkt->getSize())
- {
- case sizeof(uint32_t):
- switch (daddr)
- {
- case offsetof(AlphaAccess, last_offset):
- pkt->set(alphaAccess->last_offset);
- break;
- case offsetof(AlphaAccess, version):
- pkt->set(alphaAccess->version);
- break;
- case offsetof(AlphaAccess, numCPUs):
- pkt->set(alphaAccess->numCPUs);
- break;
- case offsetof(AlphaAccess, intrClockFrequency):
- pkt->set(alphaAccess->intrClockFrequency);
- break;
- default:
- /* Old console code read in everyting as a 32bit int
- * we now break that for better error checking.
- */
- pkt->result = Packet::BadAddress;
- }
- DPRINTF(AlphaConsole, "read: offset=%#x val=%#x\n", daddr,
- pkt->get<uint32_t>());
- break;
- case sizeof(uint64_t):
- switch (daddr)
- {
- case offsetof(AlphaAccess, inputChar):
- pkt->set(console->console_in());
- break;
- case offsetof(AlphaAccess, cpuClock):
- pkt->set(alphaAccess->cpuClock);
- break;
- case offsetof(AlphaAccess, mem_size):
- pkt->set(alphaAccess->mem_size);
- break;
- case offsetof(AlphaAccess, kernStart):
- pkt->set(alphaAccess->kernStart);
- break;
- case offsetof(AlphaAccess, kernEnd):
- pkt->set(alphaAccess->kernEnd);
- break;
- case offsetof(AlphaAccess, entryPoint):
- pkt->set(alphaAccess->entryPoint);
- break;
- case offsetof(AlphaAccess, diskUnit):
- pkt->set(alphaAccess->diskUnit);
- break;
- case offsetof(AlphaAccess, diskCount):
- pkt->set(alphaAccess->diskCount);
- break;
- case offsetof(AlphaAccess, diskPAddr):
- pkt->set(alphaAccess->diskPAddr);
- break;
- case offsetof(AlphaAccess, diskBlock):
- pkt->set(alphaAccess->diskBlock);
- break;
- case offsetof(AlphaAccess, diskOperation):
- pkt->set(alphaAccess->diskOperation);
- break;
- case offsetof(AlphaAccess, outputChar):
- pkt->set(alphaAccess->outputChar);
- break;
- default:
- int cpunum = (daddr - offsetof(AlphaAccess, cpuStack)) /
- sizeof(alphaAccess->cpuStack[0]);
-
- if (cpunum >= 0 && cpunum < 64)
- pkt->set(alphaAccess->cpuStack[cpunum]);
- else
- panic("Unknown 64bit access, %#x\n", daddr);
- }
- DPRINTF(AlphaConsole, "read: offset=%#x val=%#x\n", daddr,
- pkt->get<uint64_t>());
- break;
- default:
- pkt->result = Packet::BadAddress;
- }
- if (pkt->result == Packet::Unknown)
- pkt->result = Packet::Success;
- return pioDelay;
-}
-
-Tick
-AlphaConsole::write(PacketPtr pkt)
-{
- assert(pkt->result == Packet::Unknown);
- assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
- Addr daddr = pkt->getAddr() - pioAddr;
-
- uint64_t val = pkt->get<uint64_t>();
- assert(pkt->getSize() == sizeof(uint64_t));
-
- switch (daddr) {
- case offsetof(AlphaAccess, diskUnit):
- alphaAccess->diskUnit = val;
- break;
-
- case offsetof(AlphaAccess, diskCount):
- alphaAccess->diskCount = val;
- break;
-
- case offsetof(AlphaAccess, diskPAddr):
- alphaAccess->diskPAddr = val;
- break;
-
- case offsetof(AlphaAccess, diskBlock):
- alphaAccess->diskBlock = val;
- break;
-
- case offsetof(AlphaAccess, diskOperation):
- if (val == 0x13)
- disk->read(alphaAccess->diskPAddr, alphaAccess->diskBlock,
- alphaAccess->diskCount);
- else
- panic("Invalid disk operation!");
-
- break;
-
- case offsetof(AlphaAccess, outputChar):
- console->out((char)(val & 0xff));
- break;
-
- default:
- int cpunum = (daddr - offsetof(AlphaAccess, cpuStack)) /
- sizeof(alphaAccess->cpuStack[0]);
- warn("%d: Trying to launch CPU number %d!", curTick, cpunum);
- assert(val > 0 && "Must not access primary cpu");
- if (cpunum >= 0 && cpunum < 64)
- alphaAccess->cpuStack[cpunum] = val;
- else
- panic("Unknown 64bit access, %#x\n", daddr);
- }
-
- pkt->result = Packet::Success;
-
- return pioDelay;
-}
-
-void
-AlphaConsole::Access::serialize(ostream &os)
-{
- SERIALIZE_SCALAR(last_offset);
- SERIALIZE_SCALAR(version);
- SERIALIZE_SCALAR(numCPUs);
- SERIALIZE_SCALAR(mem_size);
- SERIALIZE_SCALAR(cpuClock);
- SERIALIZE_SCALAR(intrClockFrequency);
- SERIALIZE_SCALAR(kernStart);
- SERIALIZE_SCALAR(kernEnd);
- SERIALIZE_SCALAR(entryPoint);
- SERIALIZE_SCALAR(diskUnit);
- SERIALIZE_SCALAR(diskCount);
- SERIALIZE_SCALAR(diskPAddr);
- SERIALIZE_SCALAR(diskBlock);
- SERIALIZE_SCALAR(diskOperation);
- SERIALIZE_SCALAR(outputChar);
- SERIALIZE_SCALAR(inputChar);
- SERIALIZE_ARRAY(cpuStack,64);
-}
-
-void
-AlphaConsole::Access::unserialize(Checkpoint *cp, const std::string §ion)
-{
- UNSERIALIZE_SCALAR(last_offset);
- UNSERIALIZE_SCALAR(version);
- UNSERIALIZE_SCALAR(numCPUs);
- UNSERIALIZE_SCALAR(mem_size);
- UNSERIALIZE_SCALAR(cpuClock);
- UNSERIALIZE_SCALAR(intrClockFrequency);
- UNSERIALIZE_SCALAR(kernStart);
- UNSERIALIZE_SCALAR(kernEnd);
- UNSERIALIZE_SCALAR(entryPoint);
- UNSERIALIZE_SCALAR(diskUnit);
- UNSERIALIZE_SCALAR(diskCount);
- UNSERIALIZE_SCALAR(diskPAddr);
- UNSERIALIZE_SCALAR(diskBlock);
- UNSERIALIZE_SCALAR(diskOperation);
- UNSERIALIZE_SCALAR(outputChar);
- UNSERIALIZE_SCALAR(inputChar);
- UNSERIALIZE_ARRAY(cpuStack, 64);
-}
-
-void
-AlphaConsole::serialize(ostream &os)
-{
- alphaAccess->serialize(os);
-}
-
-void
-AlphaConsole::unserialize(Checkpoint *cp, const std::string §ion)
-{
- alphaAccess->unserialize(cp, section);
-}
-
-BEGIN_DECLARE_SIM_OBJECT_PARAMS(AlphaConsole)
-
- SimObjectParam<SimConsole *> sim_console;
- SimObjectParam<SimpleDisk *> disk;
- Param<Addr> pio_addr;
- SimObjectParam<AlphaSystem *> system;
- SimObjectParam<BaseCPU *> cpu;
- SimObjectParam<Platform *> platform;
- Param<Tick> pio_latency;
-
-END_DECLARE_SIM_OBJECT_PARAMS(AlphaConsole)
-
-BEGIN_INIT_SIM_OBJECT_PARAMS(AlphaConsole)
-
- INIT_PARAM(sim_console, "The Simulator Console"),
- INIT_PARAM(disk, "Simple Disk"),
- INIT_PARAM(pio_addr, "Device Address"),
- INIT_PARAM(system, "system object"),
- INIT_PARAM(cpu, "Processor"),
- INIT_PARAM(platform, "platform"),
- INIT_PARAM_DFLT(pio_latency, "Programmed IO latency", 1000)
-
-END_INIT_SIM_OBJECT_PARAMS(AlphaConsole)
-
-CREATE_SIM_OBJECT(AlphaConsole)
-{
- AlphaConsole::Params *p = new AlphaConsole::Params;
- p->name = getInstanceName();
- p->platform = platform;
- p->pio_addr = pio_addr;
- p->pio_delay = pio_latency;
- p->cons = sim_console;
- p->disk = disk;
- p->alpha_sys = system;
- p->system = system;
- p->cpu = cpu;
- return new AlphaConsole(p);
-}
-
-REGISTER_SIM_OBJECT("AlphaConsole", AlphaConsole)
+++ /dev/null
-/*
- * Copyright (c) 2001-2005 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Nathan Binkert
- */
-
-/** @file
- * System Console Interface
- */
-
-#ifndef __ALPHA_CONSOLE_HH__
-#define __ALPHA_CONSOLE_HH__
-
-#include "base/range.hh"
-#include "dev/alpha_access.h"
-#include "dev/io_device.hh"
-#include "sim/host.hh"
-#include "sim/sim_object.hh"
-
-class BaseCPU;
-class SimConsole;
-class AlphaSystem;
-class SimpleDisk;
-
-/**
- * Memory mapped interface to the system console. This device
- * represents a shared data region between the OS Kernel and the
- * System Console.
- *
- * The system console is a small standalone program that is initially
- * run when the system boots. It contains the necessary code to
- * access the boot disk, to read/write from the console, and to pass
- * boot parameters to the kernel.
- *
- * This version of the system console is very different from the one
- * that would be found in a real system. Many of the functions use
- * some sort of backdoor to get their job done. For example, reading
- * from the boot device on a real system would require a minimal
- * device driver to access the disk controller, but since we have a
- * simulator here, we are able to bypass the disk controller and
- * access the disk image directly. There are also some things like
- * reading the kernel off the disk image into memory that are normally
- * taken care of by the console that are now taken care of by the
- * simulator.
- *
- * These shortcuts are acceptable since the system console is
- * primarily used doing boot before the kernel has loaded its device
- * drivers.
- */
-class AlphaConsole : public BasicPioDevice
-{
- protected:
- struct Access : public AlphaAccess
- {
- void serialize(std::ostream &os);
- void unserialize(Checkpoint *cp, const std::string §ion);
- };
-
- union {
- Access *alphaAccess;
- uint8_t *consoleData;
- };
-
- /** the disk must be accessed from the console */
- SimpleDisk *disk;
-
- /** the system console (the terminal) is accessable from the console */
- SimConsole *console;
-
- /** a pointer to the system we are running in */
- AlphaSystem *system;
-
- /** a pointer to the CPU boot cpu */
- BaseCPU *cpu;
-
- public:
- struct Params : public BasicPioDevice::Params
- {
- SimConsole *cons;
- SimpleDisk *disk;
- AlphaSystem *alpha_sys;
- BaseCPU *cpu;
- };
- protected:
- const Params *params() const {return (const Params *)_params; }
-
- public:
-
- /** Standard Constructor */
- AlphaConsole(Params *p);
-
- virtual void startup();
-
- /**
- * memory mapped reads and writes
- */
- virtual Tick read(PacketPtr pkt);
- virtual Tick write(PacketPtr pkt);
-
- /**
- * standard serialization routines for checkpointing
- */
- virtual void serialize(std::ostream &os);
- virtual void unserialize(Checkpoint *cp, const std::string §ion);
-};
-
-#endif // __ALPHA_CONSOLE_HH__
--- /dev/null
+# -*- mode:python -*-
+
+# Copyright (c) 2006 The Regents of The University of Michigan
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Steve Reinhardt
+# Gabe Black
+
+import os.path, sys
+
+# Import build environment variable from SConstruct.
+Import('env')
+
+sources = []
+
+sources += Split('''
+ ''')
+
+# Convert file names to SCons File objects. This takes care of the
+# path relative to the top of the directory tree.
+sources = [File(s) for s in sources]
+
+Return('sources')
projects / gem5.git / commitdiff