Disassembly of section .text:
0+ <_387>:
-[ ]*[0-9a-f]+: d9 ff[ ]+fcos[ ]*
-[ ]*[0-9a-f]+: d9 f5[ ]+fprem1[ ]*
-[ ]*[0-9a-f]+: d9 fe[ ]+fsin[ ]*
-[ ]*[0-9a-f]+: d9 fb[ ]+fsincos[ ]*
+[ ]*[0-9a-f]+: d9 ff[ ]+fcos
+[ ]*[0-9a-f]+: d9 f5[ ]+fprem1
+[ ]*[0-9a-f]+: d9 fe[ ]+fsin
+[ ]*[0-9a-f]+: d9 fb[ ]+fsincos
[ ]*[0-9a-f]+: dd e1[ ]+fucom[ ]+%st\(1\)
[ ]*[0-9a-f]+: dd e9[ ]+fucomp[ ]+%st\(1\)
-[ ]*[0-9a-f]+: da e9[ ]+fucompp[ ]*
+[ ]*[0-9a-f]+: da e9[ ]+fucompp
#pass
[ ]*[a-f0-9]+: 67 66 0f 38 f6 42 24 adcx eax,DWORD PTR \[bp\+si\+0x24\]
[ ]*[a-f0-9]+: 66 0f 38 f6 d1 adcx edx,ecx
[ ]*[a-f0-9]+: 67 66 0f 38 f6 54 f4 adcx edx,DWORD PTR \[si-0xc\]
-[ ]*[a-f0-9]+: f4 hlt *
+[ ]*[a-f0-9]+: f4 hlt
[ ]*[a-f0-9]+: 67 66 0f 38 f6 00 adcx eax,DWORD PTR \[bx\+si\]
[ ]*[a-f0-9]+: 67 f3 0f 38 f6 42 24 adox eax,DWORD PTR \[bp\+si\+0x24\]
[ ]*[a-f0-9]+: f3 0f 38 f6 d1 adox edx,ecx
[ ]*[a-f0-9]+: 67 f3 0f 38 f6 54 f4 adox edx,DWORD PTR \[si-0xc\]
-[ ]*[a-f0-9]+: f4 hlt *
+[ ]*[a-f0-9]+: f4 hlt
[ ]*[a-f0-9]+: 67 f3 0f 38 f6 00 adox eax,DWORD PTR \[bx\+si\]
#pass
[ ]*[a-f0-9]+: 67 66 0f 38 f6 42 24 adcx 0x24\(%bp,%si\),%eax
[ ]*[a-f0-9]+: 66 0f 38 f6 d1 adcx %ecx,%edx
[ ]*[a-f0-9]+: 67 66 0f 38 f6 54 f4 adcx -0xc\(%si\),%edx
-[ ]*[a-f0-9]+: f4 hlt *
+[ ]*[a-f0-9]+: f4 hlt
[ ]*[a-f0-9]+: 67 66 0f 38 f6 00 adcx \(%bx,%si\),%eax
[ ]*[a-f0-9]+: 67 f3 0f 38 f6 42 24 adox 0x24\(%bp,%si\),%eax
[ ]*[a-f0-9]+: f3 0f 38 f6 d1 adox %ecx,%edx
[ ]*[a-f0-9]+: 67 f3 0f 38 f6 54 f4 adox -0xc\(%si\),%edx
-[ ]*[a-f0-9]+: f4 hlt *
+[ ]*[a-f0-9]+: f4 hlt
[ ]*[a-f0-9]+: 67 f3 0f 38 f6 00 adox \(%bx,%si\),%eax
#pass
16: 89 75 f4 mov %esi,-0xc\(%ebp\)
19: 89 75 f4 mov %esi,-0xc\(%ebp\)
1c: 89 75 f4 mov %esi,-0xc\(%ebp\)
- 1f: c3 ret
+ 1f: c3 ret
20: 55 push %ebp
21: 55 push %ebp
22: 64 a3 01 00 00 00 mov %eax,%fs:0x1
17: 89 75 f4 mov %esi,-0xc\(%ebp\)
1a: 89 75 f4 mov %esi,-0xc\(%ebp\)
1d: 89 75 f4 mov %esi,-0xc\(%ebp\)
- 20: c3 ret
+ 20: c3 ret
21: 3e 3e 3e 55 ds ds ds push %ebp
25: 55 push %ebp
26: 64 a3 01 00 00 00 mov %eax,%fs:0x1
+[a-f0-9]+: 8d b4 26 00 00 00 00 lea 0x0\(%esi,%eiz,1\),%esi
+[a-f0-9]+: 8d 74 26 00 lea 0x0\(%esi,%eiz,1\),%esi
+[a-f0-9]+: f2 73 bf bnd jae 0 <_start>
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
#pass
0+ <foo>:
[ ]*[a-f0-9]+: 0f 0d 03 prefetch \(%ebx\)
[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%esi,2\)
-[ ]*[a-f0-9]+: 0f 0e femms
+[ ]*[a-f0-9]+: 0f 0e femms
[ ]*[a-f0-9]+: 0f 0f 00 bf pavgusb \(%eax\),%mm0
[ ]*[a-f0-9]+: 0f 0f 48 02 1d pf2id 0x2\(%eax\),%mm1
[ ]*[a-f0-9]+: 0f 0f 90 00 01 00 00 ae pfacc 0x100\(%eax\),%mm2
[ ]*[a-f0-9]+: 0f 0f c5 aa pfsubr %mm5,%mm0
[ ]*[a-f0-9]+: 0f 0f ce 0d pi2fd %mm6,%mm1
[ ]*[a-f0-9]+: 0f 0f d7 b7 pmulhrw %mm7,%mm2
-[ ]*[a-f0-9]+: 0f 05 syscall
-[ ]*[a-f0-9]+: 0f 07 sysret
-[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
-[ ]*[a-f0-9]+: 2e 0f \(bad\)
+[ ]*[a-f0-9]+: 0f 05 syscall
+[ ]*[a-f0-9]+: 0f 07 sysret
+[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
+[ ]*[a-f0-9]+: 2e 0f \(bad\)
[ ]*[a-f0-9]+: 0f 54 c3 andps %xmm3,%xmm0
[ ]*[a-f0-9]+: 07 pop %es
-[ ]*[a-f0-9]+: c3 ret
+[ ]*[a-f0-9]+: c3 ret
#pass
0+ <.text>:
[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
[ ]*[a-f0-9]+: 0f ae 38 clflush \(%eax\)
-[ ]*[a-f0-9]+: 0f 05 syscall
+[ ]*[a-f0-9]+: 0f 05 syscall
[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32 %ecx,%ebx
-[ ]*[a-f0-9]+: c5 fc 77 vzeroall
-[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
-[ ]*[a-f0-9]+: 0f 37 getsec
-[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
+[ ]*[a-f0-9]+: c5 fc 77 vzeroall
+[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
+[ ]*[a-f0-9]+: 0f 37 getsec
+[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%ecx\)
[ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc \(%ecx\),%xmm0
[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq \$0x8,%xmm1,%xmm0
[ ]*[a-f0-9]+: c4 e2 c9 98 d4 vfmadd132pd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: 0f 38 f0 19 movbe \(%ecx\),%ebx
[ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%ecx\),%ebx
-[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
+[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%esi,2\)
[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1
-[ ]*[a-f0-9]+: 0f 01 da vmload
+[ ]*[a-f0-9]+: 0f 01 da vmload
[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
-[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
+[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%eax\)
[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
Disassembly of section .text:
0+ <.text>:
-[ ]*[a-f0-9]+: 0f 01 ca clac
-[ ]*[a-f0-9]+: 0f 01 cb stac
+[ ]*[a-f0-9]+: 0f 01 ca clac
+[ ]*[a-f0-9]+: 0f 01 cb stac
[ ]*[a-f0-9]+: 66 0f 38 f6 ca adcx %edx,%ecx
[ ]*[a-f0-9]+: f3 0f 38 f6 ca adox %edx,%ecx
[ ]*[a-f0-9]+: 0f c7 f8 rdseed %eax
-[ ]*[a-f0-9]+: 0f 01 fc clzero[ ]*
-[ ]*[a-f0-9]+: 0f 01 fc clzero[ ]*
-[ ]*[a-f0-9]+: 67 0f 01 fc addr16 clzero[ ]*
+[ ]*[a-f0-9]+: 0f 01 fc clzero
+[ ]*[a-f0-9]+: 0f 01 fc clzero
+[ ]*[a-f0-9]+: 67 0f 01 fc addr16 clzero
[ ]*[a-f0-9]+: 0f c7 21 xsavec \(%ecx\)
[ ]*[a-f0-9]+: 0f c7 29 xsaves \(%ecx\)
[ ]*[a-f0-9]+: 66 0f ae 39 clflushopt \(%ecx\)
[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx
[ ]*[a-f0-9]+:[ ]*66 0f ae 31[ ]*clwb \(%ecx\)
[ ]*[a-f0-9]+:[ ]*66 0f ae b4 f4 c0 1d fe ff[ ]*clwb -0x1e240\(%esp,%esi,8\)
-[ ]*[a-f0-9]+:[ ]*f3 0f 01 fa[ ]*mcommit[ ]*
+[ ]*[a-f0-9]+:[ ]*f3 0f 01 fa[ ]*mcommit
[ ]*[a-f0-9]+:[ ]*f3 0f c7 f8[ ]*rdpid %eax
-[ ]*[a-f0-9]+:[ ]*0f 01 fd[ ]*rdpru[ ]*
-[ ]*[a-f0-9]+:[ ]*f3 0f 01 d9[ ]*vmgexit[ ]*
-[ ]*[a-f0-9]+:[ ]*f2 0f 01 d9[ ]*vmgexit[ ]*
-[ ]*[a-f0-9]+:[ ]*f3 0f 09[ ]*wbnoinvd[ ]*
+[ ]*[a-f0-9]+:[ ]*0f 01 fd[ ]*rdpru
+[ ]*[a-f0-9]+:[ ]*f3 0f 01 d9[ ]*vmgexit
+[ ]*[a-f0-9]+:[ ]*f2 0f 01 d9[ ]*vmgexit
+[ ]*[a-f0-9]+:[ ]*f3 0f 09[ ]*wbnoinvd
#pass
Disassembly of section .text:
0+ <.text>:
-[ ]*[0-9a-f]+:[ ]+0f 01 fe[ ]+invlpgb[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 ff[ ]+tlbsync[ ]*
-[ ]*[a-f0-9]+:[ ]*f2 0f 01 ff[ ]+pvalidate[ ]*
-[ ]*[a-f0-9]+:[ ]*0f 01 ee[ ]+rdpkru[ ]*
-[ ]*[a-f0-9]+:[ ]*0f 01 ef[ ]+wrpkru[ ]*
+[ ]*[0-9a-f]+:[ ]+0f 01 fe[ ]+invlpgb
+[ ]*[0-9a-f]+:[ ]+0f 01 ff[ ]+tlbsync
+[ ]*[a-f0-9]+:[ ]*f2 0f 01 ff[ ]+pvalidate
+[ ]*[a-f0-9]+:[ ]*0f 01 ee[ ]+rdpkru
+[ ]*[a-f0-9]+:[ ]*0f 01 ef[ ]+wrpkru
#pass
0+ <.text>:
[ ]*[a-f0-9]+: 0f ff 07 [ ]*ud0 \(%edi\),%eax
[ ]*[a-f0-9]+: 0f b9 07 [ ]*ud1 \(%edi\),%eax
-[ ]*[a-f0-9]+: 0f 0b ud2
-[ ]*[a-f0-9]+: 0f 0b ud2
+[ ]*[a-f0-9]+: 0f 0b ud2
+[ ]*[a-f0-9]+: 0f 0b ud2
[ ]*[a-f0-9]+: 0f b9 07 [ ]*ud1 \(%edi\),%eax
#pass
Disassembly of section .text:
0+ <.text>:
-[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
+[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
#pass
Disassembly of section .text:
0+ <_start>:
-[ ]*[a-f0-9]+: c5 fc 77 vzeroall
-[ ]*[a-f0-9]+: c5 f8 77 vzeroupper
+[ ]*[a-f0-9]+: c5 fc 77 vzeroall
+[ ]*[a-f0-9]+: c5 f8 77 vzeroupper
[ ]*[a-f0-9]+: 67 c5 f8 ae 11 vldmxcsr \(%ecx\)
[ ]*[a-f0-9]+: 67 c5 f8 ae 19 vstmxcsr \(%ecx\)
[ ]*[a-f0-9]+: 67 c4 e2 5d 2d 31 vmaskmovpd \(%ecx\),%ymm4,%ymm6
-#as:
+#as:
#objdump: -dwMintel
#name: i386 AVX GATHER insns (Intel disassembly)
#source: avx-gather.s
-#as:
+#as:
#objdump: -dw
#name: i386 AVX GATHER insns
Disassembly of section .text:
0+ <_start>:
-[ ]*[a-f0-9]+: c5 fc 77 vzeroall
-[ ]*[a-f0-9]+: c5 f8 77 vzeroupper
+[ ]*[a-f0-9]+: c5 fc 77 vzeroall
+[ ]*[a-f0-9]+: c5 f8 77 vzeroupper
[ ]*[a-f0-9]+: c5 f8 ae 11 vldmxcsr DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c5 f8 ae 19 vstmxcsr DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 5d 2d 31 vmaskmovpd ymm6,ymm4,YMMWORD PTR \[ecx\]
+[a-f0-9]+: c4 e1 cc 14 d4 vunpcklps %ymm4,%ymm6,%ymm2
+[a-f0-9]+: c4 e1 cd 57 d4 vxorpd %ymm4,%ymm6,%ymm2
+[a-f0-9]+: c4 e1 cc 57 d4 vxorps %ymm4,%ymm6,%ymm2
- +[a-f0-9]+: c4 e1 fc 77 vzeroall
- +[a-f0-9]+: c4 e1 f8 77 vzeroupper
+ +[a-f0-9]+: c4 e1 fc 77 vzeroall
+ +[a-f0-9]+: c4 e1 f8 77 vzeroupper
#pass
Disassembly of section .text:
0+ <_start>:
-[ ]*[a-f0-9]+: c5 fc 77 vzeroall
-[ ]*[a-f0-9]+: c5 f8 77 vzeroupper
+[ ]*[a-f0-9]+: c5 fc 77 vzeroall
+[ ]*[a-f0-9]+: c5 f8 77 vzeroupper
[ ]*[a-f0-9]+: c5 f8 ae 11 vldmxcsr \(%ecx\)
[ ]*[a-f0-9]+: c5 f8 ae 19 vstmxcsr \(%ecx\)
[ ]*[a-f0-9]+: c4 e2 5d 2d 31 vmaskmovpd \(%ecx\),%ymm4,%ymm6
-#as:
+#as:
#objdump: -dw
#name: i386 AVX512F insns with nondefault values in ignored / reserved bits
[ ]*[a-f0-9]+: 62 f2 7e 48 31 72 7f vpmovdb %zmm6,0x7f0\(%edx\)
[ ]*[a-f0-9]+: 62 f2 7e 58 31 72 7f vpmovdb %zmm6,0x7f0\(%edx\)\{bad\}
[ ]*[a-f0-9]+: 62 f1 7c 88 58 \(bad\)
-[ ]*[a-f0-9]+: c3 ret *
+[ ]*[a-f0-9]+: c3 ret
[ ]*[a-f0-9]+: 62 f2 7d 4f 92 01 vgatherdps \(bad\),%zmm0\{%k7\}
[ ]*[a-f0-9]+: 67 62 f2 7d 4f 92 01 addr16 vgatherdps \(bad\),%zmm0\{%k7\}
[ ]*[a-f0-9]+: 62 f2 7d cf 92 04 08 vgatherdps \(%eax,%zmm1(,1)?\),%zmm0\{%k7\}\{z\}/\(bad\)
-#as:
+#as:
#objdump: -dwMintel
#name: i386 BMI insns (Intel disassembly)
#source: bmi.s
-#as:
+#as:
#objdump: -dw
#name: i386 BMI insns
-#as:
+#as:
#objdump: -dwMintel
#name: i386 BMI2 insns (Intel disassembly)
#source: bmi2.s
-#as:
+#as:
#objdump: -dw
#name: i386 BMI2 insns
0+ <_start>:
+[a-f0-9]+: f3 0f ae e9 incsspd ecx
+[a-f0-9]+: f3 0f 1e c9 rdsspd ecx
- +[a-f0-9]+: f3 0f 01 ea saveprevssp
+ +[a-f0-9]+: f3 0f 01 ea saveprevssp
+[a-f0-9]+: f3 0f 01 29 rstorssp QWORD PTR \[ecx\]
+[a-f0-9]+: 0f 38 f6 04 02 wrssd \[edx\+eax\*1\],eax
+[a-f0-9]+: 66 0f 38 f5 14 2f wrussd \[edi\+ebp\*1\],edx
- +[a-f0-9]+: f3 0f 01 e8 setssbsy
+ +[a-f0-9]+: f3 0f 01 e8 setssbsy
+[a-f0-9]+: f3 0f ae 34 04 clrssbsy QWORD PTR \[esp\+eax\*1\]
- +[a-f0-9]+: f3 0f 1e fa endbr64
- +[a-f0-9]+: f3 0f 1e fb endbr32
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fb endbr32
+[a-f0-9]+: f3 0f ae e9 incsspd ecx
+[a-f0-9]+: f3 0f 1e c9 rdsspd ecx
- +[a-f0-9]+: f3 0f 01 ea saveprevssp
+ +[a-f0-9]+: f3 0f 01 ea saveprevssp
+[a-f0-9]+: f3 0f 01 6c 01 90 rstorssp QWORD PTR \[ecx\+eax\*1-0x70\]
+[a-f0-9]+: 0f 38 f6 02 wrssd \[edx\],eax
+[a-f0-9]+: 0f 38 f6 10 wrssd \[eax\],edx
+[a-f0-9]+: 66 0f 38 f5 14 2f wrussd \[edi\+ebp\*1\],edx
+[a-f0-9]+: 66 0f 38 f5 3c 0e wrussd \[esi\+ecx\*1\],edi
- +[a-f0-9]+: f3 0f 01 e8 setssbsy
+ +[a-f0-9]+: f3 0f 01 e8 setssbsy
+[a-f0-9]+: f3 0f ae 34 44 clrssbsy QWORD PTR \[esp\+eax\*2\]
- +[a-f0-9]+: f3 0f 1e fa endbr64
- +[a-f0-9]+: f3 0f 1e fb endbr32
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fb endbr32
+[a-f0-9]+: f3 0f ae e9 incsspd ecx
+[a-f0-9]+: f3 0f 1e c9 rdsspd ecx
- +[a-f0-9]+: f3 0f 01 ea saveprevssp *
+ +[a-f0-9]+: f3 0f 01 ea saveprevssp
+[a-f0-9]+: 67 f3 0f 01 6c 01 rstorssp QWORD PTR \[si\+0x1\]
- +[a-f0-9]+: 90 nop *
+ +[a-f0-9]+: 90 nop
+[a-f0-9]+: 67 0f 38 f6 02 wrssd \[bp\+si\],eax
+[a-f0-9]+: 67 0f 38 f6 10 wrssd \[bx\+si\],edx
+[a-f0-9]+: 67 66 0f 38 f5 14 wrussd \[si\],edx
- +[a-f0-9]+: 2f das *
+ +[a-f0-9]+: 2f das
+[a-f0-9]+: 67 66 0f 38 f5 3c wrussd \[si\],edi
+[a-f0-9]+: 0e push cs
- +[a-f0-9]+: f3 0f 01 e8 setssbsy *
+ +[a-f0-9]+: f3 0f 01 e8 setssbsy
+[a-f0-9]+: 67 f3 0f ae 34 clrssbsy QWORD PTR \[si\]
+[a-f0-9]+: 44 inc esp
- +[a-f0-9]+: f3 0f 1e fa endbr64 *
- +[a-f0-9]+: f3 0f 1e fb endbr32 *
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fb endbr32
#pass
0+ <_start>:
+[a-f0-9]+: f3 0f ae e9 incsspd %ecx
+[a-f0-9]+: f3 0f 1e c9 rdsspd %ecx
- +[a-f0-9]+: f3 0f 01 ea saveprevssp
+ +[a-f0-9]+: f3 0f 01 ea saveprevssp
+[a-f0-9]+: f3 0f 01 29 rstorssp \(%ecx\)
+[a-f0-9]+: 0f 38 f6 04 02 wrssd %eax,\(%edx,%eax,1\)
+[a-f0-9]+: 66 0f 38 f5 14 2f wrussd %edx,\(%edi,%ebp,1\)
- +[a-f0-9]+: f3 0f 01 e8 setssbsy
+ +[a-f0-9]+: f3 0f 01 e8 setssbsy
+[a-f0-9]+: f3 0f ae 34 04 clrssbsy \(%esp,%eax,1\)
- +[a-f0-9]+: f3 0f 1e fa endbr64
- +[a-f0-9]+: f3 0f 1e fb endbr32
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fb endbr32
+[a-f0-9]+: f3 0f ae e9 incsspd %ecx
+[a-f0-9]+: f3 0f 1e c9 rdsspd %ecx
- +[a-f0-9]+: f3 0f 01 ea saveprevssp
+ +[a-f0-9]+: f3 0f 01 ea saveprevssp
+[a-f0-9]+: f3 0f 01 6c 01 90 rstorssp -0x70\(%ecx,%eax,1\)
+[a-f0-9]+: 0f 38 f6 02 wrssd %eax,\(%edx\)
+[a-f0-9]+: 0f 38 f6 10 wrssd %edx,\(%eax\)
+[a-f0-9]+: 66 0f 38 f5 14 2f wrussd %edx,\(%edi,%ebp,1\)
+[a-f0-9]+: 66 0f 38 f5 3c 0e wrussd %edi,\(%esi,%ecx,1\)
- +[a-f0-9]+: f3 0f 01 e8 setssbsy
+ +[a-f0-9]+: f3 0f 01 e8 setssbsy
+[a-f0-9]+: f3 0f ae 34 44 clrssbsy \(%esp,%eax,2\)
- +[a-f0-9]+: f3 0f 1e fa endbr64
- +[a-f0-9]+: f3 0f 1e fb endbr32
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fb endbr32
+[a-f0-9]+: f3 0f ae e9 incsspd %ecx
+[a-f0-9]+: f3 0f 1e c9 rdsspd %ecx
- +[a-f0-9]+: f3 0f 01 ea saveprevssp *
+ +[a-f0-9]+: f3 0f 01 ea saveprevssp
+[a-f0-9]+: 67 f3 0f 01 6c 01 rstorssp 0x1\(%si\)
- +[a-f0-9]+: 90 nop *
+ +[a-f0-9]+: 90 nop
+[a-f0-9]+: 67 0f 38 f6 02 wrssd %eax,\(%bp,%si\)
+[a-f0-9]+: 67 0f 38 f6 10 wrssd %edx,\(%bx,%si\)
+[a-f0-9]+: 67 66 0f 38 f5 14 wrussd %edx,\(%si\)
- +[a-f0-9]+: 2f das *
+ +[a-f0-9]+: 2f das
+[a-f0-9]+: 67 66 0f 38 f5 3c wrussd %edi,\(%si\)
+[a-f0-9]+: 0e push %cs
- +[a-f0-9]+: f3 0f 01 e8 setssbsy *
+ +[a-f0-9]+: f3 0f 01 e8 setssbsy
+[a-f0-9]+: 67 f3 0f ae 34 clrssbsy \(%si\)
+[a-f0-9]+: 44 inc %esp
- +[a-f0-9]+: f3 0f 1e fa endbr64 *
- +[a-f0-9]+: f3 0f 1e fb endbr32 *
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fb endbr32
#pass
Disassembly of section \.text:
00000000 <_start>:
-[ ]*[a-f0-9]+: 0f 01 fc clzero
+[ ]*[a-f0-9]+: 0f 01 fc clzero
#pass
Disassembly of section \.text:
0+ <\.text>:
-[ ]*[a-f0-9]+:[ ]*ff[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*ff[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*ef[ ]*out %eax,\(%dx\)
-[ ]*[a-f0-9]+:[ ]*ff[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*ff[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*d8 90 90 90 90 90[ ]*fcoms -0x6f6f6f70\(%eax\)
-[ ]*[a-f0-9]+:[ ]*c5 ec 4a[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ec 4a[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 ec 4a[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ec 4a[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 ec 4a[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 ed 4a[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ec 4a[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c5 ed 4a[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 ed 4a[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ed 4a[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 ed 4a[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 4a[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ed 4a[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 4a[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 4a[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 4a[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 4a[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 4a[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 4a[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 4a[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 4a[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 4a[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 4a[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 ec 41[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 4a[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c5 ec 41[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 ec 41[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ec 41[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 ec 41[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 ed 41[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ec 41[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c5 ed 41[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 ed 41[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ed 41[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 ed 41[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 41[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ed 41[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 41[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 41[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 41[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 41[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 41[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 41[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 41[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 41[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 41[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 41[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 ec 42[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 41[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c5 ec 42[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 ec 42[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ec 42[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 ec 42[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 ed 42[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ec 42[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c5 ed 42[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 ed 42[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ed 42[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 ed 42[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 42[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ed 42[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 42[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 42[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 42[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 42[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 42[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 42[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 42[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 42[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 42[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 42[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 ec 4b[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 42[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c5 ec 4b[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 ec 4b[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ec 4b[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 ec 4b[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 ed 4b[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ec 4b[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c5 ed 4b[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 ed 4b[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ed 4b[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 ed 4b[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 4b[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ed 4b[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 4b[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 4b[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 4b[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 4b[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 f8 44[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 4b[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c5 f8 44[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 f8 44[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f8 44[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 f8 44[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 f9 44[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f8 44[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c5 f9 44[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 f9 44[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f9 44[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 f9 44[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 f8 44[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f9 44[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c4 e1 f8 44[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 f8 44[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 f8 44[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 f8 44[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 f9 44[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 f8 44[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c4 e1 f9 44[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 f9 44[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 f9 44[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 f9 44[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 ec 45[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 f9 44[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c5 ec 45[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 ec 45[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ec 45[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 ec 45[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 ed 45[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ec 45[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c5 ed 45[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 ed 45[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ed 45[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 ed 45[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 45[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ed 45[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 45[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 45[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 45[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 45[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 45[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 45[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 45[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 45[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 45[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 45[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 f8 98[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 45[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c5 f8 98[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 f8 98[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f8 98[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 f8 98[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 f9 98[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f8 98[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c5 f9 98[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 f9 98[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f9 98[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 f9 98[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 f8 98[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f9 98[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c4 e1 f8 98[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 f8 98[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 f8 98[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 f8 98[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 f9 98[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 f8 98[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c4 e1 f9 98[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 f9 98[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 f9 98[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 f9 98[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 ec 46[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 f9 98[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c5 ec 46[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 ec 46[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ec 46[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 ec 46[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 ed 46[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ec 46[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c5 ed 46[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 ed 46[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ed 46[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 ed 46[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 46[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ed 46[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 46[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 46[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 46[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 46[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 46[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 46[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 46[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 46[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 46[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 46[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 ec 47[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 46[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c5 ec 47[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 ec 47[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ec 47[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 ec 47[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 ed 47[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ec 47[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c5 ed 47[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 ed 47[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ed 47[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 ed 47[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 47[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ed 47[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 47[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 47[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 47[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 47[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 47[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 47[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 47[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 47[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 47[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 47[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 f8 99[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 47[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c5 f8 99[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 f8 99[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f8 99[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 f8 99[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 f9 99[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f8 99[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c5 f9 99[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 f9 99[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f9 99[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 f9 99[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 f8 99[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f9 99[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c4 e1 f8 99[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 f8 99[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 f8 99[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 f8 99[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 f9 99[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 f8 99[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c4 e1 f9 99[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 f9 99[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 f9 99[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 f9 99[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e3 f9 30[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 f9 99[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c4 e3 f9 30[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop \(%ecx\)
-[ ]*[a-f0-9]+:[ ]*c4 e3 f9 30[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 f9 30[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push \$0x1
-[ ]*[a-f0-9]+:[ ]*c4 e3 f9 30[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 f9 30[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*04 01[ ]*add \$0x1,%al
-[ ]*[a-f0-9]+:[ ]*c4 e3 79 30[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 79 30[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop \(%ecx\)
-[ ]*[a-f0-9]+:[ ]*c4 e3 79 30[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 79 30[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push \$0x1
-[ ]*[a-f0-9]+:[ ]*c4 e3 79 30[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 79 30[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*04 01[ ]*add \$0x1,%al
-[ ]*[a-f0-9]+:[ ]*c4 e3 f9 31[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 f9 31[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop \(%ecx\)
-[ ]*[a-f0-9]+:[ ]*c4 e3 f9 31[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 f9 31[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push \$0x1
-[ ]*[a-f0-9]+:[ ]*c4 e3 f9 31[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 f9 31[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*04 01[ ]*add \$0x1,%al
-[ ]*[a-f0-9]+:[ ]*c4 e3 79 31[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 79 31[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop \(%ecx\)
-[ ]*[a-f0-9]+:[ ]*c4 e3 79 31[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 79 31[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push \$0x1
-[ ]*[a-f0-9]+:[ ]*c4 e3 79 31[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 79 31[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*04 01[ ]*add \$0x1,%al
-[ ]*[a-f0-9]+:[ ]*c4 e3 f9 32[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 f9 32[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop \(%ecx\)
-[ ]*[a-f0-9]+:[ ]*c4 e3 f9 32[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 f9 32[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push \$0x1
-[ ]*[a-f0-9]+:[ ]*c4 e3 f9 32[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 f9 32[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*04 01[ ]*add \$0x1,%al
-[ ]*[a-f0-9]+:[ ]*c4 e3 79 32[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 79 32[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop \(%ecx\)
-[ ]*[a-f0-9]+:[ ]*c4 e3 79 32[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 79 32[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push \$0x1
-[ ]*[a-f0-9]+:[ ]*c4 e3 79 32[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 79 32[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*04 01[ ]*add \$0x1,%al
-[ ]*[a-f0-9]+:[ ]*c4 e3 f9 33[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 f9 33[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop \(%ecx\)
-[ ]*[a-f0-9]+:[ ]*c4 e3 f9 33[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 f9 33[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push \$0x1
-[ ]*[a-f0-9]+:[ ]*c4 e3 f9 33[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 f9 33[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*04 01[ ]*add \$0x1,%al
-[ ]*[a-f0-9]+:[ ]*c4 e3 79 33[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 79 33[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop \(%ecx\)
-[ ]*[a-f0-9]+:[ ]*c4 e3 79 33[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 79 33[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push \$0x1
-[ ]*[a-f0-9]+:[ ]*c4 e3 79 33[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 79 33[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*04 01[ ]*add \$0x1,%al
-[ ]*[a-f0-9]+:[ ]*c5 f8 92[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f8 92[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 f8 92[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f8 92[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 f8 92[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 f9 92[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f8 92[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c5 f9 92[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 f9 92[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f9 92[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 f9 92[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 fb 92[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f9 92[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c5 fb 92[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 fb 92[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 fb 92[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 fb 92[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 f9 92[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 fb 92[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c4 e1 f9 92[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 f9 92[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 f9 92[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 f9 92[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 f8 93[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 f9 92[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c5 f8 93[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 f8 93[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f8 93[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 f8 93[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 f9 93[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f8 93[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c5 f9 93[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 f9 93[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f9 93[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 f9 93[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 fb 93[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f9 93[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c5 fb 93[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 fb 93[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 fb 93[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 fb 93[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 f9 93[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 fb 93[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c4 e1 f9 93[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 f9 93[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 f9 93[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%esi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 f9 93[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*aas[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e2 01 1c[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 f9 93[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*aas
+[ ]*[a-f0-9]+:[ ]*c4 e2 01 1c[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*41[ ]*inc[ ]*%ecx
-[ ]*[a-f0-9]+:[ ]*37[ ]*aaa[ ]*
-[ ]*[a-f0-9]+:[ ]*62 f2 ad 08 1c[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*37[ ]*aaa
+[ ]*[a-f0-9]+:[ ]*62 f2 ad 08 1c[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*01 01[ ]*add[ ]*%eax,\(%ecx\)
-[ ]*[a-f0-9]+:[ ]*62 f3 7d 28 1b[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*62 f3 7d 28 1b[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*c8 25 62 f3[ ]*enter[ ]*\$0x6225,\$0xf3
-[ ]*[a-f0-9]+:[ ]*62 f3 75 08 23[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*62 f3 75 08 23[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*c2 25 62[ ]*ret[ ]*\$0x6225
-[ ]*[a-f0-9]+:[ ]*62 f2 7d 28 5b[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 28 5b[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*41[ ]*inc[ ]*%ecx
-[ ]*[a-f0-9]+:[ ]*37[ ]*aaa[ ]*
+[ ]*[a-f0-9]+:[ ]*37[ ]*aaa
#pass
Disassembly of section .text:
0+ <main>:
-[ ]*[a-f0-9]+: 0f ae e8[ ]* lfence
-[ ]*[a-f0-9]+: 0f ae f0[ ]* mfence
-[ ]*[a-f0-9]+: 0f ae f8[ ]* sfence
+[ ]*[a-f0-9]+: 0f ae e8[ ]* lfence
+[ ]*[a-f0-9]+: 0f ae f0[ ]* mfence
+[ ]*[a-f0-9]+: 0f ae f8[ ]* sfence
#pass
Disassembly of section .text:
0+ <start>:
- +[a-f0-9]+: dd f0 \(bad\)
+ +[a-f0-9]+: dd f0 \(bad\)
#pass
Disassembly of section .text:
0+ <.text>:
- +[a-f0-9]+: d9 ff fcos
+ +[a-f0-9]+: d9 ff fcos
+[a-f0-9]+: 66 0f 58 01 addpd \(%ecx\),%xmm0
#pass
Disassembly of section .text:
0+ <.text>:
- +[a-f0-9]+: d9 ff fcos
+ +[a-f0-9]+: d9 ff fcos
+[a-f0-9]+: 66 0f 58 01 addpd \(%ecx\),%xmm0
#pass
[ ]*[a-f0-9]+: e9 fc ff ff ff jmp 1 <foo\+0x1> 1: R_386_PLT32 ifunc
0+5 <ifunc>:
-[ ]*[a-f0-9]+: c3 ret
+[ ]*[a-f0-9]+: c3 ret
0+6 <bar>:
[ ]*[a-f0-9]+: eb 00 jmp 8 <normal>
0+8 <normal>:
-[ ]*[a-f0-9]+: c3 ret
+[ ]*[a-f0-9]+: c3 ret
#pass
RELOCATION RECORDS FOR \[.text\]:
OFFSET[ ]+TYPE[ ]+VALUE[ ]*
-[0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn[ ]*
-[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn-0x0*4[ ]*
-[0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn[ ]*
-[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn-0x0*4[ ]*
-[0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn[ ]*
-[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn-0x0*4[ ]*
+[0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn
+[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn-0x0*4
+[0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn
+[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn-0x0*4
+[0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn
+[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn-0x0*4
Disassembly of section .text:
0+000 <common>:
-[ ]*[0-9a-f]+:[ ]+0f 01 dd[ ]+clgi[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 df[ ]+invlpga[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 de[ ]+skinit[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 dc[ ]+stgi[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 da[ ]+vmload[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 d9[ ]+vmmcall[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 d8[ ]+vmrun[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 db[ ]+vmsave[ ]*
+[ ]*[0-9a-f]+:[ ]+0f 01 dd[ ]+clgi
+[ ]*[0-9a-f]+:[ ]+0f 01 df[ ]+invlpga
+[ ]*[0-9a-f]+:[ ]+0f 01 de[ ]+skinit
+[ ]*[0-9a-f]+:[ ]+0f 01 dc[ ]+stgi
+[ ]*[0-9a-f]+:[ ]+0f 01 da[ ]+vmload
+[ ]*[0-9a-f]+:[ ]+0f 01 d9[ ]+vmmcall
+[ ]*[0-9a-f]+:[ ]+0f 01 d8[ ]+vmrun
+[ ]*[0-9a-f]+:[ ]+0f 01 db[ ]+vmsave
[0-9a-f]+ <att64>:
-[ ]*[0-9a-f]+:[ ]+0f 01 df[ ]+invlpga[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 da[ ]+vmload[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 d8[ ]+vmrun[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 db[ ]+vmsave[ ]*
+[ ]*[0-9a-f]+:[ ]+0f 01 df[ ]+invlpga
+[ ]*[0-9a-f]+:[ ]+0f 01 da[ ]+vmload
+[ ]*[0-9a-f]+:[ ]+0f 01 d8[ ]+vmrun
+[ ]*[0-9a-f]+:[ ]+0f 01 db[ ]+vmsave
[0-9a-f]+ <att32>:
-[ ]*[0-9a-f]+:[ ]+0f 01 de[ ]+skinit[ ]*
-[ ]*[0-9a-f]+:[ ]+67 0f 01 df[ ]+addr32 invlpga[ ]
-[ ]*[0-9a-f]+:[ ]+67 0f 01 da[ ]+addr32 vmload[ ]
-[ ]*[0-9a-f]+:[ ]+67 0f 01 d8[ ]+addr32 vmrun[ ]
-[ ]*[0-9a-f]+:[ ]+67 0f 01 db[ ]+addr32 vmsave[ ]
+[ ]*[0-9a-f]+:[ ]+0f 01 de[ ]+skinit
+[ ]*[0-9a-f]+:[ ]+67 0f 01 df[ ]+addr32 invlpga
+[ ]*[0-9a-f]+:[ ]+67 0f 01 da[ ]+addr32 vmload
+[ ]*[0-9a-f]+:[ ]+67 0f 01 d8[ ]+addr32 vmrun
+[ ]*[0-9a-f]+:[ ]+67 0f 01 db[ ]+addr32 vmsave
[0-9a-f]+ <intel64>:
-[ ]*[0-9a-f]+:[ ]+0f 01 df[ ]+invlpga[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 da[ ]+vmload[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 d8[ ]+vmrun[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 db[ ]+vmsave[ ]*
+[ ]*[0-9a-f]+:[ ]+0f 01 df[ ]+invlpga
+[ ]*[0-9a-f]+:[ ]+0f 01 da[ ]+vmload
+[ ]*[0-9a-f]+:[ ]+0f 01 d8[ ]+vmrun
+[ ]*[0-9a-f]+:[ ]+0f 01 db[ ]+vmsave
[0-9a-f]+ <intel32>:
-[ ]*[0-9a-f]+:[ ]+0f 01 de[ ]+skinit[ ]*
-[ ]*[0-9a-f]+:[ ]+67 0f 01 df[ ]+addr32 invlpga[ ]
-[ ]*[0-9a-f]+:[ ]+67 0f 01 da[ ]+addr32 vmload[ ]
-[ ]*[0-9a-f]+:[ ]+67 0f 01 d8[ ]+addr32 vmrun[ ]
-[ ]*[0-9a-f]+:[ ]+67 0f 01 db[ ]+addr32 vmsave[ ]
+[ ]*[0-9a-f]+:[ ]+0f 01 de[ ]+skinit
+[ ]*[0-9a-f]+:[ ]+67 0f 01 df[ ]+addr32 invlpga
+[ ]*[0-9a-f]+:[ ]+67 0f 01 da[ ]+addr32 vmload
+[ ]*[0-9a-f]+:[ ]+67 0f 01 d8[ ]+addr32 vmrun
+[ ]*[0-9a-f]+:[ ]+67 0f 01 db[ ]+addr32 vmsave
#pass
[ ]*[a-f0-9]+: 66 e8 00 00 00 00 data16 call (0x)?2a <.*> 26: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: 66 e9 00 00 00 00 data16 jmp (0x)?30 <.*> 2c: R_X86_64_PLT32 foo-0x4
[ ]*[a-f0-9]+: 66 0f 82 00 00 00 00 data16 jb (0x)?37 <.*> 33: R_X86_64_PLT32 foo-0x4
-[ ]*[a-f0-9]+: 66 c3 data16 ret *
+[ ]*[a-f0-9]+: 66 c3 data16 ret
[ ]*[a-f0-9]+: 66 c2 08 00 data16 ret \$0x8
[ ]*[a-f0-9]+: 3e 74 03[ ]+je,pt +[0-9a-fx]+ <.*>
[ ]*[a-f0-9]+: 2e 74 00[ ]+je,pn +[0-9a-fx]+ <.*>
[ ]*[a-f0-9]+: 66 ff 20 data16 jmp \*\(%rax\)
[ ]*[a-f0-9]+: e8 00 00 00 00 call [0-9a-fx]* <.*> [0-9a-f]*: R_X86_64_PC32 \*ABS\*\+0x10003c
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp [0-9a-fx]* <.*> [0-9a-f]*: R_X86_64_PC32 \*ABS\*\+0x10003c
-[ ]*[a-f0-9]+: 66 c3 data16 ret *
+[ ]*[a-f0-9]+: 66 c3 data16 ret
[ ]*[a-f0-9]+: 66 c2 08 00 data16 ret \$0x8
#pass
Disassembly of section .text:
0+000 <_cbw>:
- 0: 66 98 cbw
- 2: 98 cwde
- 3: 48 98 cdqe
- 5: 66 40 98 rex cbw
- 8: 40 98 rex cwde
- a: 66 48 98 data16 cdqe
+ 0: 66 98 cbw
+ 2: 98 cwde
+ 3: 48 98 cdqe
+ 5: 66 40 98 rex cbw
+ 8: 40 98 rex cwde
+ a: 66 48 98 data16 cdqe
0+00d <_cwd>:
- d: 66 99 cwd
- f: 99 cdq
- 10: 48 99 cqo
- 12: 66 40 99 rex cwd
- 15: 40 99 rex cdq
- 17: 66 48 99 data16 cqo
+ d: 66 99 cwd
+ f: 99 cdq
+ 10: 48 99 cqo
+ 12: 66 40 99 rex cwd
+ 15: 40 99 rex cdq
+ 17: 66 48 99 data16 cqo
#pass
Disassembly of section .text:
0+000 <_cbw>:
- 0: 66 98 cbtw
- 2: 98 cwtl
- 3: 48 98 cltq
- 5: 66 40 98 rex cbtw
- 8: 40 98 rex cwtl
- a: 66 48 98 data16 cltq
+ 0: 66 98 cbtw
+ 2: 98 cwtl
+ 3: 48 98 cltq
+ 5: 66 40 98 rex cbtw
+ 8: 40 98 rex cwtl
+ a: 66 48 98 data16 cltq
0+00d <_cwd>:
- d: 66 99 cwtd
- f: 99 cltd
- 10: 48 99 cqto
- 12: 66 40 99 rex cwtd
- 15: 40 99 rex cltd
- 17: 66 48 99 data16 cqto
+ d: 66 99 cwtd
+ f: 99 cltd
+ 10: 48 99 cqto
+ 12: 66 40 99 rex cwtd
+ 15: 40 99 rex cltd
+ 17: 66 48 99 data16 cqto
#pass
Disassembly of section .text:
0+ <aaa>:
-[ ]*[a-f0-9]+: 37 \(bad\)
+[ ]*[a-f0-9]+: 37 \(bad\)
0+1 <aad0>:
-[ ]*[a-f0-9]+: d5 \(bad\)
+[ ]*[a-f0-9]+: d5 \(bad\)
[ ]*[a-f0-9]+: 0a .byte 0xa
0+3 <aad1>:
-[ ]*[a-f0-9]+: d5 \(bad\)
+[ ]*[a-f0-9]+: d5 \(bad\)
[ ]*[a-f0-9]+: 02 .byte 0x2
0+5 <aam0>:
-[ ]*[a-f0-9]+: d4 \(bad\)
+[ ]*[a-f0-9]+: d4 \(bad\)
[ ]*[a-f0-9]+: 0a .byte 0xa
0+7 <aam1>:
-[ ]*[a-f0-9]+: d4 \(bad\)
+[ ]*[a-f0-9]+: d4 \(bad\)
[ ]*[a-f0-9]+: 02 .byte 0x2
0+9 <aas>:
-[ ]*[a-f0-9]+: 3f \(bad\)
+[ ]*[a-f0-9]+: 3f \(bad\)
0+a <bound>:
[ ]*[a-f0-9]+: 62 .byte 0x62
[ ]*[a-f0-9]+: 10 .byte 0x10
0+c <daa>:
-[ ]*[a-f0-9]+: 27 \(bad\)
+[ ]*[a-f0-9]+: 27 \(bad\)
0+d <das>:
-[ ]*[a-f0-9]+: 2f \(bad\)
+[ ]*[a-f0-9]+: 2f \(bad\)
0+e <into>:
-[ ]*[a-f0-9]+: ce \(bad\)
+[ ]*[a-f0-9]+: ce \(bad\)
0+f <pusha>:
-[ ]*[a-f0-9]+: 60 \(bad\)
+[ ]*[a-f0-9]+: 60 \(bad\)
0+10 <popa>:
-[ ]*[a-f0-9]+: 61 \(bad\)
+[ ]*[a-f0-9]+: 61 \(bad\)
#pass
Disassembly of section .text:
0+ <aaa>:
-[ ]*[a-f0-9]+: 37 \(bad\)
+[ ]*[a-f0-9]+: 37 \(bad\)
0+1 <aad0>:
-[ ]*[a-f0-9]+: d5 \(bad\)
+[ ]*[a-f0-9]+: d5 \(bad\)
[ ]*[a-f0-9]+: 0a .byte 0xa
0+3 <aad1>:
-[ ]*[a-f0-9]+: d5 \(bad\)
+[ ]*[a-f0-9]+: d5 \(bad\)
[ ]*[a-f0-9]+: 02 .byte 0x2
0+5 <aam0>:
-[ ]*[a-f0-9]+: d4 \(bad\)
+[ ]*[a-f0-9]+: d4 \(bad\)
[ ]*[a-f0-9]+: 0a .byte 0xa
0+7 <aam1>:
-[ ]*[a-f0-9]+: d4 \(bad\)
+[ ]*[a-f0-9]+: d4 \(bad\)
[ ]*[a-f0-9]+: 02 .byte 0x2
0+9 <aas>:
-[ ]*[a-f0-9]+: 3f \(bad\)
+[ ]*[a-f0-9]+: 3f \(bad\)
0+a <bound>:
[ ]*[a-f0-9]+: 62 .byte 0x62
[ ]*[a-f0-9]+: 10 .byte 0x10
0+c <daa>:
-[ ]*[a-f0-9]+: 27 \(bad\)
+[ ]*[a-f0-9]+: 27 \(bad\)
0+d <das>:
-[ ]*[a-f0-9]+: 2f \(bad\)
+[ ]*[a-f0-9]+: 2f \(bad\)
0+e <into>:
-[ ]*[a-f0-9]+: ce \(bad\)
+[ ]*[a-f0-9]+: ce \(bad\)
0+f <pusha>:
-[ ]*[a-f0-9]+: 60 \(bad\)
+[ ]*[a-f0-9]+: 60 \(bad\)
0+10 <popa>:
-[ ]*[a-f0-9]+: 61 \(bad\)
+[ ]*[a-f0-9]+: 61 \(bad\)
#pass
Disassembly of section .text:
0+000 <foo>:
- 0: 0f 01 c1 [ ]*vmcall
- 3: 0f 01 c2 [ ]*vmlaunch
- 6: 0f 01 c3 [ ]*vmresume
- 9: 0f 01 c4 [ ]*vmxoff
+ 0: 0f 01 c1 [ ]*vmcall
+ 3: 0f 01 c2 [ ]*vmlaunch
+ 6: 0f 01 c3 [ ]*vmresume
+ 9: 0f 01 c4 [ ]*vmxoff
c: 66 0f c7 30 [ ]*vmclear \(%rax\)
10: 0f c7 30 [ ]*vmptrld \(%rax\)
13: 0f c7 38 [ ]*vmptrst \(%rax\)
Disassembly of section .text:
0+ <_start>:
-[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
-[ ]*[a-f0-9]+: 0f 01 d1 xsetbv
+[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
+[ ]*[a-f0-9]+: 0f 01 d1 xsetbv
[ ]*[a-f0-9]+: 0f ae 20 xsave \[rax\]
[ ]*[a-f0-9]+: 41 0f ae 20 xsave \[r8\]
[ ]*[a-f0-9]+: 41 0f ae 24 00 xsave \[r8\+rax\*1\]
Disassembly of section .text:
0+ <_start>:
-[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
-[ ]*[a-f0-9]+: 0f 01 d1 xsetbv
+[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
+[ ]*[a-f0-9]+: 0f 01 d1 xsetbv
[ ]*[a-f0-9]+: 0f ae 20 xsave \(%rax\)
[ ]*[a-f0-9]+: 41 0f ae 20 xsave \(%r8\)
[ ]*[a-f0-9]+: 41 0f ae 24 00 xsave \(%r8,%rax,1\)
[ ]*[a-f0-9]+: a3 11 22 33 44 55 66 77 88 movabs %eax,0x8877665544332211
[ ]*[a-f0-9]+: 48 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%rax
[ ]*[a-f0-9]+: 48 a3 11 22 33 44 55 66 77 88 movabs %rax,0x8877665544332211
-[ ]*[a-f0-9]+: 48 99 cqto
-[ ]*[a-f0-9]+: 48 98 cltq
+[ ]*[a-f0-9]+: 48 99 cqto
+[ ]*[a-f0-9]+: 48 98 cltq
[ ]*[a-f0-9]+: 48 63 c0 movslq %eax,%rax
[ ]*[a-f0-9]+: 48 0f bf c0 movswq %ax,%rax
[ ]*[a-f0-9]+: 48 0f be c0 movsbq %al,%rax
0+000 <_start>:
[ ]*[0-9a-f]+:[ ]+8b 15 04 00 00 00[ ]+mov[ ]+edx,(DWORD PTR )?(ds:)?0x4
-[ ]*[0-9a-f]+:[ ]+c3[ ]+ret[ ]*
+[ ]*[0-9a-f]+:[ ]+c3[ ]+ret
#pass
0+000 <_start>:
[ ]*[0-9a-f]+:[ ]+a1 00 00 00 00 00 00 00 00[ ]+movabs[ ]+eax,(ds:)?0x0
[ ]*[0-9a-f]+:[ ]+ff 35 00 00 00 00[ ]+push[ ]+(QWORD PTR )?\[rip(\+(0x)?0)?\]([ ]+#.*)?
-[ ]*[0-9a-f]+:[ ]+c3[ ]+ret[ ]*
+[ ]*[0-9a-f]+:[ ]+c3[ ]+ret
#pass
[ ]*[a-f0-9]+: 23 90 90 90 90 90 + and edx,DWORD PTR \[eax-0x6f6f6f70\]
[ ]*[a-f0-9]+: 24 90 + and al,0x90
[ ]*[a-f0-9]+: 25 90 90 90 90 + and eax,0x90909090
-[ ]*[a-f0-9]+: 27 + daa *
+[ ]*[a-f0-9]+: 27 + daa
[ ]*[a-f0-9]+: 28 90 90 90 90 90 + sub BYTE PTR \[eax-0x6f6f6f70\],dl
[ ]*[a-f0-9]+: 29 90 90 90 90 90 + sub DWORD PTR \[eax-0x6f6f6f70\],edx
[ ]*[a-f0-9]+: 2a 90 90 90 90 90 + sub dl,BYTE PTR \[eax-0x6f6f6f70\]
[ ]*[a-f0-9]+: 2b 90 90 90 90 90 + sub edx,DWORD PTR \[eax-0x6f6f6f70\]
[ ]*[a-f0-9]+: 2c 90 + sub al,0x90
[ ]*[a-f0-9]+: 2d 90 90 90 90 + sub eax,0x90909090
-[ ]*[a-f0-9]+: 2f + das *
+[ ]*[a-f0-9]+: 2f + das
[ ]*[a-f0-9]+: 30 90 90 90 90 90 + xor BYTE PTR \[eax-0x6f6f6f70\],dl
[ ]*[a-f0-9]+: 31 90 90 90 90 90 + xor DWORD PTR \[eax-0x6f6f6f70\],edx
[ ]*[a-f0-9]+: 32 90 90 90 90 90 + xor dl,BYTE PTR \[eax-0x6f6f6f70\]
[ ]*[a-f0-9]+: 33 90 90 90 90 90 + xor edx,DWORD PTR \[eax-0x6f6f6f70\]
[ ]*[a-f0-9]+: 34 90 + xor al,0x90
[ ]*[a-f0-9]+: 35 90 90 90 90 + xor eax,0x90909090
-[ ]*[a-f0-9]+: 37 + aaa *
+[ ]*[a-f0-9]+: 37 + aaa
[ ]*[a-f0-9]+: 38 90 90 90 90 90 + cmp BYTE PTR \[eax-0x6f6f6f70\],dl
[ ]*[a-f0-9]+: 39 90 90 90 90 90 + cmp DWORD PTR \[eax-0x6f6f6f70\],edx
[ ]*[a-f0-9]+: 3a 90 90 90 90 90 + cmp dl,BYTE PTR \[eax-0x6f6f6f70\]
[ ]*[a-f0-9]+: 3b 90 90 90 90 90 + cmp edx,DWORD PTR \[eax-0x6f6f6f70\]
[ ]*[a-f0-9]+: 3c 90 + cmp al,0x90
[ ]*[a-f0-9]+: 3d 90 90 90 90 + cmp eax,0x90909090
-[ ]*[a-f0-9]+: 3f + aas *
+[ ]*[a-f0-9]+: 3f + aas
[ ]*[a-f0-9]+: 40 + inc eax
[ ]*[a-f0-9]+: 41 + inc ecx
[ ]*[a-f0-9]+: 42 + inc edx
[ ]*[a-f0-9]+: 5d + pop ebp
[ ]*[a-f0-9]+: 5e + pop esi
[ ]*[a-f0-9]+: 5f + pop edi
-[ ]*[a-f0-9]+: 60 + pusha *
-[ ]*[a-f0-9]+: 61 + popa *
+[ ]*[a-f0-9]+: 60 + pusha
+[ ]*[a-f0-9]+: 61 + popa
[ ]*[a-f0-9]+: 62 90 90 90 90 90 + bound edx,QWORD PTR \[eax-0x6f6f6f70\]
[ ]*[a-f0-9]+: 63 90 90 90 90 90 + arpl WORD PTR \[eax-0x6f6f6f70\],dx
[ ]*[a-f0-9]+: 68 90 90 90 90 + push 0x90909090
[ ]*[a-f0-9]+: 95 + xchg ebp,eax
[ ]*[a-f0-9]+: 96 + xchg esi,eax
[ ]*[a-f0-9]+: 97 + xchg edi,eax
-[ ]*[a-f0-9]+: 98 + cwde *
-[ ]*[a-f0-9]+: 99 + cdq *
+[ ]*[a-f0-9]+: 98 + cwde
+[ ]*[a-f0-9]+: 99 + cdq
[ ]*[a-f0-9]+: 9a 90 90 90 90 90 90 call 0x9090:0x90909090
[ ]*[a-f0-9]+: 9b + fwait
-[ ]*[a-f0-9]+: 9c + pushf *
-[ ]*[a-f0-9]+: 9d + popf *
-[ ]*[a-f0-9]+: 9e + sahf *
-[ ]*[a-f0-9]+: 9f + lahf *
+[ ]*[a-f0-9]+: 9c + pushf
+[ ]*[a-f0-9]+: 9d + popf
+[ ]*[a-f0-9]+: 9e + sahf
+[ ]*[a-f0-9]+: 9f + lahf
[ ]*[a-f0-9]+: a0 90 90 90 90 + mov al,ds:0x90909090
[ ]*[a-f0-9]+: a1 90 90 90 90 + mov eax,ds:0x90909090
[ ]*[a-f0-9]+: a2 90 90 90 90 + mov ds:0x90909090,al
[ ]*[a-f0-9]+: c0 90 90 90 90 90 90 rcl BYTE PTR \[eax-0x6f6f6f70\],0x90
[ ]*[a-f0-9]+: c1 90 90 90 90 90 90 rcl DWORD PTR \[eax-0x6f6f6f70\],0x90
[ ]*[a-f0-9]+: c2 90 90 + ret 0x9090
-[ ]*[a-f0-9]+: c3 + ret *
+[ ]*[a-f0-9]+: c3 + ret
[ ]*[a-f0-9]+: c4 90 90 90 90 90 + les edx,FWORD PTR \[eax-0x6f6f6f70\]
[ ]*[a-f0-9]+: c5 90 90 90 90 90 + lds edx,FWORD PTR \[eax-0x6f6f6f70\]
[ ]*[a-f0-9]+: c6 80 90 90 90 90 90 mov BYTE PTR \[eax-0x6f6f6f70\],0x90
[ ]*[a-f0-9]+: c7 80 90 90 90 90 90 90 90 90 mov DWORD PTR \[eax-0x6f6f6f70\],0x90909090
[ ]*[a-f0-9]+: c8 90 90 90 + enter 0x9090,0x90
-[ ]*[a-f0-9]+: c9 + leave *
+[ ]*[a-f0-9]+: c9 + leave
[ ]*[a-f0-9]+: ca 90 90 + retf 0x9090
-[ ]*[a-f0-9]+: cb + retf *
+[ ]*[a-f0-9]+: cb + retf
[ ]*[a-f0-9]+: ca 90 90 + retf 0x9090
-[ ]*[a-f0-9]+: cb + retf *
-[ ]*[a-f0-9]+: cc + int3 *
+[ ]*[a-f0-9]+: cb + retf
+[ ]*[a-f0-9]+: cc + int3
[ ]*[a-f0-9]+: cd 90 + int 0x90
-[ ]*[a-f0-9]+: ce + into *
-[ ]*[a-f0-9]+: cf + iret *
+[ ]*[a-f0-9]+: ce + into
+[ ]*[a-f0-9]+: cf + iret
[ ]*[a-f0-9]+: d0 90 90 90 90 90 + rcl BYTE PTR \[eax-0x6f6f6f70\],1
[ ]*[a-f0-9]+: d1 90 90 90 90 90 + rcl DWORD PTR \[eax-0x6f6f6f70\],1
[ ]*[a-f0-9]+: d2 90 90 90 90 90 + rcl BYTE PTR \[eax-0x6f6f6f70\],cl
[ ]*[a-f0-9]+: ed + in eax,dx
[ ]*[a-f0-9]+: ee + out dx,al
[ ]*[a-f0-9]+: ef + out dx,eax
-[ ]*[a-f0-9]+: f4 + hlt *
-[ ]*[a-f0-9]+: f5 + cmc *
+[ ]*[a-f0-9]+: f4 + hlt
+[ ]*[a-f0-9]+: f5 + cmc
[ ]*[a-f0-9]+: f6 90 90 90 90 90 + not BYTE PTR \[eax-0x6f6f6f70\]
[ ]*[a-f0-9]+: f7 90 90 90 90 90 + not DWORD PTR \[eax-0x6f6f6f70\]
-[ ]*[a-f0-9]+: f8 + clc *
-[ ]*[a-f0-9]+: f9 + stc *
-[ ]*[a-f0-9]+: fa + cli *
-[ ]*[a-f0-9]+: fb + sti *
-[ ]*[a-f0-9]+: fc + cld *
-[ ]*[a-f0-9]+: fd + std *
+[ ]*[a-f0-9]+: f8 + clc
+[ ]*[a-f0-9]+: f9 + stc
+[ ]*[a-f0-9]+: fa + cli
+[ ]*[a-f0-9]+: fb + sti
+[ ]*[a-f0-9]+: fc + cld
+[ ]*[a-f0-9]+: fd + std
[ ]*[a-f0-9]+: ff 90 90 90 90 90 + call DWORD PTR \[eax-0x6f6f6f70\]
[ ]*[a-f0-9]+: 0f 00 90 90 90 90 90 lldt WORD PTR \[eax-0x6f6f6f70\]
[ ]*[a-f0-9]+: 0f 01 90 90 90 90 90 lgdtd \[eax-0x6f6f6f70\]
[ ]*[a-f0-9]+: 0f 02 90 90 90 90 90 lar edx,WORD PTR \[eax-0x6f6f6f70\]
[ ]*[a-f0-9]+: 0f 03 90 90 90 90 90 lsl edx,WORD PTR \[eax-0x6f6f6f70\]
-[ ]*[a-f0-9]+: 0f 06 + clts *
-[ ]*[a-f0-9]+: 0f 08 + invd *
-[ ]*[a-f0-9]+: 0f 09 + wbinvd *
-[ ]*[a-f0-9]+: 0f 0b + ud2 *
+[ ]*[a-f0-9]+: 0f 06 + clts
+[ ]*[a-f0-9]+: 0f 08 + invd
+[ ]*[a-f0-9]+: 0f 09 + wbinvd
+[ ]*[a-f0-9]+: 0f 0b + ud2
[ ]*[a-f0-9]+: 0f 20 d0 + mov eax,cr2
[ ]*[a-f0-9]+: 0f 21 d0 + mov eax,dr2
[ ]*[a-f0-9]+: 0f 22 d0 + mov cr2,eax
[ ]*[a-f0-9]+: 0f 23 d0 + mov dr2,eax
[ ]*[a-f0-9]+: 0f 24 d0 + mov eax,tr2
[ ]*[a-f0-9]+: 0f 26 d0 + mov tr2,eax
-[ ]*[a-f0-9]+: 0f 30 + wrmsr *
-[ ]*[a-f0-9]+: 0f 31 + rdtsc *
-[ ]*[a-f0-9]+: 0f 32 + rdmsr *
-[ ]*[a-f0-9]+: 0f 33 + rdpmc *
+[ ]*[a-f0-9]+: 0f 30 + wrmsr
+[ ]*[a-f0-9]+: 0f 31 + rdtsc
+[ ]*[a-f0-9]+: 0f 32 + rdmsr
+[ ]*[a-f0-9]+: 0f 33 + rdpmc
[ ]*[a-f0-9]+: 0f 40 90 90 90 90 90 cmovo edx,DWORD PTR \[eax-0x6f6f6f70\]
[ ]*[a-f0-9]+: 0f 41 90 90 90 90 90 cmovno edx,DWORD PTR \[eax-0x6f6f6f70\]
[ ]*[a-f0-9]+: 0f 42 90 90 90 90 90 cmovb edx,DWORD PTR \[eax-0x6f6f6f70\]
[ ]*[a-f0-9]+: 0f 74 90 90 90 90 90 pcmpeqb mm2,QWORD PTR \[eax-0x6f6f6f70\]
[ ]*[a-f0-9]+: 0f 75 90 90 90 90 90 pcmpeqw mm2,QWORD PTR \[eax-0x6f6f6f70\]
[ ]*[a-f0-9]+: 0f 76 90 90 90 90 90 pcmpeqd mm2,QWORD PTR \[eax-0x6f6f6f70\]
-[ ]*[a-f0-9]+: 0f 77 + emms *
+[ ]*[a-f0-9]+: 0f 77 + emms
[ ]*[a-f0-9]+: 0f 7e 90 90 90 90 90 movd DWORD PTR \[eax-0x6f6f6f70\],mm2
[ ]*[a-f0-9]+: 0f 7f 90 90 90 90 90 movq QWORD PTR \[eax-0x6f6f6f70\],mm2
[ ]*[a-f0-9]+: 0f 80 90 90 90 90 + jo 909094e6 <barn\+0x909089a4>
[ ]*[a-f0-9]+: 0f 9f 80 90 90 90 90 setg BYTE PTR \[eax-0x6f6f6f70\]
[ ]*[a-f0-9]+: 0f a0 + push fs
[ ]*[a-f0-9]+: 0f a1 + pop fs
-[ ]*[a-f0-9]+: 0f a2 + cpuid *
+[ ]*[a-f0-9]+: 0f a2 + cpuid
[ ]*[a-f0-9]+: 0f a3 90 90 90 90 90 bt DWORD PTR \[eax-0x6f6f6f70\],edx
[ ]*[a-f0-9]+: 0f a4 90 90 90 90 90 90 shld DWORD PTR \[eax-0x6f6f6f70\],edx,0x90
[ ]*[a-f0-9]+: 0f a5 90 90 90 90 90 shld DWORD PTR \[eax-0x6f6f6f70\],edx,cl
[ ]*[a-f0-9]+: 0f a8 + push gs
[ ]*[a-f0-9]+: 0f a9 + pop gs
-[ ]*[a-f0-9]+: 0f aa + rsm *
+[ ]*[a-f0-9]+: 0f aa + rsm
[ ]*[a-f0-9]+: 0f ab 90 90 90 90 90 bts DWORD PTR \[eax-0x6f6f6f70\],edx
[ ]*[a-f0-9]+: 0f ac 90 90 90 90 90 90 shrd DWORD PTR \[eax-0x6f6f6f70\],edx,0x90
[ ]*[a-f0-9]+: 0f ad 90 90 90 90 90 shrd DWORD PTR \[eax-0x6f6f6f70\],edx,cl
[ ]*[a-f0-9]+: 0f b5 90 90 90 90 90 lgs edx,FWORD PTR \[eax-0x6f6f6f70\]
[ ]*[a-f0-9]+: 0f b6 90 90 90 90 90 movzx edx,BYTE PTR \[eax-0x6f6f6f70\]
[ ]*[a-f0-9]+: 0f b7 90 90 90 90 90 movzx edx,WORD PTR \[eax-0x6f6f6f70\]
-[ ]*[a-f0-9]+: 0f 0b + ud2 *
+[ ]*[a-f0-9]+: 0f 0b + ud2
[ ]*[a-f0-9]+: 0f bb 90 90 90 90 90 btc DWORD PTR \[eax-0x6f6f6f70\],edx
[ ]*[a-f0-9]+: 0f bc 90 90 90 90 90 bsf edx,DWORD PTR \[eax-0x6f6f6f70\]
[ ]*[a-f0-9]+: 0f bd 90 90 90 90 90 bsr edx,DWORD PTR \[eax-0x6f6f6f70\]
[ ]*[a-f0-9]+: 66 5d + pop bp
[ ]*[a-f0-9]+: 66 5e + pop si
[ ]*[a-f0-9]+: 66 5f + pop di
-[ ]*[a-f0-9]+: 66 60 + pushaw *
-[ ]*[a-f0-9]+: 66 61 + popaw *
+[ ]*[a-f0-9]+: 66 60 + pushaw
+[ ]*[a-f0-9]+: 66 61 + popaw
[ ]*[a-f0-9]+: 66 62 90 90 90 90 90 bound dx,DWORD PTR \[eax-0x6f6f6f70\]
[ ]*[a-f0-9]+: 66 68 90 90 + pushw 0x9090
[ ]*[a-f0-9]+: 66 69 90 90 90 90 90 90 90 imul dx,WORD PTR \[eax-0x6f6f6f70\],0x9090
[ ]*[a-f0-9]+: 66 95 + xchg bp,ax
[ ]*[a-f0-9]+: 66 96 + xchg si,ax
[ ]*[a-f0-9]+: 66 97 + xchg di,ax
-[ ]*[a-f0-9]+: 66 98 + cbw *
-[ ]*[a-f0-9]+: 66 99 + cwd *
+[ ]*[a-f0-9]+: 66 98 + cbw
+[ ]*[a-f0-9]+: 66 99 + cwd
[ ]*[a-f0-9]+: 66 9a 90 90 90 90 + call 0x9090:0x9090
-[ ]*[a-f0-9]+: 66 9c + pushfw *
-[ ]*[a-f0-9]+: 66 9d + popfw *
+[ ]*[a-f0-9]+: 66 9c + pushfw
+[ ]*[a-f0-9]+: 66 9d + popfw
[ ]*[a-f0-9]+: 66 a1 90 90 90 90 + mov ax,ds:0x90909090
[ ]*[a-f0-9]+: 66 a3 90 90 90 90 + mov ds:0x90909090,ax
[ ]*[a-f0-9]+: 66 a5 + movs WORD PTR es:\[edi\],WORD PTR ds:\[esi\]
[ ]*[a-f0-9]+: 66 bf 90 90 + mov di,0x9090
[ ]*[a-f0-9]+: 66 c1 90 90 90 90 90 90 rcl WORD PTR \[eax-0x6f6f6f70\],0x90
[ ]*[a-f0-9]+: 66 c2 90 90 + retw 0x9090
-[ ]*[a-f0-9]+: 66 c3 + retw *
+[ ]*[a-f0-9]+: 66 c3 + retw
[ ]*[a-f0-9]+: 66 c4 90 90 90 90 90 les dx,DWORD PTR \[eax-0x6f6f6f70\]
[ ]*[a-f0-9]+: 66 c5 90 90 90 90 90 lds dx,DWORD PTR \[eax-0x6f6f6f70\]
[ ]*[a-f0-9]+: 66 c7 80 90 90 90 90 90 90 mov WORD PTR \[eax-0x6f6f6f70\],0x9090
[ ]*[a-f0-9]+: 66 c8 90 90 90 + enterw 0x9090,0x90
-[ ]*[a-f0-9]+: 66 c9 + leavew *
+[ ]*[a-f0-9]+: 66 c9 + leavew
[ ]*[a-f0-9]+: 66 ca 90 90 + retfw 0x9090
-[ ]*[a-f0-9]+: 66 cb + retfw *
+[ ]*[a-f0-9]+: 66 cb + retfw
[ ]*[a-f0-9]+: 66 ca 90 90 + retfw 0x9090
-[ ]*[a-f0-9]+: 66 cb + retfw *
-[ ]*[a-f0-9]+: 66 cf + iretw *
+[ ]*[a-f0-9]+: 66 cb + retfw
+[ ]*[a-f0-9]+: 66 cf + iretw
[ ]*[a-f0-9]+: 66 d1 90 90 90 90 90 rcl WORD PTR \[eax-0x6f6f6f70\],1
[ ]*[a-f0-9]+: 66 d3 90 90 90 90 90 rcl WORD PTR \[eax-0x6f6f6f70\],cl
[ ]*[a-f0-9]+: 66 e5 90 + in ax,0x90
[ ]*[a-f0-9]+: 66 0f c1 90 90 90 90 90 xadd WORD PTR \[eax-0x6f6f6f70\],dx
[a-f0-9]+ <gs_foo>:
-[ ]*[a-f0-9]+: c3 + ret *
+[ ]*[a-f0-9]+: c3 + ret
[a-f0-9]+ <short_foo>:
-[ ]*[a-f0-9]+: c3 + ret *
+[ ]*[a-f0-9]+: c3 + ret
[a-f0-9]+ <bar>:
[ ]*[a-f0-9]+: e8 f9 ff ff ff + call 9d9 <gs_foo>
[ ]*[a-f0-9]+: 0e + push cs
[ ]*[a-f0-9]+: 8b 04 5d 00 00 00 00 mov eax,DWORD PTR \[ebx\*2\+0x0\]
[ ]*[a-f0-9]+: 10 14 85 90 90 90 90 adc BYTE PTR \[eax\*4-0x6f6f6f70\],dl
-[ ]*[a-f0-9]+: 2f + das *
+[ ]*[a-f0-9]+: 2f + das
[ ]*[a-f0-9]+: ea 90 90 90 90 90 90 jmp 0x9090:0x90909090
[ ]*[a-f0-9]+: 66 a5 + movs WORD PTR es:\[edi\],WORD PTR ds:\[esi\]
[ ]*[a-f0-9]+: 70 90 + jo 9be <foo\+0x9be>
[ ]*[a-f0-9]+: 23 90 90 90 90 90 [ ]*and -0x6f6f6f70\(%eax\),%edx
[ ]*[a-f0-9]+: 24 90 [ ]*and \$0x90,%al
[ ]*[a-f0-9]+: 25 90 90 90 90 [ ]*and \$0x90909090,%eax
-[ ]*[a-f0-9]+: 27 [ ]*daa
+[ ]*[a-f0-9]+: 27 [ ]*daa
[ ]*[a-f0-9]+: 28 90 90 90 90 90 [ ]*sub %dl,-0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: 29 90 90 90 90 90 [ ]*sub %edx,-0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: 2a 90 90 90 90 90 [ ]*sub -0x6f6f6f70\(%eax\),%dl
[ ]*[a-f0-9]+: 2b 90 90 90 90 90 [ ]*sub -0x6f6f6f70\(%eax\),%edx
[ ]*[a-f0-9]+: 2c 90 [ ]*sub \$0x90,%al
[ ]*[a-f0-9]+: 2d 90 90 90 90 [ ]*sub \$0x90909090,%eax
-[ ]*[a-f0-9]+: 2f [ ]*das
+[ ]*[a-f0-9]+: 2f [ ]*das
[ ]*[a-f0-9]+: 30 90 90 90 90 90 [ ]*xor %dl,-0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: 31 90 90 90 90 90 [ ]*xor %edx,-0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: 32 90 90 90 90 90 [ ]*xor -0x6f6f6f70\(%eax\),%dl
[ ]*[a-f0-9]+: 33 90 90 90 90 90 [ ]*xor -0x6f6f6f70\(%eax\),%edx
[ ]*[a-f0-9]+: 34 90 [ ]*xor \$0x90,%al
[ ]*[a-f0-9]+: 35 90 90 90 90 [ ]*xor \$0x90909090,%eax
-[ ]*[a-f0-9]+: 37 [ ]*aaa
+[ ]*[a-f0-9]+: 37 [ ]*aaa
[ ]*[a-f0-9]+: 38 90 90 90 90 90 [ ]*cmp %dl,-0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: 39 90 90 90 90 90 [ ]*cmp %edx,-0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: 3a 90 90 90 90 90 [ ]*cmp -0x6f6f6f70\(%eax\),%dl
[ ]*[a-f0-9]+: 3b 90 90 90 90 90 [ ]*cmp -0x6f6f6f70\(%eax\),%edx
[ ]*[a-f0-9]+: 3c 90 [ ]*cmp \$0x90,%al
[ ]*[a-f0-9]+: 3d 90 90 90 90 [ ]*cmp \$0x90909090,%eax
-[ ]*[a-f0-9]+: 3f [ ]*aas
+[ ]*[a-f0-9]+: 3f [ ]*aas
[ ]*[a-f0-9]+: 40 [ ]*inc %eax
[ ]*[a-f0-9]+: 41 [ ]*inc %ecx
[ ]*[a-f0-9]+: 42 [ ]*inc %edx
[ ]*[a-f0-9]+: 5d [ ]*pop %ebp
[ ]*[a-f0-9]+: 5e [ ]*pop %esi
[ ]*[a-f0-9]+: 5f [ ]*pop %edi
-[ ]*[a-f0-9]+: 60 [ ]*pusha
-[ ]*[a-f0-9]+: 61 [ ]*popa
+[ ]*[a-f0-9]+: 60 [ ]*pusha
+[ ]*[a-f0-9]+: 61 [ ]*popa
[ ]*[a-f0-9]+: 62 90 90 90 90 90 [ ]*bound %edx,-0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: 63 90 90 90 90 90 [ ]*arpl %dx,-0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: 68 90 90 90 90 [ ]*push \$0x90909090
[ ]*[a-f0-9]+: 95 [ ]*xchg %eax,%ebp
[ ]*[a-f0-9]+: 96 [ ]*xchg %eax,%esi
[ ]*[a-f0-9]+: 97 [ ]*xchg %eax,%edi
-[ ]*[a-f0-9]+: 98 [ ]*cwtl
-[ ]*[a-f0-9]+: 99 [ ]*cltd
+[ ]*[a-f0-9]+: 98 [ ]*cwtl
+[ ]*[a-f0-9]+: 99 [ ]*cltd
[ ]*[a-f0-9]+: 9a 90 90 90 90 90 90 [ ]*lcall \$0x9090,\$0x90909090
[ ]*[a-f0-9]+: 9b [ ]*fwait
-[ ]*[a-f0-9]+: 9c [ ]*pushf
-[ ]*[a-f0-9]+: 9d [ ]*popf
-[ ]*[a-f0-9]+: 9e [ ]*sahf
-[ ]*[a-f0-9]+: 9f [ ]*lahf
+[ ]*[a-f0-9]+: 9c [ ]*pushf
+[ ]*[a-f0-9]+: 9d [ ]*popf
+[ ]*[a-f0-9]+: 9e [ ]*sahf
+[ ]*[a-f0-9]+: 9f [ ]*lahf
[ ]*[a-f0-9]+: a0 90 90 90 90 [ ]*mov 0x90909090,%al
[ ]*[a-f0-9]+: a1 90 90 90 90 [ ]*mov 0x90909090,%eax
[ ]*[a-f0-9]+: a2 90 90 90 90 [ ]*mov %al,0x90909090
[ ]*[a-f0-9]+: c0 90 90 90 90 90 90 [ ]*rclb \$0x90,-0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: c1 90 90 90 90 90 90 [ ]*rcll \$0x90,-0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: c2 90 90 [ ]*ret \$0x9090
-[ ]*[a-f0-9]+: c3 [ ]*ret
+[ ]*[a-f0-9]+: c3 [ ]*ret
[ ]*[a-f0-9]+: c4 90 90 90 90 90 [ ]*les -0x6f6f6f70\(%eax\),%edx
[ ]*[a-f0-9]+: c5 90 90 90 90 90 [ ]*lds -0x6f6f6f70\(%eax\),%edx
[ ]*[a-f0-9]+: c6 80 90 90 90 90 90 [ ]*movb \$0x90,-0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: c7 80 90 90 90 90 90 90 90 90 [ ]*movl \$0x90909090,-0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: c8 90 90 90 [ ]*enter \$0x9090,\$0x90
-[ ]*[a-f0-9]+: c9 [ ]*leave
+[ ]*[a-f0-9]+: c9 [ ]*leave
[ ]*[a-f0-9]+: ca 90 90 [ ]*lret \$0x9090
-[ ]*[a-f0-9]+: cb [ ]*lret
+[ ]*[a-f0-9]+: cb [ ]*lret
[ ]*[a-f0-9]+: ca 90 90 [ ]*lret \$0x9090
-[ ]*[a-f0-9]+: cb [ ]*lret
-[ ]*[a-f0-9]+: cc [ ]*int3
+[ ]*[a-f0-9]+: cb [ ]*lret
+[ ]*[a-f0-9]+: cc [ ]*int3
[ ]*[a-f0-9]+: cd 90 [ ]*int \$0x90
-[ ]*[a-f0-9]+: ce [ ]*into
-[ ]*[a-f0-9]+: cf [ ]*iret
+[ ]*[a-f0-9]+: ce [ ]*into
+[ ]*[a-f0-9]+: cf [ ]*iret
[ ]*[a-f0-9]+: d0 90 90 90 90 90 [ ]*rclb -0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: d1 90 90 90 90 90 [ ]*rcll -0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: d2 90 90 90 90 90 [ ]*rclb %cl,-0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: ed [ ]*in \(%dx\),%eax
[ ]*[a-f0-9]+: ee [ ]*out %al,\(%dx\)
[ ]*[a-f0-9]+: ef [ ]*out %eax,\(%dx\)
-[ ]*[a-f0-9]+: f4 [ ]*hlt
-[ ]*[a-f0-9]+: f5 [ ]*cmc
+[ ]*[a-f0-9]+: f4 [ ]*hlt
+[ ]*[a-f0-9]+: f5 [ ]*cmc
[ ]*[a-f0-9]+: f6 90 90 90 90 90 [ ]*notb -0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: f7 90 90 90 90 90 [ ]*notl -0x6f6f6f70\(%eax\)
-[ ]*[a-f0-9]+: f8 [ ]*clc
-[ ]*[a-f0-9]+: f9 [ ]*stc
-[ ]*[a-f0-9]+: fa [ ]*cli
-[ ]*[a-f0-9]+: fb [ ]*sti
-[ ]*[a-f0-9]+: fc [ ]*cld
-[ ]*[a-f0-9]+: fd [ ]*std
+[ ]*[a-f0-9]+: f8 [ ]*clc
+[ ]*[a-f0-9]+: f9 [ ]*stc
+[ ]*[a-f0-9]+: fa [ ]*cli
+[ ]*[a-f0-9]+: fb [ ]*sti
+[ ]*[a-f0-9]+: fc [ ]*cld
+[ ]*[a-f0-9]+: fd [ ]*std
[ ]*[a-f0-9]+: ff 90 90 90 90 90 [ ]*call \*-0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: 0f 00 90 90 90 90 90 [ ]*lldt -0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: 0f 01 90 90 90 90 90 [ ]*lgdtl -0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: 0f 02 90 90 90 90 90 [ ]*lar -0x6f6f6f70\(%eax\),%edx
[ ]*[a-f0-9]+: 0f 03 90 90 90 90 90 [ ]*lsl -0x6f6f6f70\(%eax\),%edx
-[ ]*[a-f0-9]+: 0f 06 [ ]*clts
-[ ]*[a-f0-9]+: 0f 08 [ ]*invd
-[ ]*[a-f0-9]+: 0f 09 [ ]*wbinvd
-[ ]*[a-f0-9]+: 0f 0b [ ]*ud2
+[ ]*[a-f0-9]+: 0f 06 [ ]*clts
+[ ]*[a-f0-9]+: 0f 08 [ ]*invd
+[ ]*[a-f0-9]+: 0f 09 [ ]*wbinvd
+[ ]*[a-f0-9]+: 0f 0b [ ]*ud2
[ ]*[a-f0-9]+: 0f 20 d0 [ ]*mov %cr2,%eax
[ ]*[a-f0-9]+: 0f 21 d0 [ ]*mov %db2,%eax
[ ]*[a-f0-9]+: 0f 22 d0 [ ]*mov %eax,%cr2
[ ]*[a-f0-9]+: 0f 23 d0 [ ]*mov %eax,%db2
[ ]*[a-f0-9]+: 0f 24 d0 [ ]*mov %tr2,%eax
[ ]*[a-f0-9]+: 0f 26 d0 [ ]*mov %eax,%tr2
-[ ]*[a-f0-9]+: 0f 30 [ ]*wrmsr
-[ ]*[a-f0-9]+: 0f 31 [ ]*rdtsc
-[ ]*[a-f0-9]+: 0f 32 [ ]*rdmsr
-[ ]*[a-f0-9]+: 0f 33 [ ]*rdpmc
+[ ]*[a-f0-9]+: 0f 30 [ ]*wrmsr
+[ ]*[a-f0-9]+: 0f 31 [ ]*rdtsc
+[ ]*[a-f0-9]+: 0f 32 [ ]*rdmsr
+[ ]*[a-f0-9]+: 0f 33 [ ]*rdpmc
[ ]*[a-f0-9]+: 0f 40 90 90 90 90 90 [ ]*cmovo -0x6f6f6f70\(%eax\),%edx
[ ]*[a-f0-9]+: 0f 41 90 90 90 90 90 [ ]*cmovno -0x6f6f6f70\(%eax\),%edx
[ ]*[a-f0-9]+: 0f 42 90 90 90 90 90 [ ]*cmovb -0x6f6f6f70\(%eax\),%edx
[ ]*[a-f0-9]+: 0f 74 90 90 90 90 90 [ ]*pcmpeqb -0x6f6f6f70\(%eax\),%mm2
[ ]*[a-f0-9]+: 0f 75 90 90 90 90 90 [ ]*pcmpeqw -0x6f6f6f70\(%eax\),%mm2
[ ]*[a-f0-9]+: 0f 76 90 90 90 90 90 [ ]*pcmpeqd -0x6f6f6f70\(%eax\),%mm2
-[ ]*[a-f0-9]+: 0f 77 [ ]*emms
+[ ]*[a-f0-9]+: 0f 77 [ ]*emms
[ ]*[a-f0-9]+: 0f 7e 90 90 90 90 90 [ ]*movd %mm2,-0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: 0f 7f 90 90 90 90 90 [ ]*movq %mm2,-0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: 0f 80 90 90 90 90 [ ]*jo (0x)?909094e6.*
[ ]*[a-f0-9]+: 0f 9f 80 90 90 90 90 [ ]*setg -0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: 0f a0 [ ]*push %fs
[ ]*[a-f0-9]+: 0f a1 [ ]*pop %fs
-[ ]*[a-f0-9]+: 0f a2 [ ]*cpuid
+[ ]*[a-f0-9]+: 0f a2 [ ]*cpuid
[ ]*[a-f0-9]+: 0f a3 90 90 90 90 90 [ ]*bt %edx,-0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: 0f a4 90 90 90 90 90 90 [ ]*shld \$0x90,%edx,-0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: 0f a5 90 90 90 90 90 [ ]*shld %cl,%edx,-0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: 0f a8 [ ]*push %gs
[ ]*[a-f0-9]+: 0f a9 [ ]*pop %gs
-[ ]*[a-f0-9]+: 0f aa [ ]*rsm
+[ ]*[a-f0-9]+: 0f aa [ ]*rsm
[ ]*[a-f0-9]+: 0f ab 90 90 90 90 90 [ ]*bts %edx,-0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: 0f ac 90 90 90 90 90 90 [ ]*shrd \$0x90,%edx,-0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: 0f ad 90 90 90 90 90 [ ]*shrd %cl,%edx,-0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: 0f b5 90 90 90 90 90 [ ]*lgs -0x6f6f6f70\(%eax\),%edx
[ ]*[a-f0-9]+: 0f b6 90 90 90 90 90 [ ]*movzbl -0x6f6f6f70\(%eax\),%edx
[ ]*[a-f0-9]+: 0f b7 90 90 90 90 90 [ ]*movzwl -0x6f6f6f70\(%eax\),%edx
-[ ]*[a-f0-9]+: 0f 0b [ ]*ud2[ ]*
+[ ]*[a-f0-9]+: 0f 0b [ ]*ud2
[ ]*[a-f0-9]+: 0f bb 90 90 90 90 90 [ ]*btc %edx,-0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: 0f bc 90 90 90 90 90 [ ]*bsf -0x6f6f6f70\(%eax\),%edx
[ ]*[a-f0-9]+: 0f bd 90 90 90 90 90 [ ]*bsr -0x6f6f6f70\(%eax\),%edx
[ ]*[a-f0-9]+: 66 5d [ ]*pop %bp
[ ]*[a-f0-9]+: 66 5e [ ]*pop %si
[ ]*[a-f0-9]+: 66 5f [ ]*pop %di
-[ ]*[a-f0-9]+: 66 60 [ ]*pushaw
-[ ]*[a-f0-9]+: 66 61 [ ]*popaw
+[ ]*[a-f0-9]+: 66 60 [ ]*pushaw
+[ ]*[a-f0-9]+: 66 61 [ ]*popaw
[ ]*[a-f0-9]+: 66 62 90 90 90 90 90 [ ]*bound %dx,-0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: 66 68 90 90 [ ]*pushw \$0x9090
[ ]*[a-f0-9]+: 66 69 90 90 90 90 90 90 90 [ ]*imul \$0x9090,-0x6f6f6f70\(%eax\),%dx
[ ]*[a-f0-9]+: 66 95 [ ]*xchg %ax,%bp
[ ]*[a-f0-9]+: 66 96 [ ]*xchg %ax,%si
[ ]*[a-f0-9]+: 66 97 [ ]*xchg %ax,%di
-[ ]*[a-f0-9]+: 66 98 [ ]*cbtw
-[ ]*[a-f0-9]+: 66 99 [ ]*cwtd
+[ ]*[a-f0-9]+: 66 98 [ ]*cbtw
+[ ]*[a-f0-9]+: 66 99 [ ]*cwtd
[ ]*[a-f0-9]+: 66 9a 90 90 90 90 [ ]*lcallw \$0x9090,\$0x9090
-[ ]*[a-f0-9]+: 66 9c [ ]*pushfw
-[ ]*[a-f0-9]+: 66 9d [ ]*popfw
+[ ]*[a-f0-9]+: 66 9c [ ]*pushfw
+[ ]*[a-f0-9]+: 66 9d [ ]*popfw
[ ]*[a-f0-9]+: 66 a1 90 90 90 90 [ ]*mov 0x90909090,%ax
[ ]*[a-f0-9]+: 66 a3 90 90 90 90 [ ]*mov %ax,0x90909090
[ ]*[a-f0-9]+: 66 a5 [ ]*movsw %ds:\(%esi\),%es:\(%edi\)
[ ]*[a-f0-9]+: 66 bf 90 90 [ ]*mov \$0x9090,%di
[ ]*[a-f0-9]+: 66 c1 90 90 90 90 90 90 [ ]*rclw \$0x90,-0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: 66 c2 90 90 [ ]*retw \$0x9090
-[ ]*[a-f0-9]+: 66 c3 [ ]*retw
+[ ]*[a-f0-9]+: 66 c3 [ ]*retw
[ ]*[a-f0-9]+: 66 c4 90 90 90 90 90 [ ]*les -0x6f6f6f70\(%eax\),%dx
[ ]*[a-f0-9]+: 66 c5 90 90 90 90 90 [ ]*lds -0x6f6f6f70\(%eax\),%dx
[ ]*[a-f0-9]+: 66 c7 80 90 90 90 90 90 90 [ ]*movw \$0x9090,-0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: 66 c8 90 90 90 [ ]*enterw \$0x9090,\$0x90
-[ ]*[a-f0-9]+: 66 c9 [ ]*leavew
+[ ]*[a-f0-9]+: 66 c9 [ ]*leavew
[ ]*[a-f0-9]+: 66 ca 90 90 [ ]*lretw \$0x9090
-[ ]*[a-f0-9]+: 66 cb [ ]*lretw
+[ ]*[a-f0-9]+: 66 cb [ ]*lretw
[ ]*[a-f0-9]+: 66 ca 90 90 [ ]*lretw \$0x9090
-[ ]*[a-f0-9]+: 66 cb [ ]*lretw
-[ ]*[a-f0-9]+: 66 cf [ ]*iretw
+[ ]*[a-f0-9]+: 66 cb [ ]*lretw
+[ ]*[a-f0-9]+: 66 cf [ ]*iretw
[ ]*[a-f0-9]+: 66 d1 90 90 90 90 90 [ ]*rclw -0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: 66 d3 90 90 90 90 90 [ ]*rclw %cl,-0x6f6f6f70\(%eax\)
[ ]*[a-f0-9]+: 66 e5 90 [ ]*in \$0x90,%ax
[ ]*[a-f0-9]+: 66 0f c1 90 90 90 90 90 [ ]*xadd %dx,-0x6f6f6f70\(%eax\)
[a-f0-9]+ <gs_foo>:
-[ ]*[a-f0-9]+: c3 [ ]*ret
+[ ]*[a-f0-9]+: c3 [ ]*ret
[a-f0-9]+ <short_foo>:
-[ ]*[a-f0-9]+: c3 [ ]*ret
+[ ]*[a-f0-9]+: c3 [ ]*ret
[a-f0-9]+ <bar>:
[ ]*[a-f0-9]+: e8 f9 ff ff ff [ ]*call 9d9 <gs_foo>
[ ]*[a-f0-9]+: 0e [ ]*push %cs
[ ]*[a-f0-9]+: 8b 04 5d 00 00 00 00 [ ]*mov 0x0\(,%ebx,2\),%eax
[ ]*[a-f0-9]+: 10 14 85 90 90 90 90 [ ]*adc %dl,-0x6f6f6f70\(,%eax,4\)
-[ ]*[a-f0-9]+: 2f [ ]*das
+[ ]*[a-f0-9]+: 2f [ ]*das
[ ]*[a-f0-9]+: ea 90 90 90 90 90 90 [ ]*ljmp \$0x9090,\$0x90909090
[ ]*[a-f0-9]+: 66 a5 [ ]*movsw %ds:\(%esi\),%es:\(%edi\)
[ ]*[a-f0-9]+: 70 90 [ ]*jo 9be <foo\+0x9be>
Disassembly of section .text:
0+ <gs_foo>:
-[ ]*[a-f0-9]+: c3 ret
+[ ]*[a-f0-9]+: c3 ret
0+1 <bar>:
[ ]*[a-f0-9]+: 8d 83 14 00 00 00 lea 0x14\(%ebx\),%eax
Disassembly of section \.text:
00000000 <_start>:
-[ ]*[a-f0-9]+:[ ]+0f 01 fe[ ]+invlpgb[ ]*
+[ ]*[a-f0-9]+:[ ]+0f 01 fe[ ]+invlpgb
[0-9a-f]+ <att32>:
-[ ]*[a-f0-9]+:[ ]+0f 01 fe[ ]+invlpgb[ ]*
+[ ]*[a-f0-9]+:[ ]+0f 01 fe[ ]+invlpgb
[0-9a-f]+ <att16>:
-[ ]*[a-f0-9]+:[ ]+67 0f 01 fe[ ]+addr16 invlpgb[ ]*
+[ ]*[a-f0-9]+:[ ]+67 0f 01 fe[ ]+addr16 invlpgb
[0-9a-f]+ <intel32>:
-[ ]*[a-f0-9]+:[ ]+0f 01 fe[ ]+invlpgb[ ]*
+[ ]*[a-f0-9]+:[ ]+0f 01 fe[ ]+invlpgb
[0-9a-f]+ <intel16>:
-[ ]*[a-f0-9]+:[ ]+67 0f 01 fe[ ]+addr16 invlpgb[ ]*
+[ ]*[a-f0-9]+:[ ]+67 0f 01 fe[ ]+addr16 invlpgb
#pass
Disassembly of section \.text:
0+000 <_start>:
-[ ]*[a-f0-9]+:[ ]+0f 01 fe[ ]+invlpgb[ ]*
+[ ]*[a-f0-9]+:[ ]+0f 01 fe[ ]+invlpgb
[0-9a-f]+ <att64>:
-[ ]*[a-f0-9]+:[ ]+0f 01 fe[ ]+invlpgb[ ]*
+[ ]*[a-f0-9]+:[ ]+0f 01 fe[ ]+invlpgb
[0-9a-f]+ <att32>:
-[ ]*[a-f0-9]+:[ ]+67 0f 01 fe[ ]+addr32 invlpgb[ ]*
+[ ]*[a-f0-9]+:[ ]+67 0f 01 fe[ ]+addr32 invlpgb
[0-9a-f]+ <intel64>:
-[ ]*[a-f0-9]+:[ ]+0f 01 fe[ ]+invlpgb[ ]*
+[ ]*[a-f0-9]+:[ ]+0f 01 fe[ ]+invlpgb
[0-9a-f]+ <intel32>:
-[ ]*[a-f0-9]+:[ ]+67 0f 01 fe[ ]+addr32 invlpgb[ ]*
+[ ]*[a-f0-9]+:[ ]+67 0f 01 fe[ ]+addr32 invlpgb
#pass
-#as:
+#as:
#objdump: -dwMintel
#name: i386 INVPCID insns (Intel disassembly)
#source: invpcid.s
-#as:
+#as:
#objdump: -dw
#name: i386 INVPCID insns
[ ]+117: (R_386_)?16 yyy
[ ]*[a-f0-9]+: ea 00 00 00 00 ljmp \$0x0,\$0x0 11a: (R_386_)?16 xxx
[ ]+11c: (R_386_)?16 yyy
-[ ]*[a-f0-9]+: cf iret
-[ ]*[a-f0-9]+: cf iret
-[ ]*[a-f0-9]+: 66 cf iretl
-[ ]*[a-f0-9]+: cf iret
-[ ]*[a-f0-9]+: cf iret
-[ ]*[a-f0-9]+: 66 cf iretl
+[ ]*[a-f0-9]+: cf iret
+[ ]*[a-f0-9]+: cf iret
+[ ]*[a-f0-9]+: 66 cf iretl
+[ ]*[a-f0-9]+: cf iret
+[ ]*[a-f0-9]+: cf iret
+[ ]*[a-f0-9]+: 66 cf iretl
#pass
110: f3 0f 5e 1c 24 [ ]*divss \(%esp\),%xmm3
115: 0f ae 55 00 [ ]*ldmxcsr 0x0\(%ebp\)
119: 0f ae 1e [ ]*stmxcsr \(%esi\)
- 11c: 0f ae f8 [ ]*sfence
+ 11c: 0f ae f8 [ ]*sfence
11f: 0f 5f c1 [ ]*maxps %xmm1,%xmm0
122: 0f 5f 0a [ ]*maxps \(%edx\),%xmm1
125: f3 0f 5f d3 [ ]*maxss %xmm3,%xmm2
0+ <_start>:
+[a-f0-9]+: f3 aa rep stos %al,%es:\(%edi\)
+[a-f0-9]+: 83 0c 24 00 orl \$0x0,\(%esp\)
- +[a-f0-9]+: 0f ae e8 lfence
- +[a-f0-9]+: f3 c3 repz ret
- +[a-f0-9]+: f3 c3 repz ret
- +[a-f0-9]+: f3 c3 repz ret
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: f3 c3 repz ret
+ +[a-f0-9]+: f3 c3 repz ret
+ +[a-f0-9]+: f3 c3 repz ret
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: ff d0 call \*%eax
- +[a-f0-9]+: f3 c3 repz ret
- +[a-f0-9]+: 66 66 c3 data16 retw
- +[a-f0-9]+: f3 c3 repz ret
+ +[a-f0-9]+: f3 c3 repz ret
+ +[a-f0-9]+: 66 66 c3 data16 retw
+ +[a-f0-9]+: f3 c3 repz ret
+[a-f0-9]+: 9b fwait
+[a-f0-9]+: 83 0c 24 00 orl \$0x0,\(%esp\)
- +[a-f0-9]+: 0f ae e8 lfence
- +[a-f0-9]+: f3 c3 repz ret
- +[a-f0-9]+: f3 c3 repz ret
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: f3 c3 repz ret
+ +[a-f0-9]+: f3 c3 repz ret
+ +[a-f0-9]+: c3 ret
+[a-f0-9]+: f3 ff d0 repz call \*%eax
#pass
Disassembly of section .text:
0+ <_start>:
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: ff d2 call \*%edx
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: ff e2 jmp \*%edx
+[a-f0-9]+: ff 12 call \*\(%edx\)
+[a-f0-9]+: ff 22 jmp \*\(%edx\)
Disassembly of section .text:
0+ <_start>:
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: ff d2 call \*%edx
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: ff e2 jmp \*%edx
+[a-f0-9]+: ff 12 call \*\(%edx\)
+[a-f0-9]+: ff 22 jmp \*\(%edx\)
0+ <_start>:
+[a-f0-9]+: c5 f8 ae 55 00 vldmxcsr 0x0\(%ebp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 0f 01 55 00 lgdtl 0x0\(%ebp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 0f c7 75 00 vmptrld 0x0\(%ebp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 0f c7 75 00 vmclear 0x0\(%ebp\)
+[a-f0-9]+: 66 0f 38 82 55 00 invpcid 0x0\(%ebp\),%edx
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 0f 01 7d 00 invlpg 0x0\(%ebp\)
+[a-f0-9]+: 0f ae 7d 00 clflush 0x0\(%ebp\)
+[a-f0-9]+: 66 0f ae 7d 00 clflushopt 0x0\(%ebp\)
+[a-f0-9]+: 0f 18 5d 00 prefetcht2 0x0\(%ebp\)
+[a-f0-9]+: 0f 0d 4d 00 prefetchw 0x0\(%ebp\)
+[a-f0-9]+: 1f pop %ds
- +[a-f0-9]+: 0f ae e8 lfence
- +[a-f0-9]+: 9d popf
- +[a-f0-9]+: 0f ae e8 lfence
- +[a-f0-9]+: 61 popa
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 9d popf
+ +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 61 popa
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: d7 xlat %ds:\(%ebx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: d9 55 00 fsts 0x0\(%ebp\)
+[a-f0-9]+: d9 45 00 flds 0x0\(%ebp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: db 55 00 fistl 0x0\(%ebp\)
+[a-f0-9]+: df 55 00 fists 0x0\(%ebp\)
+[a-f0-9]+: db 45 00 fildl 0x0\(%ebp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: df 45 00 filds 0x0\(%ebp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 9b dd 75 00 fsave 0x0\(%ebp\)
+[a-f0-9]+: dd 65 00 frstor 0x0\(%ebp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: df 45 00 filds 0x0\(%ebp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: df 4d 00 fisttps 0x0\(%ebp\)
+[a-f0-9]+: d9 65 00 fldenv 0x0\(%ebp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 9b d9 75 00 fstenv 0x0\(%ebp\)
+[a-f0-9]+: d8 45 00 fadds 0x0\(%ebp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: d8 04 24 fadds \(%esp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: d8 c3 fadd %st\(3\),%st
+[a-f0-9]+: d8 01 fadds \(%ecx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: df 01 filds \(%ecx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: df 11 fists \(%ecx\)
+[a-f0-9]+: 0f ae 29 xrstor \(%ecx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 0f 18 01 prefetchnta \(%ecx\)
+[a-f0-9]+: 0f c7 09 cmpxchg8b \(%ecx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 41 inc %ecx
+[a-f0-9]+: 0f 01 10 lgdtl \(%eax\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 0f 0f 66 02 b0 pfcmpeq 0x2\(%esi\),%mm4
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 8f 00 pop \(%eax\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 58 pop %eax
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 d1 11 rclw \(%ecx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: f7 01 01 00 00 00 testl \$0x1,\(%ecx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: ff 01 incl \(%ecx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: f7 11 notl \(%ecx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: f7 31 divl \(%ecx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: f7 21 mull \(%ecx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: f7 39 idivl \(%ecx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: f7 29 imull \(%ecx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 8d 04 40 lea \(%eax,%eax,2\),%eax
- +[a-f0-9]+: c9 leave
+ +[a-f0-9]+: c9 leave
+[a-f0-9]+: 6e outsb %ds:\(%esi\),\(%dx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: ac lods %ds:\(%esi\),%al
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: f3 a5 rep movsl %ds:\(%esi\),%es:\(%edi\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: f3 af repz scas %es:\(%edi\),%eax
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: f3 a7 repz cmpsl %es:\(%edi\),%ds:\(%esi\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: f3 ad rep lods %ds:\(%esi\),%eax
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 83 00 01 addl \$0x1,\(%eax\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 0f ba 20 01 btl \$0x1,\(%eax\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 0f c1 03 xadd %eax,\(%ebx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 0f c1 c3 xadd %eax,%ebx
+[a-f0-9]+: 87 03 xchg %eax,\(%ebx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 93 xchg %eax,%ebx
+[a-f0-9]+: 39 45 40 cmp %eax,0x40\(%ebp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 3b 45 40 cmp 0x40\(%ebp\),%eax
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 01 45 40 add %eax,0x40\(%ebp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 03 00 add \(%eax\),%eax
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 85 45 40 test %eax,0x40\(%ebp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 85 45 40 test %eax,0x40\(%ebp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
#pass
0+ <_start>:
+[a-f0-9]+: 66 83 0c 24 00 orw \$0x0,\(%esp\)
- +[a-f0-9]+: 0f ae e8 lfence
- +[a-f0-9]+: 66 c3 retw
+ +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 66 c3 retw
+[a-f0-9]+: 66 83 0c 24 00 orw \$0x0,\(%esp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 c2 14 00 retw \$0x14
+[a-f0-9]+: 83 0c 24 00 orl \$0x0,\(%esp\)
- +[a-f0-9]+: 0f ae e8 lfence
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: c3 ret
+[a-f0-9]+: 83 0c 24 00 orl \$0x0,\(%esp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: c2 1e 00 ret \$0x1e
#pass
0+ <_start>:
+[a-f0-9]+: 66 f7 14 24 notw \(%esp\)
+[a-f0-9]+: 66 f7 14 24 notw \(%esp\)
- +[a-f0-9]+: 0f ae e8 lfence
- +[a-f0-9]+: 66 c3 retw
+ +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 66 c3 retw
+[a-f0-9]+: 66 f7 14 24 notw \(%esp\)
+[a-f0-9]+: 66 f7 14 24 notw \(%esp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 c2 14 00 retw \$0x14
+[a-f0-9]+: f7 14 24 notl \(%esp\)
+[a-f0-9]+: f7 14 24 notl \(%esp\)
- +[a-f0-9]+: 0f ae e8 lfence
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: c3 ret
+[a-f0-9]+: f7 14 24 notl \(%esp\)
+[a-f0-9]+: f7 14 24 notl \(%esp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: c2 1e 00 ret \$0x1e
#pass
0+ <_start>:
+[a-f0-9]+: 66 83 0c 24 00 orw \$0x0,\(%esp\)
- +[a-f0-9]+: 0f ae e8 lfence
- +[a-f0-9]+: 66 c3 retw
+ +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 66 c3 retw
+[a-f0-9]+: 66 83 0c 24 00 orw \$0x0,\(%esp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 c2 14 00 retw \$0x14
+[a-f0-9]+: 83 0c 24 00 orl \$0x0,\(%esp\)
- +[a-f0-9]+: 0f ae e8 lfence
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: c3 ret
+[a-f0-9]+: 83 0c 24 00 orl \$0x0,\(%esp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: c2 1e 00 ret \$0x1e
#pass
0+ <_start>:
+[a-f0-9]+: 66 c1 24 24 00 shlw \$0x0,\(%esp\)
- +[a-f0-9]+: 0f ae e8 lfence
- +[a-f0-9]+: 66 c3 retw
+ +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 66 c3 retw
+[a-f0-9]+: 66 c1 24 24 00 shlw \$0x0,\(%esp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 c2 14 00 retw \$0x14
+[a-f0-9]+: c1 24 24 00 shll \$0x0,\(%esp\)
- +[a-f0-9]+: 0f ae e8 lfence
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: c3 ret
+[a-f0-9]+: c1 24 24 00 shll \$0x0,\(%esp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: c2 1e 00 ret \$0x1e
#pass
RELOCATION RECORDS FOR \[.text\]:
OFFSET[ ]+TYPE[ ]+VALUE[ ]*
-[0-9a-f]+[ ]+R_386_GOT32[ ]+xtrn[ ]*
-[0-9a-f]+[ ]+R_386_PLT32[ ]+xtrn[ ]*
-[0-9a-f]+[ ]+R_386_GOT32X[ ]+xtrn[ ]*
-[0-9a-f]+[ ]+R_386_PLT32[ ]+xtrn[ ]*
-[0-9a-f]+[ ]+R_386_GOT32X[ ]+xtrn[ ]*
-[0-9a-f]+[ ]+R_386_PLT32[ ]+xtrn[ ]*
+[0-9a-f]+[ ]+R_386_GOT32[ ]+xtrn
+[0-9a-f]+[ ]+R_386_PLT32[ ]+xtrn
+[0-9a-f]+[ ]+R_386_GOT32X[ ]+xtrn
+[0-9a-f]+[ ]+R_386_PLT32[ ]+xtrn
+[0-9a-f]+[ ]+R_386_GOT32X[ ]+xtrn
+[0-9a-f]+[ ]+R_386_PLT32[ ]+xtrn
RELOCATION RECORDS FOR \[.text\]:
OFFSET[ ]+TYPE[ ]+VALUE[ ]*
-[0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn[ ]*
-[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn-0x0*4[ ]*
-[0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn[ ]*
-[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn-0x0*4[ ]*
-[0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn[ ]*
-[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn-0x0*4[ ]*
+[0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn
+[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn-0x0*4
+[0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn
+[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn-0x0*4
+[0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn
+[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn-0x0*4
[ ]*[a-f0-9]+: f2 0f 84 88 01 bnd je [a-f0-9]+ <foo>
[ ]*[a-f0-9]+: f2 e9 84 01 bnd jmp [a-f0-9]+ <foo>
[ ]*[a-f0-9]+: 67 f2 ff 21 bnd jmp \*\(%ecx\)
-[ ]*[a-f0-9]+: f2 c3 bnd ret *
+[ ]*[a-f0-9]+: f2 c3 bnd ret
[ ]*[a-f0-9]+: 67 f3 0f 1b 08 bndmk \(%eax\),%bnd1
[ ]*[a-f0-9]+: 67 f3 0f 1b 0d 99 03 00 00 addr32 bndmk 0x399,%bnd1
[ ]*[a-f0-9]+: 67 f3 0f 1b 49 03 bndmk 0x3\(%ecx\),%bnd1
[ ]*[a-f0-9]+: f2 74 09 bnd je [a-f0-9]+ <foo>
[ ]*[a-f0-9]+: f2 eb 06 bnd jmp [a-f0-9]+ <foo>
[ ]*[a-f0-9]+: 66 f2 ff e1 bnd jmpl? \*%ecx
-[ ]*[a-f0-9]+: f2 c3 bnd ret *
+[ ]*[a-f0-9]+: f2 c3 bnd ret
[a-f0-9]+ <foo>:
-[ ]*[a-f0-9]+: f2 c3 bnd ret *
+[ ]*[a-f0-9]+: f2 c3 bnd ret
[a-f0-9]+ <bad>:
#...
[ ]*[a-f0-9]+: f2 74 08 bnd je 14 <foo>
[ ]*[a-f0-9]+: f2 eb 05 bnd jmp 14 <foo>
[ ]*[a-f0-9]+: f2 ff 23 bnd jmp \*\(%ebx\)
-[ ]*[a-f0-9]+: f2 c3 bnd ret
+[ ]*[a-f0-9]+: f2 c3 bnd ret
0+14 <foo>:
-[ ]*[a-f0-9]+: f2 c3 bnd ret
-[ ]*[a-f0-9]+: f2 c3 bnd ret
-[ ]*[a-f0-9]+: f2 c3 bnd ret
-[ ]*[a-f0-9]+: f2 c3 bnd ret
+[ ]*[a-f0-9]+: f2 c3 bnd ret
+[ ]*[a-f0-9]+: f2 c3 bnd ret
+[ ]*[a-f0-9]+: f2 c3 bnd ret
+[ ]*[a-f0-9]+: f2 c3 bnd ret
[ ]*[a-f0-9]+: f2 e8 f2 ff ff ff bnd call 14 <foo>
[ ]*[a-f0-9]+: 01 c3 add %eax,%ebx
[ ]*[a-f0-9]+: e2 ee loop 14 <foo>
[ ]*[a-f0-9]+: f2 0f 84 59 01 00 00 bnd je 2a9 <foo>
[ ]*[a-f0-9]+: f2 e9 53 01 00 00 bnd jmp 2a9 <foo>
[ ]*[a-f0-9]+: f2 ff 21 bnd jmp \*\(%ecx\)
-[ ]*[a-f0-9]+: f2 c3 bnd ret
+[ ]*[a-f0-9]+: f2 c3 bnd ret
[ ]*[a-f0-9]+: f3 0f 1b 08 bndmk \(%eax\),%bnd1
[ ]*[a-f0-9]+: f3 0f 1b 0d 99 03 00 00 bndmk 0x399,%bnd1
[ ]*[a-f0-9]+: f3 0f 1b 49 03 bndmk 0x3\(%ecx\),%bnd1
[ ]*[a-f0-9]+: f2 74 08 bnd je 2a9 <foo>
[ ]*[a-f0-9]+: f2 eb 05 bnd jmp 2a9 <foo>
[ ]*[a-f0-9]+: f2 ff e1 bnd jmp \*%ecx
-[ ]*[a-f0-9]+: f2 c3 bnd ret
+[ ]*[a-f0-9]+: f2 c3 bnd ret
[a-f0-9]+ <foo>:
-[ ]*[a-f0-9]+: f2 c3 bnd ret
+[ ]*[a-f0-9]+: f2 c3 bnd ret
[a-f0-9]+ <bad>:
[ ]*[a-f0-9]+: 0f 1a 30 bndldx \(%eax\),\(bad\)
[ ]*[a-f0-9]+: c4 e3 79 48 00 00 vpermil2ps \$0x0,%xmm0,\(%eax\),%xmm0,%xmm0
[ ]*[a-f0-9]+: c4 e3 39 48 00 00 vpermil2ps \$0x0,%xmm0,\(%eax\),%xmm0,%xmm0
[ ]*[a-f0-9]+: c4 e3 79 48 00 80 vpermil2ps \$0x0,%xmm0,\(%eax\),%xmm0,%xmm0
-[ ]*[a-f0-9]+: c3 ret[ ]*
+[ ]*[a-f0-9]+: c3 ret
#pass
+[a-f0-9]+: f3 0f 1e f7 repz nop %edi
+[a-f0-9]+: f3 0f 1e f8 repz nop %eax
+[a-f0-9]+: f3 0f 1e f9 repz nop %ecx
- +[a-f0-9]+: f3 0f 1e fa endbr64 *
- +[a-f0-9]+: f3 0f 1e fb endbr32 *
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fb endbr32
+[a-f0-9]+: f3 0f 1e fc repz nop %esp
+[a-f0-9]+: f3 0f 1e fd repz nop %ebp
+[a-f0-9]+: f3 0f 1e fe repz nop %esi
*[a-f0-9]+: 66 ff 00 incw \(%rax\)
*[a-f0-9]+: 66 6d insw \(%dx\),%es:\(%rdi\)
*[a-f0-9]+: 66 6d insw \(%dx\),%es:\(%rdi\)
- *[a-f0-9]+: 66 cf iretw *
+ *[a-f0-9]+: 66 cf iretw
*[a-f0-9]+: 66 ff 20 jmpw \*\(%rax\)
*[a-f0-9]+: 66 ff 18 lcallw \*\(%rax\)
*[a-f0-9]+: 66 0f 01 10 data16 lgdt \(%rax\)
*[a-f0-9]+: 66 0f 01 30 data16 lmsw \(%rax\)
*[a-f0-9]+: 66 ad lods %ds:\(%rsi\),%ax
*[a-f0-9]+: 66 ad lods %ds:\(%rsi\),%ax
- *[a-f0-9]+: 66 cb lretw *
+ *[a-f0-9]+: 66 cb lretw
*[a-f0-9]+: 66 ca 04 00 lretw \$0x4
*[a-f0-9]+: 66 0f 00 18 data16 ltr \(%rax\)
*[a-f0-9]+: 66 c7 00 12 00 movw \$0x12,\(%rax\)
*[a-f0-9]+: 66 81 28 89 00 subw \$0x89,\(%rax\)
*[a-f0-9]+: 66 81 28 34 12 subw \$0x1234,\(%rax\)
*[a-f0-9]+: 66 81 28 78 56 subw \$0x5678,\(%rax\)
- *[a-f0-9]+: 66 0f 35 data16 sysexitl *
- *[a-f0-9]+: 66 0f 07 data16 sysretl *
+ *[a-f0-9]+: 66 0f 35 data16 sysexitl
+ *[a-f0-9]+: 66 0f 07 data16 sysretl
*[a-f0-9]+: 66 f7 00 89 00 testw \$0x89,\(%rax\)
*[a-f0-9]+: 66 f7 00 34 12 testw \$0x1234,\(%rax\)
*[a-f0-9]+: 66 f7 00 78 56 testw \$0x5678,\(%rax\)
*[a-f0-9]+: 48 ff 00 incq \(%rax\)
*[a-f0-9]+: 48 6d rex\.W insl \(%dx\),%es:\(%rdi\)
*[a-f0-9]+: 48 6d rex\.W insl \(%dx\),%es:\(%rdi\)
- *[a-f0-9]+: 48 cf iretq *
+ *[a-f0-9]+: 48 cf iretq
*[a-f0-9]+: 48 ff 20 rex\.W jmp \*\(%rax\)
*[a-f0-9]+: 48 ff 18 rex\.W lcall \*\(%rax\)
*[a-f0-9]+: 48 0f 01 10 rex\.W lgdt \(%rax\)
*[a-f0-9]+: 48 0f 01 30 rex\.W lmsw \(%rax\)
*[a-f0-9]+: 48 ad lods %ds:\(%rsi\),%rax
*[a-f0-9]+: 48 ad lods %ds:\(%rsi\),%rax
- *[a-f0-9]+: 48 cb lretq *
+ *[a-f0-9]+: 48 cb lretq
*[a-f0-9]+: 48 ca 04 00 lretq \$0x4
*[a-f0-9]+: 48 0f 00 18 rex\.W ltr \(%rax\)
*[a-f0-9]+: 48 c7 00 12 00 00 00 movq \$0x12,\(%rax\)
*[a-f0-9]+: 48 81 28 89 00 00 00 subq \$0x89,\(%rax\)
*[a-f0-9]+: 48 81 28 34 12 00 00 subq \$0x1234,\(%rax\)
*[a-f0-9]+: 48 81 28 78 56 34 12 subq \$0x12345678,\(%rax\)
- *[a-f0-9]+: 48 0f 35 sysexitq *
- *[a-f0-9]+: 48 0f 07 sysretq *
+ *[a-f0-9]+: 48 0f 35 sysexitq
+ *[a-f0-9]+: 48 0f 07 sysretq
*[a-f0-9]+: 48 f7 00 89 00 00 00 testq \$0x89,\(%rax\)
*[a-f0-9]+: 48 f7 00 34 12 00 00 testq \$0x1234,\(%rax\)
*[a-f0-9]+: 48 f7 00 78 56 34 12 testq \$0x12345678,\(%rax\)
*[a-f0-9]+: ff 00 incl \(%rax\)
*[a-f0-9]+: 6d insl \(%dx\),%es:\(%rdi\)
*[a-f0-9]+: 6d insl \(%dx\),%es:\(%rdi\)
- *[a-f0-9]+: cf iret *
+ *[a-f0-9]+: cf iret
*[a-f0-9]+: ff 20 jmp \*\(%rax\)
*[a-f0-9]+: ff 18 lcall \*\(%rax\)
*[a-f0-9]+: 0f 01 10 lgdt \(%rax\)
*[a-f0-9]+: 0f 01 30 lmsw \(%rax\)
*[a-f0-9]+: ad lods %ds:\(%rsi\),%eax
*[a-f0-9]+: ad lods %ds:\(%rsi\),%eax
- *[a-f0-9]+: cb lret *
+ *[a-f0-9]+: cb lret
*[a-f0-9]+: ca 04 00 lret \$0x4
*[a-f0-9]+: 0f 00 18 ltr \(%rax\)
*[a-f0-9]+: c7 00 12 00 00 00 movl \$0x12,\(%rax\)
*[a-f0-9]+: 81 28 89 00 00 00 subl \$0x89,\(%rax\)
*[a-f0-9]+: 81 28 34 12 00 00 subl \$0x1234,\(%rax\)
*[a-f0-9]+: 81 28 78 56 34 12 subl \$0x12345678,\(%rax\)
- *[a-f0-9]+: 0f 35 sysexitl *
- *[a-f0-9]+: 0f 07 sysretl *
+ *[a-f0-9]+: 0f 35 sysexitl
+ *[a-f0-9]+: 0f 07 sysretl
*[a-f0-9]+: f7 00 89 00 00 00 testl \$0x89,\(%rax\)
*[a-f0-9]+: f7 00 34 12 00 00 testl \$0x1234,\(%rax\)
*[a-f0-9]+: f7 00 78 56 34 12 testl \$0x12345678,\(%rax\)
*[0-9a-f]+: 23 90 90 90 90 90[ ]+and[ ]+edx,(DWORD PTR )?\[eax-0x6f6f6f70\]
*[0-9a-f]+: 24 90[ ]+and[ ]+al,0x90
*[0-9a-f]+: 25 90 90 90 90[ ]+and[ ]+eax,0x90909090
- *[0-9a-f]+: 27[ ]+daa[ ]*
+ *[0-9a-f]+: 27[ ]+daa
*[0-9a-f]+: 28 90 90 90 90 90[ ]+sub[ ]+(BYTE PTR )?\[eax-0x6f6f6f70\],dl
*[0-9a-f]+: 29 90 90 90 90 90[ ]+sub[ ]+(DWORD PTR )?\[eax-0x6f6f6f70\],edx
*[0-9a-f]+: 2a 90 90 90 90 90[ ]+sub[ ]+dl,(BYTE PTR )?\[eax-0x6f6f6f70\]
*[0-9a-f]+: 2b 90 90 90 90 90[ ]+sub[ ]+edx,(DWORD PTR )?\[eax-0x6f6f6f70\]
*[0-9a-f]+: 2c 90[ ]+sub[ ]+al,0x90
*[0-9a-f]+: 2d 90 90 90 90[ ]+sub[ ]+eax,0x90909090
- *[0-9a-f]+: 2f[ ]+das[ ]*
+ *[0-9a-f]+: 2f[ ]+das
*[0-9a-f]+: 30 90 90 90 90 90[ ]+xor[ ]+(BYTE PTR )?\[eax-0x6f6f6f70\],dl
*[0-9a-f]+: 31 90 90 90 90 90[ ]+xor[ ]+(DWORD PTR )?\[eax-0x6f6f6f70\],edx
*[0-9a-f]+: 32 90 90 90 90 90[ ]+xor[ ]+dl,(BYTE PTR )?\[eax-0x6f6f6f70\]
*[0-9a-f]+: 33 90 90 90 90 90[ ]+xor[ ]+edx,(DWORD PTR )?\[eax-0x6f6f6f70\]
*[0-9a-f]+: 34 90[ ]+xor[ ]+al,0x90
*[0-9a-f]+: 35 90 90 90 90[ ]+xor[ ]+eax,0x90909090
- *[0-9a-f]+: 37[ ]+aaa[ ]*
+ *[0-9a-f]+: 37[ ]+aaa
*[0-9a-f]+: 38 90 90 90 90 90[ ]+cmp[ ]+(BYTE PTR )?\[eax-0x6f6f6f70\],dl
*[0-9a-f]+: 39 90 90 90 90 90[ ]+cmp[ ]+(DWORD PTR )?\[eax-0x6f6f6f70\],edx
*[0-9a-f]+: 3a 90 90 90 90 90[ ]+cmp[ ]+dl,(BYTE PTR )?\[eax-0x6f6f6f70\]
*[0-9a-f]+: 3b 90 90 90 90 90[ ]+cmp[ ]+edx,(DWORD PTR )?\[eax-0x6f6f6f70\]
*[0-9a-f]+: 3c 90[ ]+cmp[ ]+al,0x90
*[0-9a-f]+: 3d 90 90 90 90[ ]+cmp[ ]+eax,0x90909090
- *[0-9a-f]+: 3f[ ]+aas[ ]*
+ *[0-9a-f]+: 3f[ ]+aas
*[0-9a-f]+: 40[ ]+inc[ ]+eax
*[0-9a-f]+: 41[ ]+inc[ ]+ecx
*[0-9a-f]+: 42[ ]+inc[ ]+edx
*[0-9a-f]+: 5d[ ]+pop[ ]+ebp
*[0-9a-f]+: 5e[ ]+pop[ ]+esi
*[0-9a-f]+: 5f[ ]+pop[ ]+edi
- *[0-9a-f]+: 60[ ]+pusha[ ]*
- *[0-9a-f]+: 61[ ]+popa[ ]*
+ *[0-9a-f]+: 60[ ]+pusha
+ *[0-9a-f]+: 61[ ]+popa
*[0-9a-f]+: 62 90 90 90 90 90[ ]+bound[ ]+edx,(QWORD PTR )?\[eax-0x6f6f6f70\]
*[0-9a-f]+: 63 90 90 90 90 90[ ]+arpl[ ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx
*[0-9a-f]+: 68 90 90 90 90[ ]+push[ ]+0x90909090
*[0-9a-f]+: 8d 90 90 90 90 90[ ]+lea[ ]+edx,\[eax-0x6f6f6f70\]
*[0-9a-f]+: 8e 90 90 90 90 90[ ]+mov[ ]+ss,(WORD PTR )?\[eax-0x6f6f6f70\]
*[0-9a-f]+: 8f 80 90 90 90 90[ ]+pop[ ]+DWORD PTR \[eax-0x6f6f6f70\]
- *[0-9a-f]+: 90[ ]+nop[ ]*
+ *[0-9a-f]+: 90[ ]+nop
*[0-9a-f]+: 91[ ]+xchg[ ]+ecx,eax
*[0-9a-f]+: 92[ ]+xchg[ ]+edx,eax
*[0-9a-f]+: 93[ ]+xchg[ ]+ebx,eax
*[0-9a-f]+: 95[ ]+xchg[ ]+ebp,eax
*[0-9a-f]+: 96[ ]+xchg[ ]+esi,eax
*[0-9a-f]+: 97[ ]+xchg[ ]+edi,eax
- *[0-9a-f]+: 98[ ]+cwde[ ]*
- *[0-9a-f]+: 99[ ]+cdq[ ]*
+ *[0-9a-f]+: 98[ ]+cwde
+ *[0-9a-f]+: 99[ ]+cdq
*[0-9a-f]+: 9a 90 90 90 90 90 90[ ]+call[ ]+0x9090:0x90909090
*[0-9a-f]+: 9b[ ]+fwait
- *[0-9a-f]+: 9c[ ]+pushf[ ]*
- *[0-9a-f]+: 9d[ ]+popf[ ]*
- *[0-9a-f]+: 9e[ ]+sahf[ ]*
- *[0-9a-f]+: 9f[ ]+lahf[ ]*
+ *[0-9a-f]+: 9c[ ]+pushf
+ *[0-9a-f]+: 9d[ ]+popf
+ *[0-9a-f]+: 9e[ ]+sahf
+ *[0-9a-f]+: 9f[ ]+lahf
*[0-9a-f]+: a0 90 90 90 90[ ]+mov[ ]+al,ds:0x90909090
*[0-9a-f]+: a1 90 90 90 90[ ]+mov[ ]+eax,ds:0x90909090
*[0-9a-f]+: a2 90 90 90 90[ ]+mov[ ]+ds:0x90909090,al
*[0-9a-f]+: c0 90 90 90 90 90 90[ ]+rcl[ ]+BYTE PTR \[eax-0x6f6f6f70\],0x90
*[0-9a-f]+: c1 90 90 90 90 90 90[ ]+rcl[ ]+DWORD PTR \[eax-0x6f6f6f70\],0x90
*[0-9a-f]+: c2 90 90[ ]+ret[ ]+0x9090
- *[0-9a-f]+: c3[ ]+ret[ ]*
+ *[0-9a-f]+: c3[ ]+ret
*[0-9a-f]+: c4 90 90 90 90 90[ ]+les[ ]+edx,(FWORD PTR )?\[eax-0x6f6f6f70\]
*[0-9a-f]+: c5 90 90 90 90 90[ ]+lds[ ]+edx,(FWORD PTR )?\[eax-0x6f6f6f70\]
*[0-9a-f]+: c6 80 90 90 90 90 90[ ]+mov[ ]+BYTE PTR \[eax-0x6f6f6f70\],0x90
*[0-9a-f]+: c7 80 90 90 90 90 90 90 90 90[ ]+mov[ ]+DWORD PTR \[eax-0x6f6f6f70\],0x90909090
*[0-9a-f]+: c8 90 90 90[ ]+enter[ ]+0x9090,0x90
- *[0-9a-f]+: c9[ ]+leave[ ]*
+ *[0-9a-f]+: c9[ ]+leave
*[0-9a-f]+: ca 90 90[ ]+retf[ ]+0x9090
- *[0-9a-f]+: cb[ ]+retf[ ]*
- *[0-9a-f]+: cc[ ]+int3[ ]*
+ *[0-9a-f]+: cb[ ]+retf
+ *[0-9a-f]+: cc[ ]+int3
*[0-9a-f]+: cd 90[ ]+int[ ]+0x90
- *[0-9a-f]+: ce[ ]+into[ ]*
- *[0-9a-f]+: cf[ ]+iret[ ]*
+ *[0-9a-f]+: ce[ ]+into
+ *[0-9a-f]+: cf[ ]+iret
*[0-9a-f]+: d0 90 90 90 90 90[ ]+rcl[ ]+BYTE PTR \[eax-0x6f6f6f70\],1
*[0-9a-f]+: d1 90 90 90 90 90[ ]+rcl[ ]+DWORD PTR \[eax-0x6f6f6f70\],1
*[0-9a-f]+: d2 90 90 90 90 90[ ]+rcl[ ]+BYTE PTR \[eax-0x6f6f6f70\],cl
*[0-9a-f]+: ed[ ]+in[ ]+eax,dx
*[0-9a-f]+: ee[ ]+out[ ]+dx,al
*[0-9a-f]+: ef[ ]+out[ ]+dx,eax
- *[0-9a-f]+: f4[ ]+hlt[ ]*
- *[0-9a-f]+: f5[ ]+cmc[ ]*
+ *[0-9a-f]+: f4[ ]+hlt
+ *[0-9a-f]+: f5[ ]+cmc
*[0-9a-f]+: f6 90 90 90 90 90[ ]+not[ ]+BYTE PTR \[eax-0x6f6f6f70\]
*[0-9a-f]+: f7 90 90 90 90 90[ ]+not[ ]+DWORD PTR \[eax-0x6f6f6f70\]
- *[0-9a-f]+: f8[ ]+clc[ ]*
- *[0-9a-f]+: f9[ ]+stc[ ]*
- *[0-9a-f]+: fa[ ]+cli[ ]*
- *[0-9a-f]+: fb[ ]+sti[ ]*
- *[0-9a-f]+: fc[ ]+cld[ ]*
- *[0-9a-f]+: fd[ ]+std[ ]*
+ *[0-9a-f]+: f8[ ]+clc
+ *[0-9a-f]+: f9[ ]+stc
+ *[0-9a-f]+: fa[ ]+cli
+ *[0-9a-f]+: fb[ ]+sti
+ *[0-9a-f]+: fc[ ]+cld
+ *[0-9a-f]+: fd[ ]+std
*[0-9a-f]+: ff 90 90 90 90 90[ ]+call[ ]+DWORD PTR \[eax-0x6f6f6f70\]
*[0-9a-f]+: 0f 00 90 90 90 90 90[ ]+lldt[ ]+(WORD PTR )?\[eax-0x6f6f6f70\]
*[0-9a-f]+: 0f 01 90 90 90 90 90[ ]+lgdtd[ ]+\[eax-0x6f6f6f70\]
*[0-9a-f]+: 0f 02 90 90 90 90 90[ ]+lar[ ]+edx,(WORD PTR )?\[eax-0x6f6f6f70\]
*[0-9a-f]+: 0f 03 90 90 90 90 90[ ]+lsl[ ]+edx,(WORD PTR )?\[eax-0x6f6f6f70\]
- *[0-9a-f]+: 0f 06[ ]+clts[ ]*
- *[0-9a-f]+: 0f 08[ ]+invd[ ]*
- *[0-9a-f]+: 0f 09[ ]+wbinvd[ ]*
- *[0-9a-f]+: 0f 0b[ ]+ud2[ ]*
+ *[0-9a-f]+: 0f 06[ ]+clts
+ *[0-9a-f]+: 0f 08[ ]+invd
+ *[0-9a-f]+: 0f 09[ ]+wbinvd
+ *[0-9a-f]+: 0f 0b[ ]+ud2
*[0-9a-f]+: 0f 20 d0[ ]+mov[ ]+eax,cr2
*[0-9a-f]+: 0f 21 d0[ ]+mov[ ]+eax,dr2
*[0-9a-f]+: 0f 22 d0[ ]+mov[ ]+cr2,eax
*[0-9a-f]+: 0f 23 d0[ ]+mov[ ]+dr2,eax
*[0-9a-f]+: 0f 24 d0[ ]+mov[ ]+eax,tr2
*[0-9a-f]+: 0f 26 d0[ ]+mov[ ]+tr2,eax
- *[0-9a-f]+: 0f 30[ ]+wrmsr[ ]*
- *[0-9a-f]+: 0f 31[ ]+rdtsc[ ]*
- *[0-9a-f]+: 0f 32[ ]+rdmsr[ ]*
- *[0-9a-f]+: 0f 33[ ]+rdpmc[ ]*
+ *[0-9a-f]+: 0f 30[ ]+wrmsr
+ *[0-9a-f]+: 0f 31[ ]+rdtsc
+ *[0-9a-f]+: 0f 32[ ]+rdmsr
+ *[0-9a-f]+: 0f 33[ ]+rdpmc
*[0-9a-f]+: 0f 40 90 90 90 90 90[ ]+cmovo[ ]+edx,(DWORD PTR )?\[eax-0x6f6f6f70\]
*[0-9a-f]+: 0f 41 90 90 90 90 90[ ]+cmovno[ ]+edx,(DWORD PTR )?\[eax-0x6f6f6f70\]
*[0-9a-f]+: 0f 42 90 90 90 90 90[ ]+cmovb[ ]+edx,(DWORD PTR )?\[eax-0x6f6f6f70\]
*[0-9a-f]+: 0f 74 90 90 90 90 90[ ]+pcmpeqb[ ]+mm2,(QWORD PTR )?\[eax-0x6f6f6f70\]
*[0-9a-f]+: 0f 75 90 90 90 90 90[ ]+pcmpeqw[ ]+mm2,(QWORD PTR )?\[eax-0x6f6f6f70\]
*[0-9a-f]+: 0f 76 90 90 90 90 90[ ]+pcmpeqd[ ]+mm2,(QWORD PTR )?\[eax-0x6f6f6f70\]
- *[0-9a-f]+: 0f 77[ ]+emms[ ]*
+ *[0-9a-f]+: 0f 77[ ]+emms
*[0-9a-f]+: 0f 7e 90 90 90 90 90[ ]+movd[ ]+(DWORD PTR )?\[eax-0x6f6f6f70\],mm2
*[0-9a-f]+: 0f 7f 90 90 90 90 90[ ]+movq[ ]+(QWORD PTR )?\[eax-0x6f6f6f70\],mm2
*[0-9a-f]+: 0f 80 90 90 90 90[ ]+jo[ ]+909094e2 <foo\+0x909094e2>
*[0-9a-f]+: 0f 9f 80 90 90 90 90[ ]+setg[ ]+(BYTE PTR )?\[eax-0x6f6f6f70\]
*[0-9a-f]+: 0f a0[ ]+push[ ]+fs
*[0-9a-f]+: 0f a1[ ]+pop[ ]+fs
- *[0-9a-f]+: 0f a2[ ]+cpuid[ ]*
+ *[0-9a-f]+: 0f a2[ ]+cpuid
*[0-9a-f]+: 0f a3 90 90 90 90 90[ ]+bt[ ]+(DWORD PTR )?\[eax-0x6f6f6f70\],edx
*[0-9a-f]+: 0f a4 90 90 90 90 90 90[ ]+shld[ ]+(DWORD PTR )?\[eax-0x6f6f6f70\],edx,0x90
*[0-9a-f]+: 0f a5 90 90 90 90 90[ ]+shld[ ]+(DWORD PTR )?\[eax-0x6f6f6f70\],edx,cl
*[0-9a-f]+: 0f a8[ ]+push[ ]+gs
*[0-9a-f]+: 0f a9[ ]+pop[ ]+gs
- *[0-9a-f]+: 0f aa[ ]+rsm[ ]*
+ *[0-9a-f]+: 0f aa[ ]+rsm
*[0-9a-f]+: 0f ab 90 90 90 90 90[ ]+bts[ ]+(DWORD PTR )?\[eax-0x6f6f6f70\],edx
*[0-9a-f]+: 0f ac 90 90 90 90 90 90[ ]+shrd[ ]+(DWORD PTR )?\[eax-0x6f6f6f70\],edx,0x90
*[0-9a-f]+: 0f ad 90 90 90 90 90[ ]+shrd[ ]+(DWORD PTR )?\[eax-0x6f6f6f70\],edx,cl
*[0-9a-f]+: 0f b5 90 90 90 90 90[ ]+lgs[ ]+edx,(FWORD PTR )?\[eax-0x6f6f6f70\]
*[0-9a-f]+: 0f b6 90 90 90 90 90[ ]+movzx[ ]+edx,BYTE PTR \[eax-0x6f6f6f70\]
*[0-9a-f]+: 0f b7 90 90 90 90 90[ ]+movzx[ ]+edx,WORD PTR \[eax-0x6f6f6f70\]
- *[0-9a-f]+: 0f 0b[ ]+ud2[ ]*
+ *[0-9a-f]+: 0f 0b[ ]+ud2
*[0-9a-f]+: 0f bb 90 90 90 90 90[ ]+btc[ ]+(DWORD PTR )?\[eax-0x6f6f6f70\],edx
*[0-9a-f]+: 0f bc 90 90 90 90 90[ ]+bsf[ ]+edx,(DWORD PTR )?\[eax-0x6f6f6f70\]
*[0-9a-f]+: 0f bd 90 90 90 90 90[ ]+bsr[ ]+edx,(DWORD PTR )?\[eax-0x6f6f6f70\]
*[0-9a-f]+: 66 5d[ ]+pop[ ]+bp
*[0-9a-f]+: 66 5e[ ]+pop[ ]+si
*[0-9a-f]+: 66 5f[ ]+pop[ ]+di
- *[0-9a-f]+: 66 60[ ]+pushaw[ ]*
- *[0-9a-f]+: 66 61[ ]+popaw[ ]*
+ *[0-9a-f]+: 66 60[ ]+pushaw
+ *[0-9a-f]+: 66 61[ ]+popaw
*[0-9a-f]+: 66 62 90 90 90 90 90[ ]+bound[ ]+dx,(DWORD PTR )?\[eax-0x6f6f6f70\]
*[0-9a-f]+: 66 68 90 90[ ]+pushw[ ]+0x9090
*[0-9a-f]+: 66 69 90 90 90 90 90 90 90[ ]+imul[ ]+dx,(WORD PTR )?\[eax-0x6f6f6f70\],0x9090
*[0-9a-f]+: 66 95[ ]+xchg[ ]+bp,ax
*[0-9a-f]+: 66 96[ ]+xchg[ ]+si,ax
*[0-9a-f]+: 66 97[ ]+xchg[ ]+di,ax
- *[0-9a-f]+: 66 98[ ]+cbw[ ]*
- *[0-9a-f]+: 66 99[ ]+cwd[ ]*
+ *[0-9a-f]+: 66 98[ ]+cbw
+ *[0-9a-f]+: 66 99[ ]+cwd
*[0-9a-f]+: 66 9a 90 90 90 90[ ]+call[ ]+0x9090:0x9090
- *[0-9a-f]+: 66 9c[ ]+pushfw[ ]*
- *[0-9a-f]+: 66 9d[ ]+popfw[ ]*
+ *[0-9a-f]+: 66 9c[ ]+pushfw
+ *[0-9a-f]+: 66 9d[ ]+popfw
*[0-9a-f]+: 66 a1 90 90 90 90[ ]+mov[ ]+ax,ds:0x90909090
*[0-9a-f]+: 66 a3 90 90 90 90[ ]+mov[ ]+ds:0x90909090,ax
*[0-9a-f]+: 66 a5[ ]+movs[ ]+WORD PTR es:\[edi\],(WORD PTR )?ds:\[esi\]
*[0-9a-f]+: 66 bf 90 90[ ]+mov[ ]+di,0x9090
*[0-9a-f]+: 66 c1 90 90 90 90 90 90[ ]+rcl[ ]+WORD PTR \[eax-0x6f6f6f70\],0x90
*[0-9a-f]+: 66 c2 90 90[ ]+retw[ ]+0x9090
- *[0-9a-f]+: 66 c3[ ]+retw[ ]*
+ *[0-9a-f]+: 66 c3[ ]+retw
*[0-9a-f]+: 66 c4 90 90 90 90 90[ ]+les[ ]+dx,(DWORD PTR )?\[eax-0x6f6f6f70\]
*[0-9a-f]+: 66 c5 90 90 90 90 90[ ]+lds[ ]+dx,(DWORD PTR )?\[eax-0x6f6f6f70\]
*[0-9a-f]+: 66 c7 80 90 90 90 90 90 90[ ]+mov[ ]+WORD PTR \[eax-0x6f6f6f70\],0x9090
*[0-9a-f]+: 66 c8 90 90 90[ ]+enterw[ ]+0x9090,0x90
- *[0-9a-f]+: 66 c9[ ]+leavew[ ]*
+ *[0-9a-f]+: 66 c9[ ]+leavew
*[0-9a-f]+: 66 ca 90 90[ ]+retfw[ ]+0x9090
- *[0-9a-f]+: 66 cb[ ]+retfw[ ]*
- *[0-9a-f]+: 66 cf[ ]+iretw[ ]*
+ *[0-9a-f]+: 66 cb[ ]+retfw
+ *[0-9a-f]+: 66 cf[ ]+iretw
*[0-9a-f]+: 66 d1 90 90 90 90 90[ ]+rcl[ ]+WORD PTR \[eax-0x6f6f6f70\],1
*[0-9a-f]+: 66 d3 90 90 90 90 90[ ]+rcl[ ]+WORD PTR \[eax-0x6f6f6f70\],cl
*[0-9a-f]+: 66 e5 90[ ]+in[ ]+ax,0x90
*[0-9a-f]+: 85 c3 [ ]*test[ ]+ebx,eax
*[0-9a-f]+: 85 d8 [ ]*test[ ]+eax,ebx
*[0-9a-f]+: 85 18 [ ]*test[ ]+(DWORD PTR )?\[eax\],ebx
- *[0-9a-f]+: f1[ ]+int1[ ]+
+ *[0-9a-f]+: f1[ ]+int1
[ ]*[a-f0-9]+: 0f 4a 90 90 90 90 90 cmovp edx,DWORD PTR \[eax-0x6f6f6f70\]
[ ]*[a-f0-9]+: 0f 4b 90 90 90 90 90 cmovnp edx,DWORD PTR \[eax-0x6f6f6f70\]
[ ]*[a-f0-9]+: 66 0f 4a 90 90 90 90 90 cmovp dx,WORD PTR \[eax-0x6f6f6f70\]
*[0-9a-f]+: 23 90 90 90 90 90[ ]+andl[ ]+-0x6f6f6f70\(%eax\),%edx
*[0-9a-f]+: 24 90[ ]+andb[ ]+\$0x90,%al
*[0-9a-f]+: 25 90 90 90 90[ ]+andl[ ]+\$0x90909090,%eax
- *[0-9a-f]+: 27[ ]+daa[ ]+
+ *[0-9a-f]+: 27[ ]+daa
*[0-9a-f]+: 28 90 90 90 90 90[ ]+subb[ ]+%dl,-0x6f6f6f70\(%eax\)
*[0-9a-f]+: 29 90 90 90 90 90[ ]+subl[ ]+%edx,-0x6f6f6f70\(%eax\)
*[0-9a-f]+: 2a 90 90 90 90 90[ ]+subb[ ]+-0x6f6f6f70\(%eax\),%dl
*[0-9a-f]+: 2b 90 90 90 90 90[ ]+subl[ ]+-0x6f6f6f70\(%eax\),%edx
*[0-9a-f]+: 2c 90[ ]+subb[ ]+\$0x90,%al
*[0-9a-f]+: 2d 90 90 90 90[ ]+subl[ ]+\$0x90909090,%eax
- *[0-9a-f]+: 2f[ ]+das[ ]+
+ *[0-9a-f]+: 2f[ ]+das
*[0-9a-f]+: 30 90 90 90 90 90[ ]+xorb[ ]+%dl,-0x6f6f6f70\(%eax\)
*[0-9a-f]+: 31 90 90 90 90 90[ ]+xorl[ ]+%edx,-0x6f6f6f70\(%eax\)
*[0-9a-f]+: 32 90 90 90 90 90[ ]+xorb[ ]+-0x6f6f6f70\(%eax\),%dl
*[0-9a-f]+: 33 90 90 90 90 90[ ]+xorl[ ]+-0x6f6f6f70\(%eax\),%edx
*[0-9a-f]+: 34 90[ ]+xorb[ ]+\$0x90,%al
*[0-9a-f]+: 35 90 90 90 90[ ]+xorl[ ]+\$0x90909090,%eax
- *[0-9a-f]+: 37[ ]+aaa[ ]+
+ *[0-9a-f]+: 37[ ]+aaa
*[0-9a-f]+: 38 90 90 90 90 90[ ]+cmpb[ ]+%dl,-0x6f6f6f70\(%eax\)
*[0-9a-f]+: 39 90 90 90 90 90[ ]+cmpl[ ]+%edx,-0x6f6f6f70\(%eax\)
*[0-9a-f]+: 3a 90 90 90 90 90[ ]+cmpb[ ]+-0x6f6f6f70\(%eax\),%dl
*[0-9a-f]+: 3b 90 90 90 90 90[ ]+cmpl[ ]+-0x6f6f6f70\(%eax\),%edx
*[0-9a-f]+: 3c 90[ ]+cmpb[ ]+\$0x90,%al
*[0-9a-f]+: 3d 90 90 90 90[ ]+cmpl[ ]+\$0x90909090,%eax
- *[0-9a-f]+: 3f[ ]+aas[ ]+
+ *[0-9a-f]+: 3f[ ]+aas
*[0-9a-f]+: 40[ ]+incl[ ]+%eax
*[0-9a-f]+: 41[ ]+incl[ ]+%ecx
*[0-9a-f]+: 42[ ]+incl[ ]+%edx
*[0-9a-f]+: 5d[ ]+popl[ ]+%ebp
*[0-9a-f]+: 5e[ ]+popl[ ]+%esi
*[0-9a-f]+: 5f[ ]+popl[ ]+%edi
- *[0-9a-f]+: 60[ ]+pushal
- *[0-9a-f]+: 61[ ]+popal[ ]+
+ *[0-9a-f]+: 60[ ]+pushal
+ *[0-9a-f]+: 61[ ]+popal
*[0-9a-f]+: 62 90 90 90 90 90[ ]+boundl %edx,-0x6f6f6f70\(%eax\)
*[0-9a-f]+: 63 90 90 90 90 90[ ]+arpl[ ]+%dx,-0x6f6f6f70\(%eax\)
*[0-9a-f]+: 68 90 90 90 90[ ]+pushl[ ]+\$0x90909090
*[0-9a-f]+: 95[ ]+xchgl[ ]+%eax,%ebp
*[0-9a-f]+: 96[ ]+xchgl[ ]+%eax,%esi
*[0-9a-f]+: 97[ ]+xchgl[ ]+%eax,%edi
- *[0-9a-f]+: 98[ ]+cwtl[ ]+
- *[0-9a-f]+: 99[ ]+cltd[ ]+
+ *[0-9a-f]+: 98[ ]+cwtl
+ *[0-9a-f]+: 99[ ]+cltd
*[0-9a-f]+: 9a 90 90 90 90 90 90[ ]+lcalll \$0x9090,\$0x90909090
*[0-9a-f]+: 9b[ ]+fwait
- *[0-9a-f]+: 9c[ ]+pushfl
- *[0-9a-f]+: 9d[ ]+popfl[ ]+
- *[0-9a-f]+: 9e[ ]+sahf[ ]+
- *[0-9a-f]+: 9f[ ]+lahf[ ]+
+ *[0-9a-f]+: 9c[ ]+pushfl
+ *[0-9a-f]+: 9d[ ]+popfl
+ *[0-9a-f]+: 9e[ ]+sahf
+ *[0-9a-f]+: 9f[ ]+lahf
*[0-9a-f]+: a0 90 90 90 90[ ]+movb[ ]+0x90909090,%al
*[0-9a-f]+: a1 90 90 90 90[ ]+movl[ ]+0x90909090,%eax
*[0-9a-f]+: a2 90 90 90 90[ ]+movb[ ]+%al,0x90909090
*[0-9a-f]+: c0 90 90 90 90 90 90[ ]+rclb[ ]+\$0x90,-0x6f6f6f70\(%eax\)
*[0-9a-f]+: c1 90 90 90 90 90 90[ ]+rcll[ ]+\$0x90,-0x6f6f6f70\(%eax\)
*[0-9a-f]+: c2 90 90[ ]+retl[ ]+\$0x9090
- *[0-9a-f]+: c3[ ]+retl[ ]+
+ *[0-9a-f]+: c3[ ]+retl
*[0-9a-f]+: c4 90 90 90 90 90[ ]+lesl[ ]+-0x6f6f6f70\(%eax\),%edx
*[0-9a-f]+: c5 90 90 90 90 90[ ]+ldsl[ ]+-0x6f6f6f70\(%eax\),%edx
*[0-9a-f]+: c6 80 90 90 90 90 90[ ]+movb[ ]+\$0x90,-0x6f6f6f70\(%eax\)
*[0-9a-f]+: c7 80 90 90 90 90 90 90 90 90[ ]+movl[ ]+\$0x90909090,-0x6f6f6f70\(%eax\)
*[0-9a-f]+: c8 90 90 90[ ]+enterl \$0x9090,\$0x90
- *[0-9a-f]+: c9[ ]+leavel
+ *[0-9a-f]+: c9[ ]+leavel
*[0-9a-f]+: ca 90 90[ ]+lretl[ ]+\$0x9090
- *[0-9a-f]+: cb[ ]+lretl[ ]+
- *[0-9a-f]+: cc[ ]+int3[ ]+
+ *[0-9a-f]+: cb[ ]+lretl
+ *[0-9a-f]+: cc[ ]+int3
*[0-9a-f]+: cd 90[ ]+int[ ]+\$0x90
- *[0-9a-f]+: ce[ ]+into[ ]+
- *[0-9a-f]+: cf[ ]+iretl[ ]+
+ *[0-9a-f]+: ce[ ]+into
+ *[0-9a-f]+: cf[ ]+iretl
*[0-9a-f]+: d0 90 90 90 90 90[ ]+rclb[ ]+-0x6f6f6f70\(%eax\)
*[0-9a-f]+: d1 90 90 90 90 90[ ]+rcll[ ]+-0x6f6f6f70\(%eax\)
*[0-9a-f]+: d2 90 90 90 90 90[ ]+rclb[ ]+%cl,-0x6f6f6f70\(%eax\)
*[0-9a-f]+: ed[ ]+inl[ ]+\(%dx\),%eax
*[0-9a-f]+: ee[ ]+outb[ ]+%al,\(%dx\)
*[0-9a-f]+: ef[ ]+outl[ ]+%eax,\(%dx\)
- *[0-9a-f]+: f4[ ]+hlt[ ]+
- *[0-9a-f]+: f5[ ]+cmc[ ]+
+ *[0-9a-f]+: f4[ ]+hlt
+ *[0-9a-f]+: f5[ ]+cmc
*[0-9a-f]+: f6 90 90 90 90 90[ ]+notb[ ]+-0x6f6f6f70\(%eax\)
*[0-9a-f]+: f7 90 90 90 90 90[ ]+notl[ ]+-0x6f6f6f70\(%eax\)
- *[0-9a-f]+: f8[ ]+clc[ ]+
- *[0-9a-f]+: f9[ ]+stc[ ]+
- *[0-9a-f]+: fa[ ]+cli[ ]+
- *[0-9a-f]+: fb[ ]+sti[ ]+
- *[0-9a-f]+: fc[ ]+cld[ ]+
- *[0-9a-f]+: fd[ ]+std[ ]+
+ *[0-9a-f]+: f8[ ]+clc
+ *[0-9a-f]+: f9[ ]+stc
+ *[0-9a-f]+: fa[ ]+cli
+ *[0-9a-f]+: fb[ ]+sti
+ *[0-9a-f]+: fc[ ]+cld
+ *[0-9a-f]+: fd[ ]+std
*[0-9a-f]+: ff 90 90 90 90 90[ ]+calll[ ]+\*-0x6f6f6f70\(%eax\)
*[0-9a-f]+: 0f 00 90 90 90 90 90[ ]+lldt[ ]+-0x6f6f6f70\(%eax\)
*[0-9a-f]+: 0f 01 90 90 90 90 90[ ]+lgdtl[ ]+-0x6f6f6f70\(%eax\)
*[0-9a-f]+: 0f 02 90 90 90 90 90[ ]+larl[ ]+-0x6f6f6f70\(%eax\),%edx
*[0-9a-f]+: 0f 03 90 90 90 90 90[ ]+lsll[ ]+-0x6f6f6f70\(%eax\),%edx
- *[0-9a-f]+: 0f 06[ ]+clts[ ]+
- *[0-9a-f]+: 0f 08[ ]+invd[ ]+
- *[0-9a-f]+: 0f 09[ ]+wbinvd
- *[0-9a-f]+: 0f 0b[ ]+ud2[ ]+
+ *[0-9a-f]+: 0f 06[ ]+clts
+ *[0-9a-f]+: 0f 08[ ]+invd
+ *[0-9a-f]+: 0f 09[ ]+wbinvd
+ *[0-9a-f]+: 0f 0b[ ]+ud2
*[0-9a-f]+: 0f 20 d0[ ]+movl[ ]+%cr2,%eax
*[0-9a-f]+: 0f 21 d0[ ]+movl[ ]+%db2,%eax
*[0-9a-f]+: 0f 22 d0[ ]+movl[ ]+%eax,%cr2
*[0-9a-f]+: 0f 23 d0[ ]+movl[ ]+%eax,%db2
*[0-9a-f]+: 0f 24 d0[ ]+movl[ ]+%tr2,%eax
*[0-9a-f]+: 0f 26 d0[ ]+movl[ ]+%eax,%tr2
- *[0-9a-f]+: 0f 30[ ]+wrmsr[ ]+
- *[0-9a-f]+: 0f 31[ ]+rdtsc[ ]+
- *[0-9a-f]+: 0f 32[ ]+rdmsr[ ]+
- *[0-9a-f]+: 0f 33[ ]+rdpmc[ ]+
+ *[0-9a-f]+: 0f 30[ ]+wrmsr
+ *[0-9a-f]+: 0f 31[ ]+rdtsc
+ *[0-9a-f]+: 0f 32[ ]+rdmsr
+ *[0-9a-f]+: 0f 33[ ]+rdpmc
*[0-9a-f]+: 0f 40 90 90 90 90 90[ ]+cmovol[ ]+-0x6f6f6f70\(%eax\),%edx
*[0-9a-f]+: 0f 41 90 90 90 90 90[ ]+cmovnol -0x6f6f6f70\(%eax\),%edx
*[0-9a-f]+: 0f 42 90 90 90 90 90[ ]+cmovbl[ ]+-0x6f6f6f70\(%eax\),%edx
*[0-9a-f]+: 0f 74 90 90 90 90 90[ ]+pcmpeqb -0x6f6f6f70\(%eax\),%mm2
*[0-9a-f]+: 0f 75 90 90 90 90 90[ ]+pcmpeqw -0x6f6f6f70\(%eax\),%mm2
*[0-9a-f]+: 0f 76 90 90 90 90 90[ ]+pcmpeqd -0x6f6f6f70\(%eax\),%mm2
- *[0-9a-f]+: 0f 77[ ]+emms[ ]+
+ *[0-9a-f]+: 0f 77[ ]+emms
*[0-9a-f]+: 0f 7e 90 90 90 90 90[ ]+movd[ ]+%mm2,-0x6f6f6f70\(%eax\)
*[0-9a-f]+: 0f 7f 90 90 90 90 90[ ]+movq[ ]+%mm2,-0x6f6f6f70\(%eax\)
*[0-9a-f]+: 0f 80 90 90 90 90[ ]+jo[ ]+909094e2 <foo\+0x909094e2>
*[0-9a-f]+: 0f 9f 80 90 90 90 90[ ]+setg[ ]+-0x6f6f6f70\(%eax\)
*[0-9a-f]+: 0f a0[ ]+pushl[ ]+%fs
*[0-9a-f]+: 0f a1[ ]+popl[ ]+%fs
- *[0-9a-f]+: 0f a2[ ]+cpuid[ ]+
+ *[0-9a-f]+: 0f a2[ ]+cpuid
*[0-9a-f]+: 0f a3 90 90 90 90 90[ ]+btl[ ]+%edx,-0x6f6f6f70\(%eax\)
*[0-9a-f]+: 0f a4 90 90 90 90 90 90[ ]+shldl[ ]+\$0x90,%edx,-0x6f6f6f70\(%eax\)
*[0-9a-f]+: 0f a5 90 90 90 90 90[ ]+shldl[ ]+%cl,%edx,-0x6f6f6f70\(%eax\)
*[0-9a-f]+: 0f a8[ ]+pushl[ ]+%gs
*[0-9a-f]+: 0f a9[ ]+popl[ ]+%gs
- *[0-9a-f]+: 0f aa[ ]+rsm[ ]+
+ *[0-9a-f]+: 0f aa[ ]+rsm
*[0-9a-f]+: 0f ab 90 90 90 90 90[ ]+btsl[ ]+%edx,-0x6f6f6f70\(%eax\)
*[0-9a-f]+: 0f ac 90 90 90 90 90 90[ ]+shrdl[ ]+\$0x90,%edx,-0x6f6f6f70\(%eax\)
*[0-9a-f]+: 0f ad 90 90 90 90 90[ ]+shrdl[ ]+%cl,%edx,-0x6f6f6f70\(%eax\)
*[0-9a-f]+: 0f b5 90 90 90 90 90[ ]+lgsl[ ]+-0x6f6f6f70\(%eax\),%edx
*[0-9a-f]+: 0f b6 90 90 90 90 90[ ]+movzbl -0x6f6f6f70\(%eax\),%edx
*[0-9a-f]+: 0f b7 90 90 90 90 90[ ]+movzwl -0x6f6f6f70\(%eax\),%edx
- *[0-9a-f]+: 0f 0b[ ]+ud2[ ]*
+ *[0-9a-f]+: 0f 0b[ ]+ud2
*[0-9a-f]+: 0f bb 90 90 90 90 90[ ]+btcl[ ]+%edx,-0x6f6f6f70\(%eax\)
*[0-9a-f]+: 0f bc 90 90 90 90 90[ ]+bsfl[ ]+-0x6f6f6f70\(%eax\),%edx
*[0-9a-f]+: 0f bd 90 90 90 90 90[ ]+bsrl[ ]+-0x6f6f6f70\(%eax\),%edx
*[0-9a-f]+: 66 5d[ ]+popw[ ]+%bp
*[0-9a-f]+: 66 5e[ ]+popw[ ]+%si
*[0-9a-f]+: 66 5f[ ]+popw[ ]+%di
- *[0-9a-f]+: 66 60[ ]+pushaw
- *[0-9a-f]+: 66 61[ ]+popaw[ ]+
+ *[0-9a-f]+: 66 60[ ]+pushaw
+ *[0-9a-f]+: 66 61[ ]+popaw
*[0-9a-f]+: 66 62 90 90 90 90 90[ ]+boundw %dx,-0x6f6f6f70\(%eax\)
*[0-9a-f]+: 66 68 90 90[ ]+pushw[ ]+\$0x9090
*[0-9a-f]+: 66 69 90 90 90 90 90 90 90[ ]+imulw[ ]+\$0x9090,-0x6f6f6f70\(%eax\),%dx
*[0-9a-f]+: 66 95[ ]+xchgw[ ]+%ax,%bp
*[0-9a-f]+: 66 96[ ]+xchgw[ ]+%ax,%si
*[0-9a-f]+: 66 97[ ]+xchgw[ ]+%ax,%di
- *[0-9a-f]+: 66 98[ ]+cbtw[ ]+
- *[0-9a-f]+: 66 99[ ]+cwtd[ ]+
+ *[0-9a-f]+: 66 98[ ]+cbtw
+ *[0-9a-f]+: 66 99[ ]+cwtd
*[0-9a-f]+: 66 9a 90 90 90 90[ ]+lcallw \$0x9090,\$0x9090
- *[0-9a-f]+: 66 9c[ ]+pushfw
- *[0-9a-f]+: 66 9d[ ]+popfw[ ]+
+ *[0-9a-f]+: 66 9c[ ]+pushfw
+ *[0-9a-f]+: 66 9d[ ]+popfw
*[0-9a-f]+: 66 a1 90 90 90 90[ ]+movw[ ]+0x90909090,%ax
*[0-9a-f]+: 66 a3 90 90 90 90[ ]+movw[ ]+%ax,0x90909090
*[0-9a-f]+: 66 a5[ ]+movsw[ ]+%ds:\(%esi\),%es:\(%edi\)
*[0-9a-f]+: 66 bf 90 90[ ]+movw[ ]+\$0x9090,%di
*[0-9a-f]+: 66 c1 90 90 90 90 90 90[ ]+rclw[ ]+\$0x90,-0x6f6f6f70\(%eax\)
*[0-9a-f]+: 66 c2 90 90[ ]+retw[ ]+\$0x9090
- *[0-9a-f]+: 66 c3[ ]+retw[ ]+
+ *[0-9a-f]+: 66 c3[ ]+retw
*[0-9a-f]+: 66 c4 90 90 90 90 90[ ]+lesw[ ]+-0x6f6f6f70\(%eax\),%dx
*[0-9a-f]+: 66 c5 90 90 90 90 90[ ]+ldsw[ ]+-0x6f6f6f70\(%eax\),%dx
*[0-9a-f]+: 66 c7 80 90 90 90 90 90 90[ ]+movw[ ]+\$0x9090,-0x6f6f6f70\(%eax\)
*[0-9a-f]+: 66 c8 90 90 90[ ]+enterw \$0x9090,\$0x90
- *[0-9a-f]+: 66 c9[ ]+leavew
+ *[0-9a-f]+: 66 c9[ ]+leavew
*[0-9a-f]+: 66 ca 90 90[ ]+lretw[ ]+\$0x9090
- *[0-9a-f]+: 66 cb[ ]+lretw[ ]+
- *[0-9a-f]+: 66 cf[ ]+iretw[ ]+
+ *[0-9a-f]+: 66 cb[ ]+lretw
+ *[0-9a-f]+: 66 cf[ ]+iretw
*[0-9a-f]+: 66 d1 90 90 90 90 90[ ]+rclw[ ]+-0x6f6f6f70\(%eax\)
*[0-9a-f]+: 66 d3 90 90 90 90 90[ ]+rclw[ ]+%cl,-0x6f6f6f70\(%eax\)
*[0-9a-f]+: 66 e5 90[ ]+inw[ ]+\$0x90,%ax
*[0-9a-f]+: 85 c3 [ ]*testl[ ]+%eax,%ebx
*[0-9a-f]+: 85 d8 [ ]*testl[ ]+%ebx,%eax
*[0-9a-f]+: 85 18 [ ]*testl[ ]+%ebx,\(%eax\)
- *[0-9a-f]+: f1[ ]+int1[ ]+
+ *[0-9a-f]+: f1[ ]+int1
[ ]*[a-f0-9]+: 0f 4a 90 90 90 90 90 cmovpl -0x6f6f6f70\(%eax\),%edx
[ ]*[a-f0-9]+: 0f 4b 90 90 90 90 90 cmovnpl -0x6f6f6f70\(%eax\),%edx
[ ]*[a-f0-9]+: 66 0f 4a 90 90 90 90 90 cmovpw -0x6f6f6f70\(%eax\),%dx
95: 23 90 90 90 90 90 [ ]*and -0x6f6f6f70\(%eax\),%edx
9b: 24 90 [ ]*and \$0x90,%al
9d: 25 90 90 90 90 [ ]*and \$0x90909090,%eax
- a2: 27 [ ]*daa
+ a2: 27 [ ]*daa
a3: 28 90 90 90 90 90 [ ]*sub %dl,-0x6f6f6f70\(%eax\)
a9: 29 90 90 90 90 90 [ ]*sub %edx,-0x6f6f6f70\(%eax\)
af: 2a 90 90 90 90 90 [ ]*sub -0x6f6f6f70\(%eax\),%dl
b5: 2b 90 90 90 90 90 [ ]*sub -0x6f6f6f70\(%eax\),%edx
bb: 2c 90 [ ]*sub \$0x90,%al
bd: 2d 90 90 90 90 [ ]*sub \$0x90909090,%eax
- c2: 2f [ ]*das
+ c2: 2f [ ]*das
c3: 30 90 90 90 90 90 [ ]*xor %dl,-0x6f6f6f70\(%eax\)
c9: 31 90 90 90 90 90 [ ]*xor %edx,-0x6f6f6f70\(%eax\)
cf: 32 90 90 90 90 90 [ ]*xor -0x6f6f6f70\(%eax\),%dl
d5: 33 90 90 90 90 90 [ ]*xor -0x6f6f6f70\(%eax\),%edx
db: 34 90 [ ]*xor \$0x90,%al
dd: 35 90 90 90 90 [ ]*xor \$0x90909090,%eax
- e2: 37 [ ]*aaa
+ e2: 37 [ ]*aaa
e3: 38 90 90 90 90 90 [ ]*cmp %dl,-0x6f6f6f70\(%eax\)
e9: 39 90 90 90 90 90 [ ]*cmp %edx,-0x6f6f6f70\(%eax\)
ef: 3a 90 90 90 90 90 [ ]*cmp -0x6f6f6f70\(%eax\),%dl
f5: 3b 90 90 90 90 90 [ ]*cmp -0x6f6f6f70\(%eax\),%edx
fb: 3c 90 [ ]*cmp \$0x90,%al
fd: 3d 90 90 90 90 [ ]*cmp \$0x90909090,%eax
- 102: 3f [ ]*aas
+ 102: 3f [ ]*aas
103: 40 [ ]*inc %eax
104: 41 [ ]*inc %ecx
105: 42 [ ]*inc %edx
120: 5d [ ]*pop %ebp
121: 5e [ ]*pop %esi
122: 5f [ ]*pop %edi
- 123: 60 [ ]*pusha
- 124: 61 [ ]*popa
+ 123: 60 [ ]*pusha
+ 124: 61 [ ]*popa
125: 62 90 90 90 90 90 [ ]*bound %edx,-0x6f6f6f70\(%eax\)
12b: 63 90 90 90 90 90 [ ]*arpl %dx,-0x6f6f6f70\(%eax\)
131: 68 90 90 90 90 [ ]*push \$0x90909090
1d2: 95 [ ]*xchg %eax,%ebp
1d3: 96 [ ]*xchg %eax,%esi
1d4: 97 [ ]*xchg %eax,%edi
- 1d5: 98 [ ]*cwtl
- 1d6: 99 [ ]*cltd
+ 1d5: 98 [ ]*cwtl
+ 1d6: 99 [ ]*cltd
1d7: 9a 90 90 90 90 90 90 [ ]*lcall \$0x9090,\$0x90909090
1de: 9b [ ]*fwait
- 1df: 9c [ ]*pushf
- 1e0: 9d [ ]*popf
- 1e1: 9e [ ]*sahf
- 1e2: 9f [ ]*lahf
+ 1df: 9c [ ]*pushf
+ 1e0: 9d [ ]*popf
+ 1e1: 9e [ ]*sahf
+ 1e2: 9f [ ]*lahf
1e3: a0 90 90 90 90 [ ]*mov 0x90909090,%al
1e8: a1 90 90 90 90 [ ]*mov 0x90909090,%eax
1ed: a2 90 90 90 90 [ ]*mov %al,0x90909090
240: c0 90 90 90 90 90 90 [ ]*rclb \$0x90,-0x6f6f6f70\(%eax\)
247: c1 90 90 90 90 90 90 [ ]*rcll \$0x90,-0x6f6f6f70\(%eax\)
24e: c2 90 90 [ ]*ret \$0x9090
- 251: c3 [ ]*ret
+ 251: c3 [ ]*ret
252: c4 90 90 90 90 90 [ ]*les -0x6f6f6f70\(%eax\),%edx
258: c5 90 90 90 90 90 [ ]*lds -0x6f6f6f70\(%eax\),%edx
25e: c6 80 90 90 90 90 90 [ ]*movb \$0x90,-0x6f6f6f70\(%eax\)
265: c7 80 90 90 90 90 90 90 90 90 [ ]*movl \$0x90909090,-0x6f6f6f70\(%eax\)
26f: c8 90 90 90 [ ]*enter \$0x9090,\$0x90
- 273: c9 [ ]*leave
+ 273: c9 [ ]*leave
274: ca 90 90 [ ]*lret \$0x9090
- 277: cb [ ]*lret
- 278: cc [ ]*int3
+ 277: cb [ ]*lret
+ 278: cc [ ]*int3
279: cd 90 [ ]*int \$0x90
- 27b: ce [ ]*into
- 27c: cf [ ]*iret
+ 27b: ce [ ]*into
+ 27c: cf [ ]*iret
27d: d0 90 90 90 90 90 [ ]*rclb -0x6f6f6f70\(%eax\)
283: d1 90 90 90 90 90 [ ]*rcll -0x6f6f6f70\(%eax\)
289: d2 90 90 90 90 90 [ ]*rclb %cl,-0x6f6f6f70\(%eax\)
2ee: ed [ ]*in \(%dx\),%eax
2ef: ee [ ]*out %al,\(%dx\)
2f0: ef [ ]*out %eax,\(%dx\)
- 2f1: f4 [ ]*hlt
- 2f2: f5 [ ]*cmc
+ 2f1: f4 [ ]*hlt
+ 2f2: f5 [ ]*cmc
2f3: f6 90 90 90 90 90 [ ]*notb -0x6f6f6f70\(%eax\)
2f9: f7 90 90 90 90 90 [ ]*notl -0x6f6f6f70\(%eax\)
- 2ff: f8 [ ]*clc
- 300: f9 [ ]*stc
- 301: fa [ ]*cli
- 302: fb [ ]*sti
- 303: fc [ ]*cld
- 304: fd [ ]*std
+ 2ff: f8 [ ]*clc
+ 300: f9 [ ]*stc
+ 301: fa [ ]*cli
+ 302: fb [ ]*sti
+ 303: fc [ ]*cld
+ 304: fd [ ]*std
305: ff 90 90 90 90 90 [ ]*call \*-0x6f6f6f70\(%eax\)
30b: 0f 00 90 90 90 90 90 [ ]*lldt -0x6f6f6f70\(%eax\)
312: 0f 01 90 90 90 90 90 [ ]*lgdtl -0x6f6f6f70\(%eax\)
319: 0f 02 90 90 90 90 90 [ ]*lar -0x6f6f6f70\(%eax\),%edx
320: 0f 03 90 90 90 90 90 [ ]*lsl -0x6f6f6f70\(%eax\),%edx
- 327: 0f 06 [ ]*clts
- 329: 0f 08 [ ]*invd
- 32b: 0f 09 [ ]*wbinvd
- 32d: 0f 0b [ ]*ud2
+ 327: 0f 06 [ ]*clts
+ 329: 0f 08 [ ]*invd
+ 32b: 0f 09 [ ]*wbinvd
+ 32d: 0f 0b [ ]*ud2
32f: 0f 20 d0 [ ]*mov %cr2,%eax
332: 0f 21 d0 [ ]*mov %db2,%eax
335: 0f 22 d0 [ ]*mov %eax,%cr2
338: 0f 23 d0 [ ]*mov %eax,%db2
33b: 0f 24 d0 [ ]*mov %tr2,%eax
33e: 0f 26 d0 [ ]*mov %eax,%tr2
- 341: 0f 30 [ ]*wrmsr
- 343: 0f 31 [ ]*rdtsc
- 345: 0f 32 [ ]*rdmsr
- 347: 0f 33 [ ]*rdpmc
+ 341: 0f 30 [ ]*wrmsr
+ 343: 0f 31 [ ]*rdtsc
+ 345: 0f 32 [ ]*rdmsr
+ 347: 0f 33 [ ]*rdpmc
349: 0f 40 90 90 90 90 90 [ ]*cmovo -0x6f6f6f70\(%eax\),%edx
350: 0f 41 90 90 90 90 90 [ ]*cmovno -0x6f6f6f70\(%eax\),%edx
357: 0f 42 90 90 90 90 90 [ ]*cmovb -0x6f6f6f70\(%eax\),%edx
427: 0f 74 90 90 90 90 90 [ ]*pcmpeqb -0x6f6f6f70\(%eax\),%mm2
42e: 0f 75 90 90 90 90 90 [ ]*pcmpeqw -0x6f6f6f70\(%eax\),%mm2
435: 0f 76 90 90 90 90 90 [ ]*pcmpeqd -0x6f6f6f70\(%eax\),%mm2
- 43c: 0f 77 [ ]*emms
+ 43c: 0f 77 [ ]*emms
43e: 0f 7e 90 90 90 90 90 [ ]*movd %mm2,-0x6f6f6f70\(%eax\)
445: 0f 7f 90 90 90 90 90 [ ]*movq %mm2,-0x6f6f6f70\(%eax\)
44c: 0f 80 90 90 90 90 [ ]*jo (0x)?909094e2.*
515: 0f 9f 80 90 90 90 90 [ ]*setg -0x6f6f6f70\(%eax\)
51c: 0f a0 [ ]*push %fs
51e: 0f a1 [ ]*pop %fs
- 520: 0f a2 [ ]*cpuid
+ 520: 0f a2 [ ]*cpuid
522: 0f a3 90 90 90 90 90 [ ]*bt %edx,-0x6f6f6f70\(%eax\)
529: 0f a4 90 90 90 90 90 90 [ ]*shld \$0x90,%edx,-0x6f6f6f70\(%eax\)
531: 0f a5 90 90 90 90 90 [ ]*shld %cl,%edx,-0x6f6f6f70\(%eax\)
538: 0f a8 [ ]*push %gs
53a: 0f a9 [ ]*pop %gs
- 53c: 0f aa [ ]*rsm
+ 53c: 0f aa [ ]*rsm
53e: 0f ab 90 90 90 90 90 [ ]*bts %edx,-0x6f6f6f70\(%eax\)
545: 0f ac 90 90 90 90 90 90 [ ]*shrd \$0x90,%edx,-0x6f6f6f70\(%eax\)
54d: 0f ad 90 90 90 90 90 [ ]*shrd %cl,%edx,-0x6f6f6f70\(%eax\)
57e: 0f b5 90 90 90 90 90 [ ]*lgs -0x6f6f6f70\(%eax\),%edx
585: 0f b6 90 90 90 90 90 [ ]*movzbl -0x6f6f6f70\(%eax\),%edx
58c: 0f b7 90 90 90 90 90 [ ]*movzwl -0x6f6f6f70\(%eax\),%edx
- 593: 0f 0b [ ]*ud2[ ]*
+ 593: 0f 0b [ ]*ud2
595: 0f bb 90 90 90 90 90 [ ]*btc %edx,-0x6f6f6f70\(%eax\)
59c: 0f bc 90 90 90 90 90 [ ]*bsf -0x6f6f6f70\(%eax\),%edx
5a3: 0f bd 90 90 90 90 90 [ ]*bsr -0x6f6f6f70\(%eax\),%edx
779: 66 5d [ ]*pop %bp
77b: 66 5e [ ]*pop %si
77d: 66 5f [ ]*pop %di
- 77f: 66 60 [ ]*pushaw
- 781: 66 61 [ ]*popaw
+ 77f: 66 60 [ ]*pushaw
+ 781: 66 61 [ ]*popaw
783: 66 62 90 90 90 90 90 [ ]*bound %dx,-0x6f6f6f70\(%eax\)
78a: 66 68 90 90 [ ]*pushw \$0x9090
78e: 66 69 90 90 90 90 90 90 90 [ ]*imul \$0x9090,-0x6f6f6f70\(%eax\),%dx
7ef: 66 95 [ ]*xchg %ax,%bp
7f1: 66 96 [ ]*xchg %ax,%si
7f3: 66 97 [ ]*xchg %ax,%di
- 7f5: 66 98 [ ]*cbtw
- 7f7: 66 99 [ ]*cwtd
+ 7f5: 66 98 [ ]*cbtw
+ 7f7: 66 99 [ ]*cwtd
7f9: 66 9a 90 90 90 90 [ ]*lcallw \$0x9090,\$0x9090
- 7ff: 66 9c [ ]*pushfw
- 801: 66 9d [ ]*popfw
+ 7ff: 66 9c [ ]*pushfw
+ 801: 66 9d [ ]*popfw
803: 66 a1 90 90 90 90 [ ]*mov 0x90909090,%ax
809: 66 a3 90 90 90 90 [ ]*mov %ax,0x90909090
80f: 66 a5 [ ]*movsw %ds:\(%esi\),%es:\(%edi\)
839: 66 bf 90 90 [ ]*mov \$0x9090,%di
83d: 66 c1 90 90 90 90 90 90 [ ]*rclw \$0x90,-0x6f6f6f70\(%eax\)
845: 66 c2 90 90 [ ]*retw \$0x9090
- 849: 66 c3 [ ]*retw
+ 849: 66 c3 [ ]*retw
84b: 66 c4 90 90 90 90 90 [ ]*les -0x6f6f6f70\(%eax\),%dx
852: 66 c5 90 90 90 90 90 [ ]*lds -0x6f6f6f70\(%eax\),%dx
859: 66 c7 80 90 90 90 90 90 90 [ ]*movw \$0x9090,-0x6f6f6f70\(%eax\)
862: 66 c8 90 90 90 [ ]*enterw \$0x9090,\$0x90
- 867: 66 c9 [ ]*leavew
+ 867: 66 c9 [ ]*leavew
869: 66 ca 90 90 [ ]*lretw \$0x9090
- 86d: 66 cb [ ]*lretw
- 86f: 66 cf [ ]*iretw
+ 86d: 66 cb [ ]*lretw
+ 86f: 66 cf [ ]*iretw
871: 66 d1 90 90 90 90 90 [ ]*rclw -0x6f6f6f70\(%eax\)
878: 66 d3 90 90 90 90 90 [ ]*rclw %cl,-0x6f6f6f70\(%eax\)
87f: 66 e5 90 [ ]*in \$0x90,%ax
9f5: 85 c3 [ ]*test %eax,%ebx
9f7: 85 d8 [ ]*test %ebx,%eax
9f9: 85 18 [ ]*test %ebx,\(%eax\)
- 9fb: f1 [ ]*int1
+ 9fb: f1 [ ]*int1
[ ]*[a-f0-9]+: 0f 4a 90 90 90 90 90 cmovp -0x6f6f6f70\(%eax\),%edx
[ ]*[a-f0-9]+: 0f 4b 90 90 90 90 90 cmovnp -0x6f6f6f70\(%eax\),%edx
[ ]*[a-f0-9]+: 66 0f 4a 90 90 90 90 90 cmovp -0x6f6f6f70\(%eax\),%dx
Disassembly of section .text:
0+ <_start>:
-[ ]*[a-f0-9]+: 0f 01 ee rdpkru
-[ ]*[a-f0-9]+: 0f 01 ef wrpkru
+[ ]*[a-f0-9]+: 0f 01 ee rdpkru
+[ ]*[a-f0-9]+: 0f 01 ef wrpkru
#pass
Disassembly of section .text:
0+000 <foo>:
- 0:[ ]*0f a7 c0 [ ]*xstore-rng
- 3:[ ]*f3 0f a7 c0 [ ]*repz xstore-rng
- 7:[ ]*f3 0f a7 c8 [ ]*repz xcrypt-ecb
- b:[ ]*f3 0f a7 c8 [ ]*repz xcrypt-ecb
- f:[ ]*f3 0f a7 d0 [ ]*repz xcrypt-cbc
- 13:[ ]*f3 0f a7 d0 [ ]*repz xcrypt-cbc
- 17:[ ]*f3 0f a7 e0 [ ]*repz xcrypt-cfb
- 1b:[ ]*f3 0f a7 e0 [ ]*repz xcrypt-cfb
- 1f:[ ]*f3 0f a7 e8 [ ]*repz xcrypt-ofb
- 23:[ ]*f3 0f a7 e8 [ ]*repz xcrypt-ofb
- 27:[ ]*0f a7 c0 [ ]*xstore-rng
- 2a:[ ]*f3 0f a7 c0 [ ]*repz xstore-rng
- 2e:[ ]*f3 0f a6 c0 [ ]*repz montmul
- 32:[ ]*f3 0f a6 c0 [ ]*repz montmul
- 36:[ ]*f3 0f a6 c8 [ ]*repz xsha1
- 3a:[ ]*f3 0f a6 c8 [ ]*repz xsha1
- 3e:[ ]*f3 0f a6 d0 [ ]*repz xsha256
- 42:[ ]*f3 0f a6 d0 [ ]*repz xsha256
+ 0:[ ]*0f a7 c0 [ ]*xstore-rng
+ 3:[ ]*f3 0f a7 c0 [ ]*repz xstore-rng
+ 7:[ ]*f3 0f a7 c8 [ ]*repz xcrypt-ecb
+ b:[ ]*f3 0f a7 c8 [ ]*repz xcrypt-ecb
+ f:[ ]*f3 0f a7 d0 [ ]*repz xcrypt-cbc
+ 13:[ ]*f3 0f a7 d0 [ ]*repz xcrypt-cbc
+ 17:[ ]*f3 0f a7 e0 [ ]*repz xcrypt-cfb
+ 1b:[ ]*f3 0f a7 e0 [ ]*repz xcrypt-cfb
+ 1f:[ ]*f3 0f a7 e8 [ ]*repz xcrypt-ofb
+ 23:[ ]*f3 0f a7 e8 [ ]*repz xcrypt-ofb
+ 27:[ ]*0f a7 c0 [ ]*xstore-rng
+ 2a:[ ]*f3 0f a7 c0 [ ]*repz xstore-rng
+ 2e:[ ]*f3 0f a6 c0 [ ]*repz montmul
+ 32:[ ]*f3 0f a6 c0 [ ]*repz montmul
+ 36:[ ]*f3 0f a6 c8 [ ]*repz xsha1
+ 3a:[ ]*f3 0f a6 c8 [ ]*repz xsha1
+ 3e:[ ]*f3 0f a6 d0 [ ]*repz xsha256
+ 42:[ ]*f3 0f a6 d0 [ ]*repz xsha256
#pass
Disassembly of section .text:
0+ <_start>:
-[ ]*[a-f0-9]+:[ ]*0f 01 c5[ ]*pconfig[ ]*
+[ ]*[a-f0-9]+:[ ]*0f 01 c5[ ]*pconfig
#pass
Disassembly of section .text:
0+ <_start>:
-[ ]*[a-f0-9]+:[ ]*0f 01 c5[ ]*pconfig[ ]*
+[ ]*[a-f0-9]+:[ ]*0f 01 c5[ ]*pconfig
#pass
[ ]*[a-f0-9]+: f2 66 90 repnz xchg %ax,%ax
[ ]*[a-f0-9]+: f2 67 66 90 repnz addr16 xchg %ax,%ax
[ ]*[a-f0-9]+: f2 67 f0 66 90 repnz addr16 lock xchg %ax,%ax
-[ ]*[a-f0-9]+: f3 66 90 data16 pause
-[ ]*[a-f0-9]+: f3 67 f0 66 90 addr16 lock data16 pause
+[ ]*[a-f0-9]+: f3 66 90 data16 pause
+[ ]*[a-f0-9]+: f3 67 f0 66 90 addr16 lock data16 pause
[ ]*[a-f0-9]+: f3 67 f2 66 90 repz addr16 repnz xchg %ax,%ax
[ ]*[a-f0-9]+: f2 3e 90 repnz ds nop
[ ]*[a-f0-9]+: f2 f0 67 3e 90 repnz lock addr16 ds nop
-[ ]*[a-f0-9]+: f3 3e 90 ds pause
-[ ]*[a-f0-9]+: f3 66 3e 90 data16 ds pause
-[ ]*[a-f0-9]+: f3 f0 3e 90 lock ds pause
-[ ]*[a-f0-9]+: f3 f0 67 3e 90 lock addr16 ds pause
+[ ]*[a-f0-9]+: f3 3e 90 ds pause
+[ ]*[a-f0-9]+: f3 66 3e 90 data16 ds pause
+[ ]*[a-f0-9]+: f3 f0 3e 90 lock ds pause
+[ ]*[a-f0-9]+: f3 f0 67 3e 90 lock addr16 ds pause
[ ]*[a-f0-9]+: f3 f2 67 3e 90 repz repnz addr16 ds nop
[ ]*[a-f0-9]+: 66 f0 36 90 lock ss xchg %ax,%ax
[ ]*[a-f0-9]+: f2 36 90 repnz ss nop
[ ]*[a-f0-9]+: f2 66 36 90 repnz ss xchg %ax,%ax
[ ]*[a-f0-9]+: f2 f0 36 90 repnz lock ss nop
[ ]*[a-f0-9]+: f2 f0 67 36 90 repnz lock addr16 ss nop
-[ ]*[a-f0-9]+: f3 36 90 ss pause
-[ ]*[a-f0-9]+: f3 67 36 90 addr16 ss pause
-[ ]*[a-f0-9]+: f3 f0 67 36 90 lock addr16 ss pause
+[ ]*[a-f0-9]+: f3 36 90 ss pause
+[ ]*[a-f0-9]+: f3 67 36 90 addr16 ss pause
+[ ]*[a-f0-9]+: f3 f0 67 36 90 lock addr16 ss pause
[ ]*[a-f0-9]+: f3 f2 36 90 repz repnz ss nop
[ ]*[a-f0-9]+: f3 f2 67 36 90 repz repnz addr16 ss nop
[ ]*[a-f0-9]+: f3 f0 f2 66 36 90 repz lock repnz ss xchg %ax,%ax
[ ]*[a-f0-9]+: 66 3e 36 90 ds ss xchg %ax,%ax
[ ]*[a-f0-9]+: 67 66 3e 36 90 addr16 ds ss xchg %ax,%ax
[ ]*[a-f0-9]+: 67 f0 66 3e 36 90 addr16 lock ds ss xchg %ax,%ax
-[ ]*[a-f0-9]+: f3 66 3e 36 90 data16 ds ss pause
-[ ]*[a-f0-9]+: f3 f0 66 3e 36 90 lock data16 ds ss pause
+[ ]*[a-f0-9]+: f3 66 3e 36 90 data16 ds ss pause
+[ ]*[a-f0-9]+: f3 f0 66 3e 36 90 lock data16 ds ss pause
[ ]*[a-f0-9]+: f3 f2 67 3e 36 90 repz repnz addr16 ds ss nop
[ ]*[a-f0-9]+: f3 67 f2 66 3e 36 90 repz addr16 repnz ds ss xchg %ax,%ax
[ ]*[a-f0-9]+: f3 0f c7 f8 rdpid %eax
[ ]*[a-f0-9]+: 90 nop
-[ ]*[a-f0-9]+: f3 0f c7 \(bad\)
+[ ]*[a-f0-9]+: f3 0f c7 \(bad\)
[ ]*[a-f0-9]+: f0 90 lock nop
-[ ]*[a-f0-9]+: f2 0f c7 \(bad\)
-[ ]*[a-f0-9]+: f8 clc
+[ ]*[a-f0-9]+: f2 0f c7 \(bad\)
+[ ]*[a-f0-9]+: f8 clc
[ ]*[a-f0-9]+: 90 nop
-[ ]*[a-f0-9]+: f2 0f c7 \(bad\)
+[ ]*[a-f0-9]+: f2 0f c7 \(bad\)
[ ]*[a-f0-9]+: f0 90 lock nop
-[ ]*[a-f0-9]+: f3 0f 28 \(bad\) *
+[ ]*[a-f0-9]+: f3 0f 28 \(bad\)
[ ]*[a-f0-9]+: ff cc dec %esp
-[ ]*[a-f0-9]+: c5 fa 28 \(bad\) *
+[ ]*[a-f0-9]+: c5 fa 28 \(bad\)
[ ]*[a-f0-9]+: ff cc dec %esp
-[ ]*[a-f0-9]+: c4 e1 7b 28 \(bad\) *
+[ ]*[a-f0-9]+: c4 e1 7b 28 \(bad\)
[ ]*[a-f0-9]+: ff cc dec %esp
-[ ]*[a-f0-9]+: 62 f1 fc 08 28 \(bad\) *
+[ ]*[a-f0-9]+: 62 f1 fc 08 28 \(bad\)
[ ]*[a-f0-9]+: ff cc dec %esp
-[ ]*[a-f0-9]+: 62 f1 7e 08 28 \(bad\) *
+[ ]*[a-f0-9]+: 62 f1 7e 08 28 \(bad\)
[ ]*[a-f0-9]+: ff cc dec %esp
-[ ]*[a-f0-9]+: 62 f1 7d 08 28 \(bad\) *
+[ ]*[a-f0-9]+: 62 f1 7d 08 28 \(bad\)
[ ]*[a-f0-9]+: ff cc dec %esp
-[ ]*[a-f0-9]+: 62 f1 ff 08 28 \(bad\) *
+[ ]*[a-f0-9]+: 62 f1 ff 08 28 \(bad\)
[ ]*[a-f0-9]+: ff cc dec %esp
[ ]*[a-f0-9]+: 66 c5 f8 28 c0 data16 vmovaps %xmm0,%xmm0
[ ]*[a-f0-9]+: f3 c4 e1 78 28 c0 repz vmovaps %xmm0,%xmm0
[ ]*[a-f0-9]+: e9 fc ff ff ff jmp 1e <foo\+0x1e> 1e: R_386_PC32 hidden_undef
0+22 <hidden_def>:
-[ ]*[a-f0-9]+: c3 ret
+[ ]*[a-f0-9]+: c3 ret
0+23 <weak_hidden_def>:
-[ ]*[a-f0-9]+: c3 ret
+[ ]*[a-f0-9]+: c3 ret
0+24 <global_def>:
-[ ]*[a-f0-9]+: c3 ret
+[ ]*[a-f0-9]+: c3 ret
0+25 <weak_def>:
-[ ]*[a-f0-9]+: c3 ret
+[ ]*[a-f0-9]+: c3 ret
0+26 <local>:
-[ ]*[a-f0-9]+: c3 ret
+[ ]*[a-f0-9]+: c3 ret
#pass
[ ]*[a-f0-9]+: e9 fc ff ff ff jmp 1b <foo\+0x1b> 1b: R_386_PC32 hidden_undef
0+1f <hidden_def>:
-[ ]*[a-f0-9]+: c3 ret
+[ ]*[a-f0-9]+: c3 ret
0+20 <weak_hidden_def>:
-[ ]*[a-f0-9]+: c3 ret
+[ ]*[a-f0-9]+: c3 ret
0+21 <global_def>:
-[ ]*[a-f0-9]+: c3 ret
+[ ]*[a-f0-9]+: c3 ret
0+22 <weak_def>:
-[ ]*[a-f0-9]+: c3 ret
+[ ]*[a-f0-9]+: c3 ret
0+23 <local>:
-[ ]*[a-f0-9]+: c3 ret
+[ ]*[a-f0-9]+: c3 ret
#pass
Disassembly of section .text:
0+ <printk>:
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
Disassembly of section .init.text:
[ ]*[a-f0-9]+: c6 f8 08 xabort 0x8
[ ]*[a-f0-9]+: c7 f8 fa ff ff ff xbegin 3 <foo\+0x3>
[ ]*[a-f0-9]+: c7 f8 00 00 00 00 xbegin f <foo\+0xf>
-[ ]*[a-f0-9]+: 0f 01 d5 xend
+[ ]*[a-f0-9]+: 0f 01 d5 xend
[ ]*[a-f0-9]+: c6 f8 08 xabort 0x8
[ ]*[a-f0-9]+: c7 f8 fa ff ff ff xbegin 15 <foo\+0x15>
[ ]*[a-f0-9]+: c7 f8 00 00 00 00 xbegin 21 <foo\+0x21>
-[ ]*[a-f0-9]+: 0f 01 d5 xend
-[ ]*[a-f0-9]+: 0f 01 d6 xtest
+[ ]*[a-f0-9]+: 0f 01 d5 xend
+[ ]*[a-f0-9]+: 0f 01 d6 xtest
#pass
[ ]*[a-f0-9]+: c6 f8 08 xabort \$0x8
[ ]*[a-f0-9]+: c7 f8 fa ff ff ff xbegin 3 <foo\+0x3>
[ ]*[a-f0-9]+: c7 f8 00 00 00 00 xbegin f <foo\+0xf>
-[ ]*[a-f0-9]+: 0f 01 d5 xend
+[ ]*[a-f0-9]+: 0f 01 d5 xend
[ ]*[a-f0-9]+: c6 f8 08 xabort \$0x8
[ ]*[a-f0-9]+: c7 f8 fa ff ff ff xbegin 15 <foo\+0x15>
[ ]*[a-f0-9]+: c7 f8 00 00 00 00 xbegin 21 <foo\+0x21>
-[ ]*[a-f0-9]+: 0f 01 d5 xend
-[ ]*[a-f0-9]+: 0f 01 d6 xtest
+[ ]*[a-f0-9]+: 0f 01 d5 xend
+[ ]*[a-f0-9]+: 0f 01 d6 xtest
#pass
Disassembly of section .text:
0+ <_start>:
-[ ]*[a-f0-9]+: 0f 01 cf encls
-[ ]*[a-f0-9]+: 0f 01 d7 enclu
-[ ]*[a-f0-9]+: 0f 01 c0 enclv
+[ ]*[a-f0-9]+: 0f 01 cf encls
+[ ]*[a-f0-9]+: 0f 01 d7 enclu
+[ ]*[a-f0-9]+: 0f 01 c0 enclv
#pass
.*: +file format pe-i386
RELOCATION RECORDS FOR \[\.data\]:
-OFFSET[ ]+TYPE[ ]+VALUE
+OFFSET[ ]+TYPE[ ]+VALUE
0+24 secidx \.text
0+27 secidx \.text
0+2a secidx \.text
.*: +file format pe-i386
RELOCATION RECORDS FOR \[\.data\]:
-OFFSET[ ]+TYPE[ ]+VALUE *
+OFFSET[ ]+TYPE[ ]+VALUE
0+24 secrel32 \.text
0+29 secrel32 \.text
0+2e secrel32 \.text
Disassembly of section \.text:
0+ <_start>:
-[ ]*[a-f0-9]+: 0f 01 e8 + serialize *
+[ ]*[a-f0-9]+: 0f 01 e8 + serialize
#pass
[ ]*[a-f0-9]+: 8d 0d bd ff ff ff lea 0xffffffbd,%ecx
[ ]*[a-f0-9]+: 8d 15 bd 00 00 00 lea 0xbd,%edx
[ ]*[a-f0-9]+: 8d 15 bd 0f 00 00 lea 0xfbd,%edx
-[ ]*[a-f0-9]+: c3 ret *
+[ ]*[a-f0-9]+: c3 ret
#pass
Disassembly of section .text:
0+ <foo>:
-[ ]*[a-f0-9]+: 0f 01 ca clac
-[ ]*[a-f0-9]+: 0f 01 cb stac
+[ ]*[a-f0-9]+: 0f 01 ca clac
+[ ]*[a-f0-9]+: 0f 01 cb stac
#pass
Disassembly of section .text:
0+000 <foo>:
-[ ]*[a-f0-9]+: 0f 37 getsec
+[ ]*[a-f0-9]+: 0f 37 getsec
#pass
Disassembly of section \.text:
0+ <att>:
-[ ]*[a-f0-9]+:[ ]+f2 0f 01 ff[ ]+pvalidate[ ]*
-[ ]*[a-f0-9]+:[ ]+f2 0f 01 ff[ ]+pvalidate[ ]*
-[ ]*[a-f0-9]+:[ ]+67 f2 0f 01 ff[ ]+addr16 pvalidate[ ]*
+[ ]*[a-f0-9]+:[ ]+f2 0f 01 ff[ ]+pvalidate
+[ ]*[a-f0-9]+:[ ]+f2 0f 01 ff[ ]+pvalidate
+[ ]*[a-f0-9]+:[ ]+67 f2 0f 01 ff[ ]+addr16 pvalidate
[0-9a-f]+ <intel>:
-[ ]*[a-f0-9]+:[ ]+f2 0f 01 ff[ ]+pvalidate[ ]*
-[ ]*[a-f0-9]+:[ ]+f2 0f 01 ff[ ]+pvalidate[ ]*
-[ ]*[a-f0-9]+:[ ]+67 f2 0f 01 ff[ ]+addr16 pvalidate[ ]*
+[ ]*[a-f0-9]+:[ ]+f2 0f 01 ff[ ]+pvalidate
+[ ]*[a-f0-9]+:[ ]+f2 0f 01 ff[ ]+pvalidate
+[ ]*[a-f0-9]+:[ ]+67 f2 0f 01 ff[ ]+addr16 pvalidate
#pass
Disassembly of section \.text:
0+ <att>:
-[ ]*[a-f0-9]+:[ ]+f2 0f 01 ff[ ]+pvalidate[ ]*
-[ ]*[a-f0-9]+:[ ]+67 f2 0f 01 ff[ ]+addr32 pvalidate[ ]*
-[ ]*[a-f0-9]+:[ ]+f2 0f 01 ff[ ]+pvalidate[ ]*
-[ ]*[a-f0-9]+:[ ]+f3 0f 01 ff[ ]+psmash[ ]*
-[ ]*[a-f0-9]+:[ ]+f3 0f 01 ff[ ]+psmash[ ]*
-[ ]*[a-f0-9]+:[ ]+67 f3 0f 01 ff[ ]+addr32 psmash[ ]*
-[ ]*[a-f0-9]+:[ ]+f2 0f 01 fe[ ]+rmpupdate[ ]*
-[ ]*[a-f0-9]+:[ ]+f2 0f 01 fe[ ]+rmpupdate[ ]*
-[ ]*[a-f0-9]+:[ ]+67 f2 0f 01 fe[ ]+addr32 rmpupdate[ ]*
-[ ]*[a-f0-9]+:[ ]+f3 0f 01 fe[ ]+rmpadjust[ ]*
-[ ]*[a-f0-9]+:[ ]+f3 0f 01 fe[ ]+rmpadjust[ ]*
-[ ]*[a-f0-9]+:[ ]+67 f3 0f 01 fe[ ]+addr32 rmpadjust[ ]*
+[ ]*[a-f0-9]+:[ ]+f2 0f 01 ff[ ]+pvalidate
+[ ]*[a-f0-9]+:[ ]+67 f2 0f 01 ff[ ]+addr32 pvalidate
+[ ]*[a-f0-9]+:[ ]+f2 0f 01 ff[ ]+pvalidate
+[ ]*[a-f0-9]+:[ ]+f3 0f 01 ff[ ]+psmash
+[ ]*[a-f0-9]+:[ ]+f3 0f 01 ff[ ]+psmash
+[ ]*[a-f0-9]+:[ ]+67 f3 0f 01 ff[ ]+addr32 psmash
+[ ]*[a-f0-9]+:[ ]+f2 0f 01 fe[ ]+rmpupdate
+[ ]*[a-f0-9]+:[ ]+f2 0f 01 fe[ ]+rmpupdate
+[ ]*[a-f0-9]+:[ ]+67 f2 0f 01 fe[ ]+addr32 rmpupdate
+[ ]*[a-f0-9]+:[ ]+f3 0f 01 fe[ ]+rmpadjust
+[ ]*[a-f0-9]+:[ ]+f3 0f 01 fe[ ]+rmpadjust
+[ ]*[a-f0-9]+:[ ]+67 f3 0f 01 fe[ ]+addr32 rmpadjust
[0-9a-f]+ <intel>:
-[ ]*[a-f0-9]+:[ ]+f2 0f 01 ff[ ]+pvalidate[ ]*
-[ ]*[a-f0-9]+:[ ]+67 f2 0f 01 ff[ ]+addr32 pvalidate[ ]*
-[ ]*[a-f0-9]+:[ ]+f2 0f 01 ff[ ]+pvalidate[ ]*
-[ ]*[a-f0-9]+:[ ]+f3 0f 01 ff[ ]+psmash[ ]*
-[ ]*[a-f0-9]+:[ ]+f3 0f 01 ff[ ]+psmash[ ]*
-[ ]*[a-f0-9]+:[ ]+67 f3 0f 01 ff[ ]+addr32 psmash[ ]*
-[ ]*[a-f0-9]+:[ ]+f2 0f 01 fe[ ]+rmpupdate[ ]*
-[ ]*[a-f0-9]+:[ ]+f2 0f 01 fe[ ]+rmpupdate[ ]*
-[ ]*[a-f0-9]+:[ ]+67 f2 0f 01 fe[ ]+addr32 rmpupdate[ ]*
-[ ]*[a-f0-9]+:[ ]+f3 0f 01 fe[ ]+rmpadjust[ ]*
-[ ]*[a-f0-9]+:[ ]+f3 0f 01 fe[ ]+rmpadjust[ ]*
-[ ]*[a-f0-9]+:[ ]+67 f3 0f 01 fe[ ]+addr32 rmpadjust[ ]*
+[ ]*[a-f0-9]+:[ ]+f2 0f 01 ff[ ]+pvalidate
+[ ]*[a-f0-9]+:[ ]+67 f2 0f 01 ff[ ]+addr32 pvalidate
+[ ]*[a-f0-9]+:[ ]+f2 0f 01 ff[ ]+pvalidate
+[ ]*[a-f0-9]+:[ ]+f3 0f 01 ff[ ]+psmash
+[ ]*[a-f0-9]+:[ ]+f3 0f 01 ff[ ]+psmash
+[ ]*[a-f0-9]+:[ ]+67 f3 0f 01 ff[ ]+addr32 psmash
+[ ]*[a-f0-9]+:[ ]+f2 0f 01 fe[ ]+rmpupdate
+[ ]*[a-f0-9]+:[ ]+f2 0f 01 fe[ ]+rmpupdate
+[ ]*[a-f0-9]+:[ ]+67 f2 0f 01 fe[ ]+addr32 rmpupdate
+[ ]*[a-f0-9]+:[ ]+f3 0f 01 fe[ ]+rmpadjust
+[ ]*[a-f0-9]+:[ ]+f3 0f 01 fe[ ]+rmpadjust
+[ ]*[a-f0-9]+:[ ]+67 f3 0f 01 fe[ ]+addr32 rmpadjust
#pass
[ ]*[a-f0-9]+: df 08 fisttps \(%eax\)
[ ]*[a-f0-9]+: db 08 fisttpl \(%eax\)
[ ]*[a-f0-9]+: dd 08 fisttpll \(%eax\)
-[ ]*[a-f0-9]+: 0f ae e8 lfence
+[ ]*[a-f0-9]+: 0f ae e8 lfence
[ ]*[a-f0-9]+: 0f f7 c7 maskmovq %mm7,%mm0
-[ ]*[a-f0-9]+: 0f ae f0 mfence
+[ ]*[a-f0-9]+: 0f ae f0 mfence
[ ]*[a-f0-9]+: 0f 01 c8 monitor %eax,%ecx,%edx
[ ]*[a-f0-9]+: f2 0f d6 c8 movdq2q %xmm0,%mm1
[ ]*[a-f0-9]+: 0f c3 00 movnti %eax,\(%eax\)
[ ]*[a-f0-9]+: 0f 38 0a c1 psignd %mm1,%mm0
[ ]*[a-f0-9]+: 0f 38 09 c1 psignw %mm1,%mm0
[ ]*[a-f0-9]+: 0f fb c1 psubq %mm1,%mm0
-[ ]*[a-f0-9]+: 0f ae f8 sfence
+[ ]*[a-f0-9]+: 0f ae f8 sfence
#pass
0+ <foo>:
[ ]*[a-f0-9]+: 67 0f c3 00 movnti %eax,\(%eax\)
-[ ]*[a-f0-9]+: 0f ae f8 sfence
-[ ]*[a-f0-9]+: 0f ae e8 lfence
-[ ]*[a-f0-9]+: 0f ae f0 mfence
+[ ]*[a-f0-9]+: 0f ae f8 sfence
+[ ]*[a-f0-9]+: 0f ae e8 lfence
+[ ]*[a-f0-9]+: 0f ae f0 mfence
[ ]*[a-f0-9]+: 67 66 0f 58 01 addpd \(%ecx\),%xmm0
[ ]*[a-f0-9]+: 66 0f 58 ca addpd %xmm2,%xmm1
[ ]*[a-f0-9]+: 67 f2 0f 58 13 addsd \(%ebx\),%xmm2
[ ]*[a-f0-9]+: 67 f2 0f 5e 1c 24 divsd \(%esp\),%xmm3
[ ]*[a-f0-9]+: 67 0f ae 55 00 ldmxcsr 0x0\(%ebp\)
[ ]*[a-f0-9]+: 67 0f ae 1e stmxcsr \(%esi\)
-[ ]*[a-f0-9]+: 0f ae f8 sfence
+[ ]*[a-f0-9]+: 0f ae f8 sfence
[ ]*[a-f0-9]+: 66 0f 5f c1 maxpd %xmm1,%xmm0
[ ]*[a-f0-9]+: 67 66 0f 5f 0a maxpd \(%edx\),%xmm1
[ ]*[a-f0-9]+: f2 0f 5f d3 maxsd %xmm3,%xmm2
0+ <foo>:
[ ]*[a-f0-9]+: 0f c3 00 movnti %eax,\(%eax\)
-[ ]*[a-f0-9]+: 0f ae f8 sfence
-[ ]*[a-f0-9]+: 0f ae e8 lfence
-[ ]*[a-f0-9]+: 0f ae f0 mfence
+[ ]*[a-f0-9]+: 0f ae f8 sfence
+[ ]*[a-f0-9]+: 0f ae e8 lfence
+[ ]*[a-f0-9]+: 0f ae f0 mfence
[ ]*[a-f0-9]+: 66 0f 58 01 addpd \(%ecx\),%xmm0
[ ]*[a-f0-9]+: 66 0f 58 ca addpd %xmm2,%xmm1
[ ]*[a-f0-9]+: f2 0f 58 13 addsd \(%ebx\),%xmm2
[ ]*[a-f0-9]+: f2 0f 5e 1c 24 divsd \(%esp\),%xmm3
[ ]*[a-f0-9]+: 0f ae 55 00 ldmxcsr 0x0\(%ebp\)
[ ]*[a-f0-9]+: 0f ae 1e stmxcsr \(%esi\)
-[ ]*[a-f0-9]+: 0f ae f8 sfence
+[ ]*[a-f0-9]+: 0f ae f8 sfence
[ ]*[a-f0-9]+: 66 0f 5f c1 maxpd %xmm1,%xmm0
[ ]*[a-f0-9]+: 66 0f 5f 0a maxpd \(%edx\),%xmm1
[ ]*[a-f0-9]+: f2 0f 5f d3 maxsd %xmm3,%xmm2
[ ]*[0-9a-f]+: f2 0f 7d d2[ ]+hsubps xmm2,xmm2
[ ]*[0-9a-f]+: f2 0f 7d 1c 24[ ]+hsubps xmm3,(XMMWORD PTR )?\[esp\]
[ ]*[0-9a-f]+: f2 0f f0 2e[ ]+lddqu xmm5,(XMMWORD PTR )?\[esi\]
-[ ]*[0-9a-f]+: 0f 01 c8[ ]+monitor *
-[ ]*[0-9a-f]+: 0f 01 c8[ ]+monitor *
+[ ]*[0-9a-f]+: 0f 01 c8[ ]+monitor
+[ ]*[0-9a-f]+: 0f 01 c8[ ]+monitor
[ ]*[0-9a-f]+: f2 0f 12 f7[ ]+movddup xmm6,xmm7
[ ]*[0-9a-f]+: f2 0f 12 38[ ]+movddup xmm7,(QWORD PTR )?\[eax\]
[ ]*[0-9a-f]+: f3 0f 16 01[ ]+movshdup xmm0,(XMMWORD PTR )?\[ecx\]
[ ]*[0-9a-f]+: f3 0f 16 ca[ ]+movshdup xmm1,xmm2
[ ]*[0-9a-f]+: f3 0f 12 13[ ]+movsldup xmm2,(XMMWORD PTR )?\[ebx\]
[ ]*[0-9a-f]+: f3 0f 12 dc[ ]+movsldup xmm3,xmm4
-[ ]*[0-9a-f]+: 0f 01 c9[ ]+mwait *
-[ ]*[0-9a-f]+: 0f 01 c9[ ]+mwait *
-[ ]*[0-9a-f]+: 67 0f 01 c8[ ]+addr16 monitor *
-[ ]*[0-9a-f]+: 67 0f 01 c8[ ]+addr16 monitor *
+[ ]*[0-9a-f]+: 0f 01 c9[ ]+mwait
+[ ]*[0-9a-f]+: 0f 01 c9[ ]+mwait
+[ ]*[0-9a-f]+: 67 0f 01 c8[ ]+addr16 monitor
+[ ]*[0-9a-f]+: 67 0f 01 c8[ ]+addr16 monitor
[ ]*[0-9a-f]+: f2 0f 12 38[ ]+movddup xmm7,(QWORD PTR )?\[eax\]
[ ]*[0-9a-f]+: f2 0f 12 38[ ]+movddup xmm7,(QWORD PTR )?\[eax\]
-[ ]*[0-9a-f]+: 0f 01 c8[ ]+monitor *
-[ ]*[0-9a-f]+: 67 0f 01 c8[ ]+addr16 monitor *
-[ ]*[0-9a-f]+: 0f 01 c9[ ]+mwait *
+[ ]*[0-9a-f]+: 0f 01 c8[ ]+monitor
+[ ]*[0-9a-f]+: 67 0f 01 c8[ ]+addr16 monitor
+[ ]*[0-9a-f]+: 0f 01 c9[ ]+mwait
#pass
Disassembly of section .text:
0+ <foo>:
-[ ]*[a-f0-9]+: 0f 01 c8 monitor
-[ ]*[a-f0-9]+: 0f 01 c9 mwait
-[ ]*[a-f0-9]+: 0f 01 c1 vmcall
-[ ]*[a-f0-9]+: 0f 01 c2 vmlaunch
-[ ]*[a-f0-9]+: 0f 01 c3 vmresume
-[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
-[ ]*[a-f0-9]+: 66 cf iretw
-[ ]*[a-f0-9]+: cf iretd
-[ ]*[a-f0-9]+: cf iretd
-[ ]*[a-f0-9]+: 0f 07 sysretd
-[ ]*[a-f0-9]+: 0f 07 sysretd
-[ ]*[a-f0-9]+: 66 cf iretw
-[ ]*[a-f0-9]+: cf iretd
-[ ]*[a-f0-9]+: cf iretd
-[ ]*[a-f0-9]+: 0f 07 sysretd
-[ ]*[a-f0-9]+: 0f 07 sysretd
+[ ]*[a-f0-9]+: 0f 01 c8 monitor
+[ ]*[a-f0-9]+: 0f 01 c9 mwait
+[ ]*[a-f0-9]+: 0f 01 c1 vmcall
+[ ]*[a-f0-9]+: 0f 01 c2 vmlaunch
+[ ]*[a-f0-9]+: 0f 01 c3 vmresume
+[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
+[ ]*[a-f0-9]+: 66 cf iretw
+[ ]*[a-f0-9]+: cf iretd
+[ ]*[a-f0-9]+: cf iretd
+[ ]*[a-f0-9]+: 0f 07 sysretd
+[ ]*[a-f0-9]+: 0f 07 sysretd
+[ ]*[a-f0-9]+: 66 cf iretw
+[ ]*[a-f0-9]+: cf iretd
+[ ]*[a-f0-9]+: cf iretd
+[ ]*[a-f0-9]+: 0f 07 sysretd
+[ ]*[a-f0-9]+: 0f 07 sysretd
#pass
0+ <foo>:
[ ]*[a-f0-9]+: 0f 01 c8 monitor %eax,%ecx,%edx
[ ]*[a-f0-9]+: 0f 01 c9 mwait %eax,%ecx
-[ ]*[a-f0-9]+: 0f 01 c1 vmcall
-[ ]*[a-f0-9]+: 0f 01 c2 vmlaunch
-[ ]*[a-f0-9]+: 0f 01 c3 vmresume
-[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
-[ ]*[a-f0-9]+: 66 cf iretw
-[ ]*[a-f0-9]+: cf iretl
-[ ]*[a-f0-9]+: cf iretl
-[ ]*[a-f0-9]+: 0f 07 sysretl
-[ ]*[a-f0-9]+: 0f 07 sysretl
-[ ]*[a-f0-9]+: 66 cf iretw
-[ ]*[a-f0-9]+: cf iretl
-[ ]*[a-f0-9]+: cf iretl
-[ ]*[a-f0-9]+: 0f 07 sysretl
-[ ]*[a-f0-9]+: 0f 07 sysretl
+[ ]*[a-f0-9]+: 0f 01 c1 vmcall
+[ ]*[a-f0-9]+: 0f 01 c2 vmlaunch
+[ ]*[a-f0-9]+: 0f 01 c3 vmresume
+[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
+[ ]*[a-f0-9]+: 66 cf iretw
+[ ]*[a-f0-9]+: cf iretl
+[ ]*[a-f0-9]+: cf iretl
+[ ]*[a-f0-9]+: 0f 07 sysretl
+[ ]*[a-f0-9]+: 0f 07 sysretl
+[ ]*[a-f0-9]+: 66 cf iretw
+[ ]*[a-f0-9]+: cf iretl
+[ ]*[a-f0-9]+: cf iretl
+[ ]*[a-f0-9]+: 0f 07 sysretl
+[ ]*[a-f0-9]+: 0f 07 sysretl
#pass
Disassembly of section .text:
0+000 <common>:
-[ ]*[0-9a-f]+:[ ]+0f 01 dd[ ]+clgi[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 df[ ]+invlpga[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 de[ ]+skinit[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 dc[ ]+stgi[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 da[ ]+vmload[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 d9[ ]+vmmcall[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 d8[ ]+vmrun[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 db[ ]+vmsave[ ]*
+[ ]*[0-9a-f]+:[ ]+0f 01 dd[ ]+clgi
+[ ]*[0-9a-f]+:[ ]+0f 01 df[ ]+invlpga
+[ ]*[0-9a-f]+:[ ]+0f 01 de[ ]+skinit
+[ ]*[0-9a-f]+:[ ]+0f 01 dc[ ]+stgi
+[ ]*[0-9a-f]+:[ ]+0f 01 da[ ]+vmload
+[ ]*[0-9a-f]+:[ ]+0f 01 d9[ ]+vmmcall
+[ ]*[0-9a-f]+:[ ]+0f 01 d8[ ]+vmrun
+[ ]*[0-9a-f]+:[ ]+0f 01 db[ ]+vmsave
[0-9a-f]+ <att32>:
-[ ]*[0-9a-f]+:[ ]+0f 01 de[ ]+skinit[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 df[ ]+invlpga[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 da[ ]+vmload[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 d8[ ]+vmrun[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 db[ ]+vmsave[ ]*
+[ ]*[0-9a-f]+:[ ]+0f 01 de[ ]+skinit
+[ ]*[0-9a-f]+:[ ]+0f 01 df[ ]+invlpga
+[ ]*[0-9a-f]+:[ ]+0f 01 da[ ]+vmload
+[ ]*[0-9a-f]+:[ ]+0f 01 d8[ ]+vmrun
+[ ]*[0-9a-f]+:[ ]+0f 01 db[ ]+vmsave
[0-9a-f]+ <att16>:
-[ ]*[0-9a-f]+:[ ]+67 0f 01 df[ ]+addr16 invlpga[ ]*
-[ ]*[0-9a-f]+:[ ]+67 0f 01 da[ ]+addr16 vmload[ ]*
-[ ]*[0-9a-f]+:[ ]+67 0f 01 d8[ ]+addr16 vmrun[ ]*
-[ ]*[0-9a-f]+:[ ]+67 0f 01 db[ ]+addr16 vmsave[ ]*
+[ ]*[0-9a-f]+:[ ]+67 0f 01 df[ ]+addr16 invlpga
+[ ]*[0-9a-f]+:[ ]+67 0f 01 da[ ]+addr16 vmload
+[ ]*[0-9a-f]+:[ ]+67 0f 01 d8[ ]+addr16 vmrun
+[ ]*[0-9a-f]+:[ ]+67 0f 01 db[ ]+addr16 vmsave
[0-9a-f]+ <intel32>:
-[ ]*[0-9a-f]+:[ ]+0f 01 de[ ]+skinit[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 df[ ]+invlpga[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 da[ ]+vmload[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 d8[ ]+vmrun[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 db[ ]+vmsave[ ]*
+[ ]*[0-9a-f]+:[ ]+0f 01 de[ ]+skinit
+[ ]*[0-9a-f]+:[ ]+0f 01 df[ ]+invlpga
+[ ]*[0-9a-f]+:[ ]+0f 01 da[ ]+vmload
+[ ]*[0-9a-f]+:[ ]+0f 01 d8[ ]+vmrun
+[ ]*[0-9a-f]+:[ ]+0f 01 db[ ]+vmsave
[0-9a-f]+ <intel16>:
-[ ]*[0-9a-f]+:[ ]+67 0f 01 df[ ]+addr16 invlpga[ ]*
-[ ]*[0-9a-f]+:[ ]+67 0f 01 da[ ]+addr16 vmload[ ]*
-[ ]*[0-9a-f]+:[ ]+67 0f 01 d8[ ]+addr16 vmrun[ ]*
-[ ]*[0-9a-f]+:[ ]+67 0f 01 db[ ]+addr16 vmsave[ ]*
+[ ]*[0-9a-f]+:[ ]+67 0f 01 df[ ]+addr16 invlpga
+[ ]*[0-9a-f]+:[ ]+67 0f 01 da[ ]+addr16 vmload
+[ ]*[0-9a-f]+:[ ]+67 0f 01 d8[ ]+addr16 vmrun
+[ ]*[0-9a-f]+:[ ]+67 0f 01 db[ ]+addr16 vmsave
#pass
Disassembly of section .text:
0+000 <common>:
-[ ]*[0-9a-f]+:[ ]+0f 01 dd[ ]+clgi[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 df[ ]+invlpga[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 de[ ]+skinit[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 dc[ ]+stgi[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 da[ ]+vmload[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 d9[ ]+vmmcall[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 d8[ ]+vmrun[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 db[ ]+vmsave[ ]*
+[ ]*[0-9a-f]+:[ ]+0f 01 dd[ ]+clgi
+[ ]*[0-9a-f]+:[ ]+0f 01 df[ ]+invlpga
+[ ]*[0-9a-f]+:[ ]+0f 01 de[ ]+skinit
+[ ]*[0-9a-f]+:[ ]+0f 01 dc[ ]+stgi
+[ ]*[0-9a-f]+:[ ]+0f 01 da[ ]+vmload
+[ ]*[0-9a-f]+:[ ]+0f 01 d9[ ]+vmmcall
+[ ]*[0-9a-f]+:[ ]+0f 01 d8[ ]+vmrun
+[ ]*[0-9a-f]+:[ ]+0f 01 db[ ]+vmsave
[0-9a-f]+ <att64>:
-[ ]*[0-9a-f]+:[ ]+0f 01 df[ ]+invlpga[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 da[ ]+vmload[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 d8[ ]+vmrun[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 db[ ]+vmsave[ ]*
+[ ]*[0-9a-f]+:[ ]+0f 01 df[ ]+invlpga
+[ ]*[0-9a-f]+:[ ]+0f 01 da[ ]+vmload
+[ ]*[0-9a-f]+:[ ]+0f 01 d8[ ]+vmrun
+[ ]*[0-9a-f]+:[ ]+0f 01 db[ ]+vmsave
[0-9a-f]+ <att32>:
-[ ]*[0-9a-f]+:[ ]+0f 01 de[ ]+skinit[ ]*
-[ ]*[0-9a-f]+:[ ]+67 0f 01 df[ ]+addr32 invlpga[ ]
-[ ]*[0-9a-f]+:[ ]+67 0f 01 da[ ]+addr32 vmload[ ]
-[ ]*[0-9a-f]+:[ ]+67 0f 01 d8[ ]+addr32 vmrun[ ]
-[ ]*[0-9a-f]+:[ ]+67 0f 01 db[ ]+addr32 vmsave[ ]
+[ ]*[0-9a-f]+:[ ]+0f 01 de[ ]+skinit
+[ ]*[0-9a-f]+:[ ]+67 0f 01 df[ ]+addr32 invlpga
+[ ]*[0-9a-f]+:[ ]+67 0f 01 da[ ]+addr32 vmload
+[ ]*[0-9a-f]+:[ ]+67 0f 01 d8[ ]+addr32 vmrun
+[ ]*[0-9a-f]+:[ ]+67 0f 01 db[ ]+addr32 vmsave
[0-9a-f]+ <intel64>:
-[ ]*[0-9a-f]+:[ ]+0f 01 df[ ]+invlpga[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 da[ ]+vmload[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 d8[ ]+vmrun[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 db[ ]+vmsave[ ]*
+[ ]*[0-9a-f]+:[ ]+0f 01 df[ ]+invlpga
+[ ]*[0-9a-f]+:[ ]+0f 01 da[ ]+vmload
+[ ]*[0-9a-f]+:[ ]+0f 01 d8[ ]+vmrun
+[ ]*[0-9a-f]+:[ ]+0f 01 db[ ]+vmsave
[0-9a-f]+ <intel32>:
-[ ]*[0-9a-f]+:[ ]+0f 01 de[ ]+skinit[ ]*
-[ ]*[0-9a-f]+:[ ]+67 0f 01 df[ ]+addr32 invlpga[ ]
-[ ]*[0-9a-f]+:[ ]+67 0f 01 da[ ]+addr32 vmload[ ]
-[ ]*[0-9a-f]+:[ ]+67 0f 01 d8[ ]+addr32 vmrun[ ]
-[ ]*[0-9a-f]+:[ ]+67 0f 01 db[ ]+addr32 vmsave[ ]
+[ ]*[0-9a-f]+:[ ]+0f 01 de[ ]+skinit
+[ ]*[0-9a-f]+:[ ]+67 0f 01 df[ ]+addr32 invlpga
+[ ]*[0-9a-f]+:[ ]+67 0f 01 da[ ]+addr32 vmload
+[ ]*[0-9a-f]+:[ ]+67 0f 01 d8[ ]+addr32 vmrun
+[ ]*[0-9a-f]+:[ ]+67 0f 01 db[ ]+addr32 vmsave
#pass
-#as:
+#as:
#objdump: -dwMintel
#name: i386 TBM insns (Intel disassembly)
#source: tbm.s
Disassembly of section \.text:
0+ <_start>:
-[ ]*[a-f0-9]+: 66 0f 01 cc + tdcall *
+[ ]*[a-f0-9]+: 66 0f 01 cc + tdcall
#pass
Disassembly of section \.text:
00000000 <_start>:
-[ ]*[a-f0-9]+: 0f 01 ff tlbsync[ ]*
+[ ]*[a-f0-9]+: 0f 01 ff tlbsync
#pass
34: 8d 88 00 00 00 00 [ ]*lea 0x0\(%eax\),%ecx
[ ]+36: R_386_TLS_LDO_32 baz
3a: 8b 5d fc [ ]*mov -0x4\(%ebp\),%ebx
- 3d: c9 [ ]*leave[ ]*
- 3e: c3 [ ]*ret[ ]*
+ 3d: c9 [ ]*leave
+ 3e: c3 [ ]*ret
1e: 2d 00 00 00 00 [ ]*sub \$0x0,%eax
[ ]+1f: R_386_TLS_LE_32 bar
23: 65 8b 0d 00 00 00 00 [ ]*mov %gs:0x0,%ecx
- 2a: 90 [ ]*nop[ ]*
+ 2a: 90 [ ]*nop
2b: 81 e9 00 00 00 00 [ ]*sub \$0x0,%ecx
[ ]+2d: R_386_TLS_LE_32 baz
31: 65 8b 0d 00 00 00 00 [ ]*mov %gs:0x0,%ecx
4f: 65 a1 00 00 00 00 [ ]*mov %gs:0x0,%eax
55: 03 05 00 00 00 00 [ ]*add 0x0,%eax
57: R_386_TLS_IE foo
- 5b: c3 [ ]*ret[ ]*
+ 5b: c3 [ ]*ret
33: 03 8b 00 00 00 00 [ ]*add 0x0\(%ebx\),%ecx
[ ]+35: R_386_TLS_GOTIE foo
39: 8b 5d fc [ ]*mov -0x4\(%ebp\),%ebx
- 3c: c9 [ ]*leave[ ]*
- 3d: c3 [ ]*ret[ ]*
+ 3c: c9 [ ]*leave
+ 3d: c3 [ ]*ret
Disassembly of section \.text:
0+ <_start>:
- +[a-f0-9]+: f2 0f 01 e8 xsusldtrk[ ]*
- +[a-f0-9]+: f2 0f 01 e9 xresldtrk[ ]*
+ +[a-f0-9]+: f2 0f 01 e8 xsusldtrk
+ +[a-f0-9]+: f2 0f 01 e9 xresldtrk
#pass
0+ <foo>:
+[a-f0-9]+: 89 c3 mov %eax,%ebx
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
Disassembly of section .text:
0+ <bar>:
+[a-f0-9]+: 31 c3 xor %eax,%ebx
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
Disassembly of section .text:
0+ <foo1>:
+[a-f0-9]+: 89 c3 mov %eax,%ebx
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
Disassembly of section .text:
0+ <bar1>:
+[a-f0-9]+: 01 c3 add %eax,%ebx
+[a-f0-9]+: 90 nop
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
Disassembly of section .text:
+[a-f0-9]+: 90 nop
+[a-f0-9]+: 90 nop
+[a-f0-9]+: 90 nop
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
Disassembly of section .text:
+[a-f0-9]+: 31 c3 xor %eax,%ebx
+[a-f0-9]+: 90 nop
+[a-f0-9]+: 90 nop
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
#pass
Disassembly of section .text:
0+ <foo>:
-[ ]*[a-f0-9]+: 0f 01 d4 vmfunc
+[ ]*[a-f0-9]+: 0f 01 d4 vmfunc
[ ]*[a-f0-9]+: 90 nop
#pass
Disassembly of section .text:
0+000 <foo>:
- 0: 0f 01 c1 [ ]*vmcall
- 3: 0f 01 c2 [ ]*vmlaunch
- 6: 0f 01 c3 [ ]*vmresume
- 9: 0f 01 c4 [ ]*vmxoff
+ 0: 0f 01 c1 [ ]*vmcall
+ 3: 0f 01 c2 [ ]*vmlaunch
+ 6: 0f 01 c3 [ ]*vmresume
+ 9: 0f 01 c4 [ ]*vmxoff
c: 66 0f c7 30 [ ]*vmclear \(%eax\)
10: 0f c7 30 [ ]*vmptrld \(%eax\)
13: 0f c7 38 [ ]*vmptrst \(%eax\)
29: 0f 79 d8 [ ]*vmwrite %eax,%ebx
2c: 0f 79 18 [ ]*vmwrite \(%eax\),%ebx
2f: 0f 79 18 [ ]*vmwrite \(%eax\),%ebx
-[ ]*[a-f0-9]+: 0f 01 c1[ ]*vmcall *
-[ ]*[a-f0-9]+: 0f 01 c2[ ]*vmlaunch *
-[ ]*[a-f0-9]+: 0f 01 c3[ ]*vmresume *
-[ ]*[a-f0-9]+: 0f 01 c4[ ]*vmxoff *
+[ ]*[a-f0-9]+: 0f 01 c1[ ]*vmcall
+[ ]*[a-f0-9]+: 0f 01 c2[ ]*vmlaunch
+[ ]*[a-f0-9]+: 0f 01 c3[ ]*vmresume
+[ ]*[a-f0-9]+: 0f 01 c4[ ]*vmxoff
[ ]*[a-f0-9]+: 67 66 0f c7 30[ ]*vmclear \(%bx,%si\)
[ ]*[a-f0-9]+: 67 0f c7 30[ ]*vmptrld \(%bx,%si\)
[ ]*[a-f0-9]+: 67 0f c7 38[ ]*vmptrst \(%bx,%si\)
Disassembly of section .text:
0+ <_start>:
-[ ]*[a-f0-9]+:[ ]*f3 0f 09[ ]*wbnoinvd[ ]*
+[ ]*[a-f0-9]+:[ ]*f3 0f 09[ ]*wbnoinvd
#pass
Disassembly of section .text:
0+ <_start>:
-[ ]*[a-f0-9]+:[ ]*f3 0f 09[ ]*wbnoinvd[ ]*
+[ ]*[a-f0-9]+:[ ]*f3 0f 09[ ]*wbnoinvd
#pass
[ ]*[0-9a-f]+:[ ]+81 02 00 ff ff ff addl \$0xffffff00,\(%edx\)[ ]+[0-9a-f]+: (R_386_|dir)?32[ ]+sym
[ ]*[0-9a-f]+:[ ]+81 00 f4 00 00 00 addl \$0xf4,\(%eax\)[ ]+[0-9a-f]+: (R_386_|dir)?32[ ]+sym
[ ]*[0-9a-f]+:[ ]+81 02 f4 00 00 00 addl \$0xf4,\(%edx\)[ ]+[0-9a-f]+: (R_386_|dir)?32[ ]+sym
-[ ]*[0-9a-f]+:[ ]+c3 ret *
+[ ]*[0-9a-f]+:[ ]+c3 ret
#pass
be: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\)
c4: eb c2 jmp (0x)?88( .*)?
c6: 5d pop %rbp
- c7: c3 ret *
+ c7: c3 ret
#pass
be: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\)
c4: eb c2 jmp (0x)?88( .*)?
c6: 5d pop %rbp
- c7: c3 ret *
+ c7: c3 ret
#pass
be: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\)
c4: eb c2 jmp (0x)?88( .*)?
c6: 5d pop %rbp
- c7: c3 ret *
+ c7: c3 ret
#pass
bc: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\)
c2: eb c2 jmp (0x)?86( .*)?
c4: 5d pop %rbp
- c5: c3 ret *
+ c5: c3 ret
#pass
b9: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\)
bf: eb c2 jmp (0x)?83( .*)?
c1: 5d pop %rbp
- c2: c3 ret *
+ c2: c3 ret
#pass
bb: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\)
c1: eb c2 jmp (0x)?85( .*)?
c3: 5d pop %rbp
- c4: c3 ret *
+ c4: c3 ret
#pass
be: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\)
c4: eb c2 jmp (0x)?88( .*)?
c6: 5d pop %rbp
- c7: c3 ret *
+ c7: c3 ret
#pass
b8: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\)
be: eb c2 jmp (0x)?82( .*)?
c0: 5d pop %rbp
- c1: c3 ret *
+ c1: c3 ret
#pass
be: 89 b5 50 fb ff ff mov %esi,-0x4b0\(%rbp\)
c4: eb c2 jmp (0x)?88( .*)?
c6: 5d pop %rbp
- c7: c3 ret *
+ c7: c3 ret
#pass
16: 89 75 f4 mov %esi,-0xc\(%rbp\)
19: 89 75 f4 mov %esi,-0xc\(%rbp\)
1c: 89 75 f4 mov %esi,-0xc\(%rbp\)
- 1f: c3 ret *
+ 1f: c3 ret
20: 55 push %rbp
21: 64 89 04 25 01 00 00 00 mov %eax,%fs:0x1
29: 55 push %rbp
17: 89 75 f4 mov %esi,-0xc\(%rbp\)
1a: 89 75 f4 mov %esi,-0xc\(%rbp\)
1d: 89 75 f4 mov %esi,-0xc\(%rbp\)
- 20: c3 ret *
+ 20: c3 ret
21: 2e 2e 55 cs cs push %rbp
24: 64 89 04 25 01 00 00 00 mov %eax,%fs:0x1
2c: 55 push %rbp
+[a-f0-9]+: 66 66 2e 0f 1f 84 00 00 00 00 00 data16 cs nopw 0x0\(%rax,%rax,1\)
+[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\)
+[a-f0-9]+: f2 73 bf bnd jae 0 <_start>
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: c3 ret
#pass
Disassembly of section \.text:
0+ <\.text>:
-[ ]*[a-f0-9]+:[ ]*c4 e2 d2 5c[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e2 d2 5c[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*dc 90 90 90 90 90[ ]*fcoml.*
-[ ]*[a-f0-9]+:[ ]*c4 e2 56 5c[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e2 56 5c[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*dc 90 90 90 90 90[ ]*fcoml.*
[ ]*[a-f0-9]+:[ ]*c4 62 52 5c dc[ ]*tdpbf16ps %tmm5,%tmm4,\(bad\)
[ ]*[a-f0-9]+:[ ]*c4 c2 52 5c dc[ ]*tdpbf16ps %tmm5,\(bad\),%tmm3
[ ]*[a-f0-9]+:[ ]*c4 e2 79 4b 2c 11[ ]*tileloaddt1 tmm5,\[rcx\+rdx\*1\]
[ ]*[a-f0-9]+:[ ]*67 c4 e2 79 4b 0c 51[ ]*tileloaddt1 tmm1,\[ecx\+edx\*2\]
[ ]*[a-f0-9]+:[ ]*c4 e2 79 4b 0c 61[ ]*tileloaddt1 tmm1,\[rcx\+riz\*2\]
-[ ]*[a-f0-9]+:[ ]*c4 e2 78 49 c0[ ]*tilerelease *
+[ ]*[a-f0-9]+:[ ]*c4 e2 78 49 c0[ ]*tilerelease
[ ]*[a-f0-9]+:[ ]*c4 e2 7a 4b 2c 21[ ]*tilestored \[rcx\+riz\*1\],tmm5
[ ]*[a-f0-9]+:[ ]*67 c4 e2 7a 4b 2c 21[ ]*tilestored \[ecx\+eiz\*1\],tmm5
[ ]*[a-f0-9]+:[ ]*c4 e2 7a 4b 2c 11[ ]*tilestored \[rcx\+rdx\*1\],tmm5
[ ]*[a-f0-9]+:[ ]*c4 e2 79 4b 2c 11[ ]*tileloaddt1 tmm5,\[rcx\+rdx\*1\]
[ ]*[a-f0-9]+:[ ]*67 c4 e2 79 4b 0c 51[ ]*tileloaddt1 tmm1,\[ecx\+edx\*2\]
[ ]*[a-f0-9]+:[ ]*c4 e2 79 4b 0c 61[ ]*tileloaddt1 tmm1,\[rcx\+riz\*2\]
-[ ]*[a-f0-9]+:[ ]*c4 e2 78 49 c0[ ]*tilerelease *
+[ ]*[a-f0-9]+:[ ]*c4 e2 78 49 c0[ ]*tilerelease
[ ]*[a-f0-9]+:[ ]*c4 e2 7a 4b 2c 21[ ]*tilestored \[rcx\+riz\*1\],tmm5
[ ]*[a-f0-9]+:[ ]*67 c4 e2 7a 4b 2c 21[ ]*tilestored \[ecx\+eiz\*1\],tmm5
[ ]*[a-f0-9]+:[ ]*c4 e2 7a 4b 2c 11[ ]*tilestored \[rcx\+rdx\*1\],tmm5
[ ]*[a-f0-9]+:[ ]*c4 e2 79 4b 2c 11[ ]*tileloaddt1 \(%rcx,%rdx,1\),%tmm5
[ ]*[a-f0-9]+:[ ]*67 c4 e2 79 4b 0c 51[ ]*tileloaddt1 \(%ecx,%edx,2\),%tmm1
[ ]*[a-f0-9]+:[ ]*c4 e2 79 4b 0c 61[ ]*tileloaddt1 \(%rcx,%riz,2\),%tmm1
-[ ]*[a-f0-9]+:[ ]*c4 e2 78 49 c0[ ]*tilerelease *
+[ ]*[a-f0-9]+:[ ]*c4 e2 78 49 c0[ ]*tilerelease
[ ]*[a-f0-9]+:[ ]*c4 e2 7a 4b 2c 21[ ]*tilestored %tmm5,\(%rcx,%riz,1\)
[ ]*[a-f0-9]+:[ ]*67 c4 e2 7a 4b 2c 21[ ]*tilestored %tmm5,\(%ecx,%eiz,1\)
[ ]*[a-f0-9]+:[ ]*c4 e2 7a 4b 2c 11[ ]*tilestored %tmm5,\(%rcx,%rdx,1\)
[ ]*[a-f0-9]+:[ ]*c4 e2 79 4b 2c 11[ ]*tileloaddt1 \(%rcx,%rdx,1\),%tmm5
[ ]*[a-f0-9]+:[ ]*67 c4 e2 79 4b 0c 51[ ]*tileloaddt1 \(%ecx,%edx,2\),%tmm1
[ ]*[a-f0-9]+:[ ]*c4 e2 79 4b 0c 61[ ]*tileloaddt1 \(%rcx,%riz,2\),%tmm1
-[ ]*[a-f0-9]+:[ ]*c4 e2 78 49 c0[ ]*tilerelease *
+[ ]*[a-f0-9]+:[ ]*c4 e2 78 49 c0[ ]*tilerelease
[ ]*[a-f0-9]+:[ ]*c4 e2 7a 4b 2c 21[ ]*tilestored %tmm5,\(%rcx,%riz,1\)
[ ]*[a-f0-9]+:[ ]*67 c4 e2 7a 4b 2c 21[ ]*tilestored %tmm5,\(%ecx,%eiz,1\)
[ ]*[a-f0-9]+:[ ]*c4 e2 7a 4b 2c 11[ ]*tilestored %tmm5,\(%rcx,%rdx,1\)
0+ <.text>:
[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
[ ]*[a-f0-9]+: 0f ae 38 clflush \(%rax\)
-[ ]*[a-f0-9]+: 0f 05 syscall
+[ ]*[a-f0-9]+: 0f 05 syscall
[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32 %ecx,%ebx
-[ ]*[a-f0-9]+: c5 fc 77 vzeroall
-[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
-[ ]*[a-f0-9]+: 0f 37 getsec
-[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
+[ ]*[a-f0-9]+: c5 fc 77 vzeroall
+[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
+[ ]*[a-f0-9]+: 0f 37 getsec
+[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%rcx\)
[ ]*[a-f0-9]+: 66 0f 38 dc 01 aesenc \(%rcx\),%xmm0
[ ]*[a-f0-9]+: 66 0f 3a 44 c1 08 pclmulqdq \$0x8,%xmm1,%xmm0
[ ]*[a-f0-9]+: 0f 38 f0 19 movbe \(%rcx\),%ebx
[ ]*[a-f0-9]+: 48 0f c7 0e cmpxchg16b \(%rsi\)
[ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%rcx\),%rbx
-[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
+[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%rsi,2\)
[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1
-[ ]*[a-f0-9]+: 0f 01 da vmload
+[ ]*[a-f0-9]+: 0f 01 da vmload
[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
-[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
+[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
[ ]*[a-f0-9]+: c4 e2 60 f3 c9 blsr %ecx,%ebx
[ ]*[a-f0-9]+: 8f e9 60 01 c9 blcfill %ecx,%ebx
#pass
Disassembly of section .text:
0+ <.text>:
-[ ]*[a-f0-9]+: 0f 01 ca clac
-[ ]*[a-f0-9]+: 0f 01 cb stac
+[ ]*[a-f0-9]+: 0f 01 ca clac
+[ ]*[a-f0-9]+: 0f 01 cb stac
[ ]*[a-f0-9]+: 66 0f 38 f6 ca adcx %edx,%ecx
[ ]*[a-f0-9]+: f3 0f 38 f6 ca adox %edx,%ecx
[ ]*[a-f0-9]+: 0f c7 f8 rdseed %eax
-[ ]*[a-f0-9]+: 0f 01 fc clzero[ ]*
-[ ]*[a-f0-9]+: 0f 01 fc clzero[ ]*
-[ ]*[a-f0-9]+: 67 0f 01 fc addr32 clzero[ ]*
+[ ]*[a-f0-9]+: 0f 01 fc clzero
+[ ]*[a-f0-9]+: 0f 01 fc clzero
+[ ]*[a-f0-9]+: 67 0f 01 fc addr32 clzero
[ ]*[a-f0-9]+: 44 0f 38 c8 00 sha1nexte \(%rax\),%xmm8
[ ]*[a-f0-9]+: 48 0f c7 21 xsavec64 \(%rcx\)
[ ]*[a-f0-9]+: 48 0f c7 29 xsaves64 \(%rcx\)
[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx
[ ]*[a-f0-9]+:[ ]*66 0f ae 31[ ]*clwb \(%rcx\)
[ ]*[a-f0-9]+:[ ]*66 42 0f ae b4 f0 23 01 00 00[ ]*clwb 0x123\(%rax,%r14,8\)
-[ ]*[a-f0-9]+:[ ]*f3 0f 01 fa[ ]*mcommit[ ]*
+[ ]*[a-f0-9]+:[ ]*f3 0f 01 fa[ ]*mcommit
[ ]*[a-f0-9]+:[ ]*f3 0f c7 f8[ ]*rdpid %rax
[ ]*[a-f0-9]+:[ ]*f3 41 0f c7 fa[ ]*rdpid %r10
-[ ]*[a-f0-9]+:[ ]*0f 01 fd[ ]*rdpru[ ]*
-[ ]*[a-f0-9]+:[ ]*f3 0f 09[ ]*wbnoinvd[ ]*
+[ ]*[a-f0-9]+:[ ]*0f 01 fd[ ]*rdpru
+[ ]*[a-f0-9]+:[ ]*f3 0f 09[ ]*wbnoinvd
#pass
Disassembly of section .text:
0+ <.text>:
-[ ]*[0-9a-f]+:[ ]+0f 01 fe[ ]+invlpgb[ ]*
-[ ]*[0-9a-f]+:[ ]+0f 01 ff[ ]+tlbsync[ ]*
+[ ]*[0-9a-f]+:[ ]+0f 01 fe[ ]+invlpgb
+[ ]*[0-9a-f]+:[ ]+0f 01 ff[ ]+tlbsync
[ ]*[a-f0-9]+:[ ]*c4 43 35 44 d0 ab[ ]*vpclmulqdq \$0xab,%ymm8,%ymm9,%ymm10
[ ]*[a-f0-9]+:[ ]*c4 23 35 44 94 f0 24 01 00 00 7b[ ]*vpclmulqdq \$0x7b,0x124\(%rax,%r14,8\),%ymm9,%ymm10
[ ]*[a-f0-9]+:[ ]*c4 63 35 44 92 e0 0f 00 00 7b[ ]*vpclmulqdq \$0x7b,0xfe0\(%rdx\),%ymm9,%ymm10
[ ]*[a-f0-9]+: c4 e2 4d de 39[ ]+vaesdec \(%rcx\),%ymm6,%ymm7
[ ]*[a-f0-9]+: c4 e2 4d df d4[ ]+vaesdeclast %ymm4,%ymm6,%ymm2
[ ]*[a-f0-9]+: c4 e2 4d df 39[ ]+vaesdeclast \(%rcx\),%ymm6,%ymm7
-[ ]*[a-f0-9]+: f3 0f 01 ff[ ]+psmash[ ]*
-[ ]*[a-f0-9]+: f2 0f 01 ff[ ]+pvalidate[ ]*
-[ ]*[a-f0-9]+: f2 0f 01 fe[ ]+rmpupdate[ ]*
-[ ]*[a-f0-9]+: f3 0f 01 fe[ ]+rmpadjust[ ]*
+[ ]*[a-f0-9]+: f3 0f 01 ff[ ]+psmash
+[ ]*[a-f0-9]+: f2 0f 01 ff[ ]+pvalidate
+[ ]*[a-f0-9]+: f2 0f 01 fe[ ]+rmpupdate
+[ ]*[a-f0-9]+: f3 0f 01 fe[ ]+rmpadjust
[ ]*[a-f0-9]+: 66 0f 38 82 10[ ]+invpcid \(%rax\),%rdx
-[ ]*[a-f0-9]+: 0f 01 ee[ ]+rdpkru[ ]*
-[ ]*[a-f0-9]+: 0f 01 ef[ ]+wrpkru[ ]*
+[ ]*[a-f0-9]+: 0f 01 ee[ ]+rdpkru
+[ ]*[a-f0-9]+: 0f 01 ef[ ]+wrpkru
#pass
-#as:
+#as:
#objdump: -dwMintel
#name: x86-64 AVX GATHER insns (Intel disassembly)
#source: x86-64-avx-gather.s
-#as:
+#as:
#objdump: -dw
#name: x86-64 AVX GATHER insns
Disassembly of section .text:
0+ <_start>:
-[ ]*[a-f0-9]+: c5 fc 77 vzeroall
-[ ]*[a-f0-9]+: c5 f8 77 vzeroupper
+[ ]*[a-f0-9]+: c5 fc 77 vzeroall
+[ ]*[a-f0-9]+: c5 f8 77 vzeroupper
[ ]*[a-f0-9]+: c5 f8 ae 11 vldmxcsr DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c5 f8 ae 19 vstmxcsr DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e2 5d 2d 31 vmaskmovpd ymm6,ymm4,YMMWORD PTR \[rcx\]
+[a-f0-9]+: c4 e1 cc 14 d4 vunpcklps %ymm4,%ymm6,%ymm2
+[a-f0-9]+: c4 e1 cd 57 d4 vxorpd %ymm4,%ymm6,%ymm2
+[a-f0-9]+: c4 e1 cc 57 d4 vxorps %ymm4,%ymm6,%ymm2
- +[a-f0-9]+: c4 e1 fc 77 vzeroall
- +[a-f0-9]+: c4 e1 f8 77 vzeroupper
+ +[a-f0-9]+: c4 e1 fc 77 vzeroall
+ +[a-f0-9]+: c4 e1 f8 77 vzeroupper
#pass
Disassembly of section .text:
0+ <_start>:
-[ ]*[a-f0-9]+: c5 fc 77 vzeroall
-[ ]*[a-f0-9]+: c5 f8 77 vzeroupper
+[ ]*[a-f0-9]+: c5 fc 77 vzeroall
+[ ]*[a-f0-9]+: c5 f8 77 vzeroupper
[ ]*[a-f0-9]+: c5 f8 ae 11 vldmxcsr \(%rcx\)
[ ]*[a-f0-9]+: c5 f8 ae 19 vstmxcsr \(%rcx\)
[ ]*[a-f0-9]+: c4 e2 5d 2d 31 vmaskmovpd \(%rcx\),%ymm4,%ymm6
-#as:
+#as:
#objdump: -dw
#name: x86-64 AVX512F insns with nondefault values in ignored bits
-#as:
+#as:
#objdump: -dwMintel
#name: x86-64 BMI insns (Intel disassembly)
#source: x86-64-bmi.s
-#as:
+#as:
#objdump: -dw
#name: x86-64 BMI insns
-#as:
+#as:
#objdump: -dwMintel
#name: x86-64 BMI2 insns (Intel disassembly)
#source: x86-64-bmi2.s
-#as:
+#as:
#objdump: -dw
#name: x86-64 BMI2 insns
[ ]*[a-f0-9]+: 89 c3 mov %eax,%ebx
[ ]*[a-f0-9]+: 66 e8 00 00 callw 11 <bar\+0x6> f: R_X86_64_PC16 foo-0x2
[ ]*[a-f0-9]+: 66 48 e8 00 00 00 00 data16 rex\.W call 18 <bar\+0xd> 14: R_X86_64_PLT32 foo-0x4
-[ ]*[a-f0-9]+: 66 c3 retw *
+[ ]*[a-f0-9]+: 66 c3 retw
[ ]*[a-f0-9]+: 66 c2 08 00 retw \$0x8
#pass
[ ]*[a-f0-9]+: 66 e8 00 00 00 00 data16 call (0x2a|2a <.*>)
[ ]*[a-f0-9]+: 66 e9 00 00 00 00 data16 jmp (0x30|30 <.*>)
[ ]*[a-f0-9]+: 66 0f 82 00 00 00 00 data16 jb (0x37|37 <.*>)
-[ ]*[a-f0-9]+: 66 c3 data16 ret *
+[ ]*[a-f0-9]+: 66 c3 data16 ret
[ ]*[a-f0-9]+: 66 c2 08 00 data16 ret \$0x8
[ ]*[a-f0-9]+: 3e 74 03[ ]+je,pt +[0-9a-fx]+ <.*>
[ ]*[a-f0-9]+: 2e 74 00[ ]+je,pn +[0-9a-fx]+ <.*>
[ ]*[a-f0-9]+: 66 ff 20 data16 jmp \*\(%rax\)
[ ]*[a-f0-9]+: e8 .. 00 (00|10) 00 call [0-9a-fx]* <.*>
[ ]*[a-f0-9]+: e9 .. 00 (00|10) 00 jmp [0-9a-fx]* <.*>
-[ ]*[a-f0-9]+: 66 c3 data16 ret *
+[ ]*[a-f0-9]+: 66 c3 data16 ret
[ ]*[a-f0-9]+: 66 c2 08 00 data16 ret \$0x8
#pass
Disassembly of section .text:
0+000 <_cbw>:
- 0: 66 98 cbw
- 2: 98 cwde
- 3: 48 98 cdqe
- 5: 66 40 98 rex cbw
- 8: 40 98 rex cwde
- a: 66 48 98 data16 cdqe
+ 0: 66 98 cbw
+ 2: 98 cwde
+ 3: 48 98 cdqe
+ 5: 66 40 98 rex cbw
+ 8: 40 98 rex cwde
+ a: 66 48 98 data16 cdqe
0+00d <_cwd>:
- d: 66 99 cwd
- f: 99 cdq
- 10: 48 99 cqo
- 12: 66 40 99 rex cwd
- 15: 40 99 rex cdq
- 17: 66 48 99 data16 cqo
+ d: 66 99 cwd
+ f: 99 cdq
+ 10: 48 99 cqo
+ 12: 66 40 99 rex cwd
+ 15: 40 99 rex cdq
+ 17: 66 48 99 data16 cqo
#pass
Disassembly of section .text:
0+000 <_cbw>:
- 0: 66 98 cbtw
- 2: 98 cwtl
- 3: 48 98 cltq
- 5: 66 40 98 rex cbtw
- 8: 40 98 rex cwtl
- a: 66 48 98 data16 cltq
+ 0: 66 98 cbtw
+ 2: 98 cwtl
+ 3: 48 98 cltq
+ 5: 66 40 98 rex cbtw
+ 8: 40 98 rex cwtl
+ a: 66 48 98 data16 cltq
0+00d <_cwd>:
- d: 66 99 cwtd
- f: 99 cltd
- 10: 48 99 cqto
- 12: 66 40 99 rex cwtd
- 15: 40 99 rex cltd
- 17: 66 48 99 data16 cqto
+ d: 66 99 cwtd
+ f: 99 cltd
+ 10: 48 99 cqto
+ 12: 66 40 99 rex cwtd
+ 15: 40 99 rex cltd
+ 17: 66 48 99 data16 cqto
#pass
+[a-f0-9]+: f3 48 0f ae e8 incsspq rax
+[a-f0-9]+: f3 41 0f 1e cc rdsspd r12d
+[a-f0-9]+: f3 48 0f 1e c8 rdsspq rax
- +[a-f0-9]+: f3 0f 01 ea saveprevssp
+ +[a-f0-9]+: f3 0f 01 ea saveprevssp
+[a-f0-9]+: f3 41 0f 01 2c 24 rstorssp QWORD PTR \[r12\]
+[a-f0-9]+: 41 0f 38 f6 04 24 wrssd \[r12\],eax
+[a-f0-9]+: 4a 0f 38 f6 14 39 wrssq \[rcx\+r15\*1\],rdx
+[a-f0-9]+: 66 41 0f 38 f5 04 24 wrussd \[r12\],eax
+[a-f0-9]+: 66 48 0f 38 f5 0c 03 wrussq \[rbx\+rax\*1\],rcx
- +[a-f0-9]+: f3 0f 01 e8 setssbsy
+ +[a-f0-9]+: f3 0f 01 e8 setssbsy
+[a-f0-9]+: f3 42 0f ae 34 26 clrssbsy QWORD PTR \[rsi\+r12\*1\]
- +[a-f0-9]+: f3 0f 1e fa endbr64
- +[a-f0-9]+: f3 0f 1e fb endbr32
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fb endbr32
+[a-f0-9]+: f3 41 0f ae ec incsspd r12d
+[a-f0-9]+: f3 48 0f ae e8 incsspq rax
+[a-f0-9]+: f3 41 0f 1e cc rdsspd r12d
+[a-f0-9]+: f3 48 0f 1e c8 rdsspq rax
- +[a-f0-9]+: f3 0f 01 ea saveprevssp
+ +[a-f0-9]+: f3 0f 01 ea saveprevssp
+[a-f0-9]+: f3 41 0f 01 2c 24 rstorssp QWORD PTR \[r12\]
+[a-f0-9]+: 41 0f 38 f6 04 24 wrssd \[r12\],eax
+[a-f0-9]+: 44 0f 38 f6 20 wrssd \[rax\],r12d
+[a-f0-9]+: 66 44 0f 38 f5 20 wrussd \[rax\],r12d
+[a-f0-9]+: 66 48 0f 38 f5 0c 03 wrussq \[rbx\+rax\*1\],rcx
+[a-f0-9]+: 66 48 0f 38 f5 1c 01 wrussq \[rcx\+rax\*1\],rbx
- +[a-f0-9]+: f3 0f 01 e8 setssbsy
+ +[a-f0-9]+: f3 0f 01 e8 setssbsy
+[a-f0-9]+: f3 42 0f ae 34 26 clrssbsy QWORD PTR \[rsi\+r12\*1\]
- +[a-f0-9]+: f3 0f 1e fa endbr64
- +[a-f0-9]+: f3 0f 1e fb endbr32
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fb endbr32
#pass
+[a-f0-9]+: f3 48 0f ae e8 incsspq %rax
+[a-f0-9]+: f3 41 0f 1e cc rdsspd %r12d
+[a-f0-9]+: f3 48 0f 1e c8 rdsspq %rax
- +[a-f0-9]+: f3 0f 01 ea saveprevssp
+ +[a-f0-9]+: f3 0f 01 ea saveprevssp
+[a-f0-9]+: f3 41 0f 01 2c 24 rstorssp \(%r12\)
+[a-f0-9]+: 41 0f 38 f6 04 24 wrssd %eax,\(%r12\)
+[a-f0-9]+: 4a 0f 38 f6 14 39 wrssq %rdx,\(%rcx,%r15,1\)
+[a-f0-9]+: 66 41 0f 38 f5 04 24 wrussd %eax,\(%r12\)
+[a-f0-9]+: 66 48 0f 38 f5 0c 03 wrussq %rcx,\(%rbx,%rax,1\)
- +[a-f0-9]+: f3 0f 01 e8 setssbsy
+ +[a-f0-9]+: f3 0f 01 e8 setssbsy
+[a-f0-9]+: f3 42 0f ae 34 26 clrssbsy \(%rsi,%r12,1\)
- +[a-f0-9]+: f3 0f 1e fa endbr64
- +[a-f0-9]+: f3 0f 1e fb endbr32
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fb endbr32
+[a-f0-9]+: f3 41 0f ae ec incsspd %r12d
+[a-f0-9]+: f3 48 0f ae e8 incsspq %rax
+[a-f0-9]+: f3 41 0f 1e cc rdsspd %r12d
+[a-f0-9]+: f3 48 0f 1e c8 rdsspq %rax
- +[a-f0-9]+: f3 0f 01 ea saveprevssp
+ +[a-f0-9]+: f3 0f 01 ea saveprevssp
+[a-f0-9]+: f3 41 0f 01 2c 24 rstorssp \(%r12\)
+[a-f0-9]+: 41 0f 38 f6 04 24 wrssd %eax,\(%r12\)
+[a-f0-9]+: 44 0f 38 f6 20 wrssd %r12d,\(%rax\)
+[a-f0-9]+: 66 44 0f 38 f5 20 wrussd %r12d,\(%rax\)
+[a-f0-9]+: 66 48 0f 38 f5 0c 03 wrussq %rcx,\(%rbx,%rax,1\)
+[a-f0-9]+: 66 48 0f 38 f5 1c 01 wrussq %rbx,\(%rcx,%rax,1\)
- +[a-f0-9]+: f3 0f 01 e8 setssbsy
+ +[a-f0-9]+: f3 0f 01 e8 setssbsy
+[a-f0-9]+: f3 42 0f ae 34 26 clrssbsy \(%rsi,%r12,1\)
- +[a-f0-9]+: f3 0f 1e fa endbr64
- +[a-f0-9]+: f3 0f 1e fb endbr32
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fb endbr32
#pass
Disassembly of section \.text:
0+ <_start>:
-[ ]*[a-f0-9]+: 0f 01 fc clzero
+[ ]*[a-f0-9]+: 0f 01 fc clzero
#pass
Disassembly of section \.text:
0+ <\.text>:
-[ ]*[a-f0-9]+:[ ]*ff[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*ff[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*ef[ ]*out %eax,\(%dx\)
-[ ]*[a-f0-9]+:[ ]*ff[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*ff[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*d8 90 90 90 90 90[ ]*fcoms -0x6f6f6f70\(%rax\)
-[ ]*[a-f0-9]+:[ ]*c5 ec 4a[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ec 4a[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 ec 4a[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ec 4a[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 ec 4a[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 ed 4a[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ec 4a[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c5 ed 4a[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 ed 4a[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ed 4a[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 ed 4a[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 4a[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ed 4a[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 4a[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 4a[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 4a[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 4a[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 4a[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 4a[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 4a[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 4a[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 4a[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 4a[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 ec 41[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 4a[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c5 ec 41[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 ec 41[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ec 41[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 ec 41[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 ed 41[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ec 41[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c5 ed 41[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 ed 41[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ed 41[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 ed 41[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 41[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ed 41[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 41[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 41[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 41[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 41[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 41[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 41[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 41[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 41[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 41[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 41[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 ec 42[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 41[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c5 ec 42[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 ec 42[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ec 42[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 ec 42[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 ed 42[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ec 42[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c5 ed 42[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 ed 42[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ed 42[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 ed 42[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 42[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ed 42[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 42[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 42[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 42[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 42[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 42[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 42[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 42[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 42[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 42[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 42[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 ec 4b[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 42[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c5 ec 4b[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 ec 4b[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ec 4b[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 ec 4b[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 ed 4b[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ec 4b[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c5 ed 4b[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 ed 4b[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ed 4b[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 ed 4b[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 4b[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ed 4b[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 4b[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 4b[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 4b[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 4b[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 f8 44[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 4b[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c5 f8 44[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 f8 44[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f8 44[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 f8 44[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 f9 44[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f8 44[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c5 f9 44[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 f9 44[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f9 44[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 f9 44[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 f8 44[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f9 44[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c4 e1 f8 44[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 f8 44[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 f8 44[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 f8 44[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 f9 44[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 f8 44[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c4 e1 f9 44[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 f9 44[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 f9 44[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 f9 44[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 ec 45[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 f9 44[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c5 ec 45[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 ec 45[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ec 45[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 ec 45[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 ed 45[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ec 45[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c5 ed 45[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 ed 45[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ed 45[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 ed 45[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 45[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ed 45[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 45[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 45[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 45[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 45[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 45[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 45[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 45[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 45[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 45[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 45[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 f8 98[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 45[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c5 f8 98[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 f8 98[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f8 98[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 f8 98[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 f9 98[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f8 98[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c5 f9 98[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 f9 98[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f9 98[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 f9 98[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 f8 98[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f9 98[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c4 e1 f8 98[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 f8 98[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 f8 98[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 f8 98[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 f9 98[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 f8 98[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c4 e1 f9 98[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 f9 98[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 f9 98[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 f9 98[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 ec 46[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 f9 98[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c5 ec 46[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 ec 46[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ec 46[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 ec 46[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 ed 46[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ec 46[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c5 ed 46[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 ed 46[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ed 46[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 ed 46[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 46[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ed 46[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 46[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 46[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 46[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 46[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 46[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 46[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 46[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 46[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 46[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 46[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 ec 47[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 46[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c5 ec 47[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 ec 47[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ec 47[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 ec 47[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 ed 47[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ec 47[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c5 ed 47[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 ed 47[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ed 47[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 ed 47[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 47[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 ed 47[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 47[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 47[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 47[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 ec 47[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 47[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ec 47[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 47[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 47[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 47[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 ed 47[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 f8 99[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 ed 47[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c5 f8 99[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 f8 99[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f8 99[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 f8 99[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 f9 99[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f8 99[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c5 f9 99[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 f9 99[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f9 99[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 f9 99[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 f8 99[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f9 99[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c4 e1 f8 99[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 f8 99[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 f8 99[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 f8 99[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 f9 99[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 f8 99[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c4 e1 f9 99[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 f9 99[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 f9 99[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 f9 99[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e3 f9 30[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 f9 99[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c4 e3 f9 30[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop \(%rcx\)
-[ ]*[a-f0-9]+:[ ]*c4 e3 f9 30[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 f9 30[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push \$0x1
-[ ]*[a-f0-9]+:[ ]*c4 e3 f9 30[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 f9 30[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*04 01[ ]*add \$0x1,%al
-[ ]*[a-f0-9]+:[ ]*c4 e3 79 30[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 79 30[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop \(%rcx\)
-[ ]*[a-f0-9]+:[ ]*c4 e3 79 30[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 79 30[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push \$0x1
-[ ]*[a-f0-9]+:[ ]*c4 e3 79 30[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 79 30[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*04 01[ ]*add \$0x1,%al
-[ ]*[a-f0-9]+:[ ]*c4 e3 f9 31[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 f9 31[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop \(%rcx\)
-[ ]*[a-f0-9]+:[ ]*c4 e3 f9 31[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 f9 31[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push \$0x1
-[ ]*[a-f0-9]+:[ ]*c4 e3 f9 31[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 f9 31[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*04 01[ ]*add \$0x1,%al
-[ ]*[a-f0-9]+:[ ]*c4 e3 79 31[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 79 31[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop \(%rcx\)
-[ ]*[a-f0-9]+:[ ]*c4 e3 79 31[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 79 31[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push \$0x1
-[ ]*[a-f0-9]+:[ ]*c4 e3 79 31[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 79 31[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*04 01[ ]*add \$0x1,%al
-[ ]*[a-f0-9]+:[ ]*c4 e3 f9 32[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 f9 32[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop \(%rcx\)
-[ ]*[a-f0-9]+:[ ]*c4 e3 f9 32[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 f9 32[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push \$0x1
-[ ]*[a-f0-9]+:[ ]*c4 e3 f9 32[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 f9 32[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*04 01[ ]*add \$0x1,%al
-[ ]*[a-f0-9]+:[ ]*c4 e3 79 32[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 79 32[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop \(%rcx\)
-[ ]*[a-f0-9]+:[ ]*c4 e3 79 32[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 79 32[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push \$0x1
-[ ]*[a-f0-9]+:[ ]*c4 e3 79 32[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 79 32[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*04 01[ ]*add \$0x1,%al
-[ ]*[a-f0-9]+:[ ]*c4 e3 f9 33[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 f9 33[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop \(%rcx\)
-[ ]*[a-f0-9]+:[ ]*c4 e3 f9 33[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 f9 33[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push \$0x1
-[ ]*[a-f0-9]+:[ ]*c4 e3 f9 33[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 f9 33[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*04 01[ ]*add \$0x1,%al
-[ ]*[a-f0-9]+:[ ]*c4 e3 79 33[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 79 33[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*8f 01[ ]*pop \(%rcx\)
-[ ]*[a-f0-9]+:[ ]*c4 e3 79 33[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 79 33[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6a 01[ ]*push \$0x1
-[ ]*[a-f0-9]+:[ ]*c4 e3 79 33[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e3 79 33[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*04 01[ ]*add \$0x1,%al
-[ ]*[a-f0-9]+:[ ]*c5 f8 92[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f8 92[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 f8 92[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f8 92[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 f8 92[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 f9 92[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f8 92[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c5 f9 92[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 f9 92[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f9 92[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 f9 92[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 fb 92[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f9 92[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c5 fb 92[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 fb 92[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 fb 92[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 fb 92[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 f9 92[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 fb 92[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c4 e1 f9 92[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 f9 92[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 f9 92[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 f9 92[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 f8 93[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 f9 92[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c5 f8 93[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 f8 93[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f8 93[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 f8 93[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 f9 93[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f8 93[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c5 f9 93[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 f9 93[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f9 93[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 f9 93[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c5 fb 93[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 f9 93[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c5 fb 93[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c5 fb 93[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 fb 93[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c5 fb 93[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 e1 f9 93[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c5 fb 93[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c4 e1 f9 93[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*9b[ ]*fwait
-[ ]*[a-f0-9]+:[ ]*c4 e1 f9 93[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 f9 93[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*6f[ ]*outsl %ds:\(%rsi\),\(%dx\)
-[ ]*[a-f0-9]+:[ ]*c4 e1 f9 93[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*c4 62 01 1c[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*41 37[ ]*rex.B \(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*62 72 ad 08 1c[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*c4 e1 f9 93[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*3f[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*c4 62 01 1c[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*41 37[ ]*rex.B \(bad\)
+[ ]*[a-f0-9]+:[ ]*62 72 ad 08 1c[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*01 01[ ]*add[ ]*%eax,\(%rcx\)
-[ ]*[a-f0-9]+:[ ]*62 f3 7d 28 1b[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*62 f3 7d 28 1b[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*c8 25 62 f3[ ]*enter *\$0x6225,\$0xf3
-[ ]*[a-f0-9]+:[ ]*62 f3 75 08 23[ ]*\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*62 f3 75 08 23[ ]*\(bad\)
[ ]*[a-f0-9]+:[ ]*c2 25 62[ ]*ret *\$0x6225
-[ ]*[a-f0-9]+:[ ]*62 f2 7d 28 5b[ ]*\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]*41 37[ ]*rex.B \(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 28 5b[ ]*\(bad\)
+[ ]*[a-f0-9]+:[ ]*41 37[ ]*rex.B \(bad\)
#pass
Disassembly of section .text:
0+ <main>:
-[ ]*[a-f0-9]+: 0f ae e8[ ]* lfence
-[ ]*[a-f0-9]+: 0f ae f0[ ]* mfence
-[ ]*[a-f0-9]+: 0f ae f8[ ]* sfence
+[ ]*[a-f0-9]+: 0f ae e8[ ]* lfence
+[ ]*[a-f0-9]+: 0f ae f0[ ]* mfence
+[ ]*[a-f0-9]+: 0f ae f8[ ]* sfence
#pass
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 5 <ifunc> 1: R_X86_64_PLT32 ifunc(\+0xf+c|-0x4)
0+5 <ifunc>:
-[ ]*[a-f0-9]+: c3 ret *
+[ ]*[a-f0-9]+: c3 ret
0+6 <bar>:
[ ]*[a-f0-9]+: eb 00 jmp 8 <normal>
0+8 <normal>:
-[ ]*[a-f0-9]+: c3 ret *
+[ ]*[a-f0-9]+: c3 ret
#pass
[ ]*[a-f0-9]+: 48 0f b2 1a lss \(%rdx\),%rbx
[ ]*[a-f0-9]+: 48 ff 18 rex\.W lcall \*\(%rax\)
[ ]*[a-f0-9]+: 48 ff 29 rex\.W ljmp \*\(%rcx\)
-[ ]*[a-f0-9]+: 0f 05 syscall
-[ ]*[a-f0-9]+: 0f 07 sysretl
-[ ]*[a-f0-9]+: 48 0f 07 sysretq *
+[ ]*[a-f0-9]+: 0f 05 syscall
+[ ]*[a-f0-9]+: 0f 07 sysretl
+[ ]*[a-f0-9]+: 48 0f 07 sysretq
[ ]*[a-f0-9]+: 48 0f b4 01 lfs \(%rcx\),%rax
[ ]*[a-f0-9]+: 48 0f b4 01 lfs \(%rcx\),%rax
[ ]*[a-f0-9]+: 48 0f b5 0a lgs \(%rdx\),%rcx
-#as:
+#as:
#objdump: -dwMintel
#name: x86-64 INVPCID insns (Intel disassembly)
#source: x86-64-invpcid.s
-#as:
+#as:
#objdump: -dw
#name: x86-64 INVPCID insns
0+ <_start>:
+[a-f0-9]+: f3 aa rep stos %al,%es:\(%rdi\)
+[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
- +[a-f0-9]+: f3 c3 repz ret *
- +[a-f0-9]+: f3 c3 repz ret *
- +[a-f0-9]+: f3 c3 repz ret *
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: f3 c3 repz ret
+ +[a-f0-9]+: f3 c3 repz ret
+ +[a-f0-9]+: f3 c3 repz ret
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: ff d0 call \*%rax
- +[a-f0-9]+: f3 c3 repz ret *
- +[a-f0-9]+: 66 66 c3 data16 retw
- +[a-f0-9]+: f3 c3 repz ret *
+ +[a-f0-9]+: f3 c3 repz ret
+ +[a-f0-9]+: 66 66 c3 data16 retw
+ +[a-f0-9]+: f3 c3 repz ret
+[a-f0-9]+: 9b fwait
+[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
- +[a-f0-9]+: f3 c3 repz ret *
- +[a-f0-9]+: f3 c3 repz ret *
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: f3 c3 repz ret
+ +[a-f0-9]+: f3 c3 repz ret
+ +[a-f0-9]+: c3 ret
+[a-f0-9]+: f3 ff d0 repz call \*%rax
#pass
Disassembly of section .text:
0+ <_start>:
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: ff d2 call \*%rdx
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: ff e2 jmp \*%rdx
+[a-f0-9]+: ff 12 call \*\(%rdx\)
+[a-f0-9]+: ff 22 jmp \*\(%rdx\)
Disassembly of section .text:
0+ <_start>:
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: ff d2 call \*%rdx
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: ff e2 jmp \*%rdx
+[a-f0-9]+: ff 12 call \*\(%rdx\)
+[a-f0-9]+: ff 22 jmp \*\(%rdx\)
0+ <_start>:
+[a-f0-9]+: c5 f8 ae 55 00 vldmxcsr 0x0\(%rbp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 0f 01 55 00 lgdt 0x0\(%rbp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 0f c7 75 00 vmptrld 0x0\(%rbp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 0f c7 75 00 vmclear 0x0\(%rbp\)
+[a-f0-9]+: 66 0f 38 82 55 00 invpcid 0x0\(%rbp\),%rdx
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 67 0f 01 38 invlpg \(%eax\)
+[a-f0-9]+: 0f ae 7d 00 clflush 0x0\(%rbp\)
+[a-f0-9]+: 66 0f ae 7d 00 clflushopt 0x0\(%rbp\)
+[a-f0-9]+: 0f 18 5d 00 prefetcht2 0x0\(%rbp\)
+[a-f0-9]+: 0f 0d 4d 00 prefetchw 0x0\(%rbp\)
+[a-f0-9]+: 0f a1 pop %fs
- +[a-f0-9]+: 0f ae e8 lfence
- +[a-f0-9]+: 9d popf *
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 9d popf
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: d7 xlat %ds:\(%rbx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: d9 55 00 fsts 0x0\(%rbp\)
+[a-f0-9]+: d9 45 00 flds 0x0\(%rbp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: db 55 00 fistl 0x0\(%rbp\)
+[a-f0-9]+: df 55 00 fists 0x0\(%rbp\)
+[a-f0-9]+: db 45 00 fildl 0x0\(%rbp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: df 45 00 filds 0x0\(%rbp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 9b dd 75 00 fsave 0x0\(%rbp\)
+[a-f0-9]+: dd 65 00 frstor 0x0\(%rbp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: df 45 00 filds 0x0\(%rbp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: df 4d 00 fisttps 0x0\(%rbp\)
+[a-f0-9]+: d9 65 00 fldenv 0x0\(%rbp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 9b d9 75 00 fstenv 0x0\(%rbp\)
+[a-f0-9]+: d8 45 00 fadds 0x0\(%rbp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: d8 04 24 fadds \(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: d8 c3 fadd %st\(3\),%st
+[a-f0-9]+: d8 01 fadds \(%rcx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: df 01 filds \(%rcx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: df 11 fists \(%rcx\)
+[a-f0-9]+: 0f ae 29 xrstor \(%rcx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 0f 18 01 prefetchnta \(%rcx\)
+[a-f0-9]+: 0f c7 09 cmpxchg8b \(%rcx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 48 0f c7 09 cmpxchg16b \(%rcx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: ff c1 inc %ecx
+[a-f0-9]+: 0f 01 10 lgdt \(%rax\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 0f 0f 66 02 b0 pfcmpeq 0x2\(%rsi\),%mm4
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 8f 00 pop \(%rax\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 58 pop %rax
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 d1 11 rclw \(%rcx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: f7 01 01 00 00 00 testl \$0x1,\(%rcx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: ff 01 incl \(%rcx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: f7 11 notl \(%rcx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: f7 31 divl \(%rcx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: f7 21 mull \(%rcx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: f7 39 idivl \(%rcx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: f7 29 imull \(%rcx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 48 8d 04 40 lea \(%rax,%rax,2\),%rax
- +[a-f0-9]+: c9 leave *
+ +[a-f0-9]+: c9 leave
+[a-f0-9]+: 6e outsb %ds:\(%rsi\),\(%dx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: ac lods %ds:\(%rsi\),%al
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: f3 a5 rep movsl %ds:\(%rsi\),%es:\(%rdi\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: f3 af repz scas %es:\(%rdi\),%eax
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: f3 a7 repz cmpsl %es:\(%rdi\),%ds:\(%rsi\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: f3 ad rep lods %ds:\(%rsi\),%eax
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 41 83 03 01 addl \$0x1,\(%r11\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 41 0f ba 23 01 btl \$0x1,\(%r11\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 48 0f c1 03 xadd %rax,\(%rbx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 48 0f c1 c3 xadd %rax,%rbx
+[a-f0-9]+: 48 87 03 xchg %rax,\(%rbx\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 48 93 xchg %rax,%rbx
+[a-f0-9]+: 48 39 45 40 cmp %rax,0x40\(%rbp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 48 3b 45 40 cmp 0x40\(%rbp\),%rax
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 48 01 45 40 add %rax,0x40\(%rbp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 48 03 00 add \(%rax\),%rax
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 48 85 45 40 test %rax,0x40\(%rbp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 48 85 45 40 test %rax,0x40\(%rbp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
#pass
0+ <_start>:
+[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
- +[a-f0-9]+: 66 c3 data16 ret *
+ +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 66 c3 data16 ret
+[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 c2 14 00 data16 ret \$0x14
+[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: c3 ret
+[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: c2 1e 00 ret \$0x1e
+[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
- +[a-f0-9]+: 66 48 c3 data16 rex\.W ret *
+ +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 66 48 c3 data16 rex\.W ret
+[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 48 c2 28 00 data16 rex\.W ret \$0x28
#pass
0+ <_start>:
+[a-f0-9]+: 48 f7 14 24 notq \(%rsp\)
+[a-f0-9]+: 48 f7 14 24 notq \(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
- +[a-f0-9]+: 66 c3 data16 ret *
+ +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 66 c3 data16 ret
+[a-f0-9]+: 48 f7 14 24 notq \(%rsp\)
+[a-f0-9]+: 48 f7 14 24 notq \(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 c2 14 00 data16 ret \$0x14
+[a-f0-9]+: 48 f7 14 24 notq \(%rsp\)
+[a-f0-9]+: 48 f7 14 24 notq \(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: c3 ret
+[a-f0-9]+: 48 f7 14 24 notq \(%rsp\)
+[a-f0-9]+: 48 f7 14 24 notq \(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: c2 1e 00 ret \$0x1e
+[a-f0-9]+: 48 f7 14 24 notq \(%rsp\)
+[a-f0-9]+: 48 f7 14 24 notq \(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
- +[a-f0-9]+: 66 48 c3 data16 rex\.W ret *
+ +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 66 48 c3 data16 rex\.W ret
+[a-f0-9]+: 48 f7 14 24 notq \(%rsp\)
+[a-f0-9]+: 48 f7 14 24 notq \(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 48 c2 28 00 data16 rex\.W ret \$0x28
#pass
0+ <_start>:
+[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
- +[a-f0-9]+: 66 c3 data16 ret *
+ +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 66 c3 data16 ret
+[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 c2 14 00 data16 ret \$0x14
+[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: c3 ret
+[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: c2 1e 00 ret \$0x1e
+[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
- +[a-f0-9]+: 66 48 c3 data16 rex\.W ret *
+ +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 66 48 c3 data16 rex\.W ret
+[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 48 c2 28 00 data16 rex\.W ret \$0x28
#pass
0+ <_start>:
+[a-f0-9]+: 48 c1 24 24 00 shlq \$0x0,\(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
- +[a-f0-9]+: 66 c3 data16 ret *
+ +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 66 c3 data16 ret
+[a-f0-9]+: 48 c1 24 24 00 shlq \$0x0,\(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 c2 14 00 data16 ret \$0x14
+[a-f0-9]+: 48 c1 24 24 00 shlq \$0x0,\(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: c3 ret
+[a-f0-9]+: 48 c1 24 24 00 shlq \$0x0,\(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: c2 1e 00 ret \$0x1e
+[a-f0-9]+: 48 c1 24 24 00 shlq \$0x0,\(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
- +[a-f0-9]+: 66 48 c3 data16 rex\.W ret *
+ +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 66 48 c3 data16 rex\.W ret
+[a-f0-9]+: 48 c1 24 24 00 shlq \$0x0,\(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 48 c2 28 00 data16 rex\.W ret \$0x28
#pass
0+ <_start>:
+[a-f0-9]+: 48 c1 24 24 00 shlq \$0x0,\(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
- +[a-f0-9]+: 66 c3 data16 ret *
+ +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 66 c3 data16 ret
+[a-f0-9]+: 48 c1 24 24 00 shlq \$0x0,\(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 c2 14 00 data16 ret \$0x14
+[a-f0-9]+: 48 c1 24 24 00 shlq \$0x0,\(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: c3 ret
+[a-f0-9]+: 48 c1 24 24 00 shlq \$0x0,\(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: c2 1e 00 ret \$0x1e
+[a-f0-9]+: 48 c1 24 24 00 shlq \$0x0,\(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
- +[a-f0-9]+: 66 48 c3 data16 rex\.W ret *
+ +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 66 48 c3 data16 rex\.W ret
+[a-f0-9]+: 48 c1 24 24 00 shlq \$0x0,\(%rsp\)
- +[a-f0-9]+: 0f ae e8 lfence
+ +[a-f0-9]+: 0f ae e8 lfence
+[a-f0-9]+: 66 48 c2 28 00 data16 rex\.W ret \$0x28
#pass
[ ]*[a-f0-9]+: f2 74 08 bnd je 14 <foo>
[ ]*[a-f0-9]+: f2 eb 05 bnd jmp 14 <foo>
[ ]*[a-f0-9]+: f2 ff 23 bnd jmp \*\(%rbx\)
-[ ]*[a-f0-9]+: f2 c3 bnd ret *
+[ ]*[a-f0-9]+: f2 c3 bnd ret
0+14 <foo>:
-[ ]*[a-f0-9]+: f2 c3 bnd ret *
-[ ]*[a-f0-9]+: f2 c3 bnd ret *
-[ ]*[a-f0-9]+: f2 c3 bnd ret *
-[ ]*[a-f0-9]+: f2 c3 bnd ret *
+[ ]*[a-f0-9]+: f2 c3 bnd ret
+[ ]*[a-f0-9]+: f2 c3 bnd ret
+[ ]*[a-f0-9]+: f2 c3 bnd ret
+[ ]*[a-f0-9]+: f2 c3 bnd ret
[ ]*[a-f0-9]+: f2 e8 f2 ff ff ff bnd call 14 <foo>
[ ]*[a-f0-9]+: 48 01 c3 add %rax,%rbx
[ ]*[a-f0-9]+: e2 ed loop 14 <foo>
[ ]*[a-f0-9]+: f2 e9 11 02 00 00 bnd jmp [0-9a-f]+ <foo>
[ ]*[a-f0-9]+: f2 ff 21 bnd jmp \*\(%rcx\)
[ ]*[a-f0-9]+: f2 41 ff 24 24 bnd jmp \*\(%r12\)
-[ ]*[a-f0-9]+: f2 c3 bnd ret *
+[ ]*[a-f0-9]+: f2 c3 bnd ret
[ ]*[a-f0-9]+: f3 41 0f 1b 0b bndmk \(%r11\),%bnd1
[ ]*[a-f0-9]+: f3 0f 1b 08 bndmk \(%rax\),%bnd1
[ ]*[a-f0-9]+: f3 0f 1b 0c 25 99 03 00 00 bndmk 0x399,%bnd1
[ ]*[a-f0-9]+: f2 eb 09 bnd jmp [0-9a-f]+ <foo>
[ ]*[a-f0-9]+: f2 ff e1 bnd jmp \*%rcx
[ ]*[a-f0-9]+: f2 41 ff e4 bnd jmp \*%r12
-[ ]*[a-f0-9]+: f2 c3 bnd ret *
+[ ]*[a-f0-9]+: f2 c3 bnd ret
[a-f0-9]+ <foo>:
-[ ]*[a-f0-9]+: f2 c3 bnd ret *
+[ ]*[a-f0-9]+: f2 c3 bnd ret
[a-f0-9]+ <bad>:
[ ]*[a-f0-9]+: 0f 1a 30 bndldx \(%rax\),\(bad\)
Disassembly of section .text:
0+ <aaa>:
-[ ]*[a-f0-9]+: 37 \(bad\)
+[ ]*[a-f0-9]+: 37 \(bad\)
0+1 <aad0>:
-[ ]*[a-f0-9]+: d5 \(bad\)
+[ ]*[a-f0-9]+: d5 \(bad\)
[ ]*[a-f0-9]+: 0a .byte 0xa
0+3 <aad1>:
-[ ]*[a-f0-9]+: d5 \(bad\)
+[ ]*[a-f0-9]+: d5 \(bad\)
[ ]*[a-f0-9]+: 02 .byte 0x2
0+5 <aam0>:
-[ ]*[a-f0-9]+: d4 \(bad\)
+[ ]*[a-f0-9]+: d4 \(bad\)
[ ]*[a-f0-9]+: 0a .byte 0xa
0+7 <aam1>:
-[ ]*[a-f0-9]+: d4 \(bad\)
+[ ]*[a-f0-9]+: d4 \(bad\)
[ ]*[a-f0-9]+: 02 .byte 0x2
0+9 <aas>:
-[ ]*[a-f0-9]+: 3f \(bad\)
+[ ]*[a-f0-9]+: 3f \(bad\)
0+a <bound>:
[ ]*[a-f0-9]+: 62 .byte 0x62
[ ]*[a-f0-9]+: 10 .byte 0x10
0+c <daa>:
-[ ]*[a-f0-9]+: 27 \(bad\)
+[ ]*[a-f0-9]+: 27 \(bad\)
0+d <das>:
-[ ]*[a-f0-9]+: 2f \(bad\)
+[ ]*[a-f0-9]+: 2f \(bad\)
0+e <into>:
-[ ]*[a-f0-9]+: ce \(bad\)
+[ ]*[a-f0-9]+: ce \(bad\)
0+f <pusha>:
-[ ]*[a-f0-9]+: 60 \(bad\)
+[ ]*[a-f0-9]+: 60 \(bad\)
0+10 <popa>:
-[ ]*[a-f0-9]+: 61 \(bad\)
+[ ]*[a-f0-9]+: 61 \(bad\)
#pass
Disassembly of section .text:
0+ <aaa>:
-[ ]*[a-f0-9]+: 37 \(bad\)
+[ ]*[a-f0-9]+: 37 \(bad\)
0+1 <aad0>:
-[ ]*[a-f0-9]+: d5 \(bad\)
+[ ]*[a-f0-9]+: d5 \(bad\)
[ ]*[a-f0-9]+: 0a .byte 0xa
0+3 <aad1>:
-[ ]*[a-f0-9]+: d5 \(bad\)
+[ ]*[a-f0-9]+: d5 \(bad\)
[ ]*[a-f0-9]+: 02 .byte 0x2
0+5 <aam0>:
-[ ]*[a-f0-9]+: d4 \(bad\)
+[ ]*[a-f0-9]+: d4 \(bad\)
[ ]*[a-f0-9]+: 0a .byte 0xa
0+7 <aam1>:
-[ ]*[a-f0-9]+: d4 \(bad\)
+[ ]*[a-f0-9]+: d4 \(bad\)
[ ]*[a-f0-9]+: 02 .byte 0x2
0+9 <aas>:
-[ ]*[a-f0-9]+: 3f \(bad\)
+[ ]*[a-f0-9]+: 3f \(bad\)
0+a <bound>:
[ ]*[a-f0-9]+: 62 .byte 0x62
[ ]*[a-f0-9]+: 10 .byte 0x10
0+c <daa>:
-[ ]*[a-f0-9]+: 27 \(bad\)
+[ ]*[a-f0-9]+: 27 \(bad\)
0+d <das>:
-[ ]*[a-f0-9]+: 2f \(bad\)
+[ ]*[a-f0-9]+: 2f \(bad\)
0+e <into>:
-[ ]*[a-f0-9]+: ce \(bad\)
+[ ]*[a-f0-9]+: ce \(bad\)
0+f <pusha>:
-[ ]*[a-f0-9]+: 60 \(bad\)
+[ ]*[a-f0-9]+: 60 \(bad\)
0+10 <popa>:
-[ ]*[a-f0-9]+: 61 \(bad\)
+[ ]*[a-f0-9]+: 61 \(bad\)
#pass
[ ]*[a-f0-9]+: ff 10 call \*\(%rax\)
[ ]*[a-f0-9]+: 41 ff 10 call \*\(%r8\)
[ ]*[a-f0-9]+: ff 10 call \*\(%rax\)
-[ ]*[a-f0-9]+: cb lret
-[ ]*[a-f0-9]+: 48 cb lretq *
-[ ]*[a-f0-9]+: c3 ret *
-[ ]*[a-f0-9]+: cf iret
-[ ]*[a-f0-9]+: 66 cf iretw
-[ ]*[a-f0-9]+: 48 cf iretq
+[ ]*[a-f0-9]+: cb lret
+[ ]*[a-f0-9]+: 48 cb lretq
+[ ]*[a-f0-9]+: c3 ret
+[ ]*[a-f0-9]+: cf iret
+[ ]*[a-f0-9]+: 66 cf iretw
+[ ]*[a-f0-9]+: 48 cf iretq
[ ]*[a-f0-9]+: 41 8c 08 mov %cs,\(%r8\)
[ ]*[a-f0-9]+: 8c 08 mov %cs,\(%rax\)
[ ]*[a-f0-9]+: 41 8c 10 mov %ss,\(%r8\)
[ ]*[a-f0-9]+: 0f a1 pop %fs
[ ]*[a-f0-9]+: 0f a9 pop %gs
[ ]*[a-f0-9]+: 0f a9 pop %gs
-[ ]*[a-f0-9]+: 9d popf *
-[ ]*[a-f0-9]+: 9d popf *
+[ ]*[a-f0-9]+: 9d popf
+[ ]*[a-f0-9]+: 9d popf
[ ]*[a-f0-9]+: 41 ff 30 push \(%r8\)
[ ]*[a-f0-9]+: ff 30 push \(%rax\)
[ ]*[a-f0-9]+: 0f a0 push %fs
[ ]*[a-f0-9]+: 0f a0 push %fs
[ ]*[a-f0-9]+: 0f a8 push %gs
[ ]*[a-f0-9]+: 0f a8 push %gs
-[ ]*[a-f0-9]+: 9c pushf *
-[ ]*[a-f0-9]+: 9c pushf *
-[ ]*[a-f0-9]+: 0f 77 emms
-[ ]*[a-f0-9]+: 0f 0e femms
-[ ]*[a-f0-9]+: 0f 08 invd
+[ ]*[a-f0-9]+: 9c pushf
+[ ]*[a-f0-9]+: 9c pushf
+[ ]*[a-f0-9]+: 0f 77 emms
+[ ]*[a-f0-9]+: 0f 0e femms
+[ ]*[a-f0-9]+: 0f 08 invd
[ ]*[a-f0-9]+: 41 0f 01 38 invlpg \(%r8\)
[ ]*[a-f0-9]+: 0f 01 38 invlpg \(%rax\)
[ ]*[a-f0-9]+: 41 0f 01 38 invlpg \(%r8\)
[ ]*[a-f0-9]+: 0f 00 c8 str %eax
[ ]*[a-f0-9]+: 66 0f 00 c8 str %ax
[ ]*[a-f0-9]+: 0f 00 08 str \(%rax\)
-[ ]*[a-f0-9]+: 0f 05 syscall
-[ ]*[a-f0-9]+: 0f 07 sysretl
-[ ]*[a-f0-9]+: 48 0f 07 sysretq *
-[ ]*[a-f0-9]+: 0f 01 f8 swapgs
+[ ]*[a-f0-9]+: 0f 05 syscall
+[ ]*[a-f0-9]+: 0f 07 sysretl
+[ ]*[a-f0-9]+: 48 0f 07 sysretq
+[ ]*[a-f0-9]+: 0f 01 f8 swapgs
[ ]*[a-f0-9]+: 66 68 22 22 pushw \$0x2222
-[ ]*[a-f0-9]+: f1 int1 +
-[ ]*[a-f0-9]+: cc int3 +
+[ ]*[a-f0-9]+: f1 int1
+[ ]*[a-f0-9]+: cc int3
[ ]*[a-f0-9]+: cd 90 int \$0x90
[ ]*[a-f0-9]+: f6 c9 01 test \$(0x)?0*1,%cl
[ ]*[a-f0-9]+: 66 f7 c9 02 00 test \$(0x)?0*2,%cx
Disassembly of section .text:
0+ <_start>:
-[ ]*[a-f0-9]+: 0f 01 ee rdpkru
-[ ]*[a-f0-9]+: 0f 01 ef wrpkru
+[ ]*[a-f0-9]+: 0f 01 ee rdpkru
+[ ]*[a-f0-9]+: 0f 01 ef wrpkru
#pass
Disassembly of section .text:
0+ <_start>:
-[ ]*[a-f0-9]+:[ ]*0f 01 c5[ ]*pconfig[ ]*
+[ ]*[a-f0-9]+:[ ]*0f 01 c5[ ]*pconfig
#pass
Disassembly of section .text:
0+ <_start>:
-[ ]*[a-f0-9]+:[ ]*0f 01 c5[ ]*pconfig[ ]*
+[ ]*[a-f0-9]+:[ ]*0f 01 c5[ ]*pconfig
#pass
Displaying notes found in: .note.gnu.property
[ ]+Owner[ ]+Data size[ ]+Description
GNU 0x[0-9a-f]+ NT_GNU_PROPERTY_TYPE_0
- Properties: x86 ISA used:
+ Properties: x86 ISA used: *
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 22 <hidden_def> 1e: R_X86_64_PLT32 hidden_undef-0x4
0+22 <hidden_def>:
-[ ]*[a-f0-9]+: c3 ret *
+[ ]*[a-f0-9]+: c3 ret
0+23 <weak_hidden_def>:
-[ ]*[a-f0-9]+: c3 ret *
+[ ]*[a-f0-9]+: c3 ret
0+24 <global_def>:
-[ ]*[a-f0-9]+: c3 ret *
+[ ]*[a-f0-9]+: c3 ret
0+25 <weak_def>:
-[ ]*[a-f0-9]+: c3 ret *
+[ ]*[a-f0-9]+: c3 ret
0+26 <local>:
-[ ]*[a-f0-9]+: c3 ret *
+[ ]*[a-f0-9]+: c3 ret
#pass
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 1f <hidden_def> 1b: R_X86_64_PLT32 hidden_undef-0x4
0+1f <hidden_def>:
-[ ]*[a-f0-9]+: c3 ret *
+[ ]*[a-f0-9]+: c3 ret
0+20 <weak_hidden_def>:
-[ ]*[a-f0-9]+: c3 ret *
+[ ]*[a-f0-9]+: c3 ret
0+21 <global_def>:
-[ ]*[a-f0-9]+: c3 ret *
+[ ]*[a-f0-9]+: c3 ret
0+22 <weak_def>:
-[ ]*[a-f0-9]+: c3 ret *
+[ ]*[a-f0-9]+: c3 ret
0+23 <local>:
-[ ]*[a-f0-9]+: c3 ret *
+[ ]*[a-f0-9]+: c3 ret
#pass
Disassembly of section .text:
0+ <printk>:
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: c3 ret
Disassembly of section .init.text:
[ ]*[a-f0-9]+: c6 f8 08 xabort 0x8
[ ]*[a-f0-9]+: c7 f8 fa ff ff ff xbegin 3 <foo\+0x3>
[ ]*[a-f0-9]+: c7 f8 00 00 00 00 xbegin f <foo\+0xf>
-[ ]*[a-f0-9]+: 0f 01 d5 xend
+[ ]*[a-f0-9]+: 0f 01 d5 xend
[ ]*[a-f0-9]+: c6 f8 08 xabort 0x8
[ ]*[a-f0-9]+: c7 f8 fa ff ff ff xbegin 15 <foo\+0x15>
[ ]*[a-f0-9]+: c7 f8 00 00 00 00 xbegin 21 <foo\+0x21>
-[ ]*[a-f0-9]+: 0f 01 d5 xend
-[ ]*[a-f0-9]+: 0f 01 d6 xtest
+[ ]*[a-f0-9]+: 0f 01 d5 xend
+[ ]*[a-f0-9]+: 0f 01 d6 xtest
#pass
[ ]*[a-f0-9]+: c6 f8 08 xabort \$0x8
[ ]*[a-f0-9]+: c7 f8 fa ff ff ff xbegin 3 <foo\+0x3>
[ ]*[a-f0-9]+: c7 f8 00 00 00 00 xbegin f <foo\+0xf>
-[ ]*[a-f0-9]+: 0f 01 d5 xend
+[ ]*[a-f0-9]+: 0f 01 d5 xend
[ ]*[a-f0-9]+: c6 f8 08 xabort \$0x8
[ ]*[a-f0-9]+: c7 f8 fa ff ff ff xbegin 15 <foo\+0x15>
[ ]*[a-f0-9]+: c7 f8 00 00 00 00 xbegin 21 <foo\+0x21>
-[ ]*[a-f0-9]+: 0f 01 d5 xend
-[ ]*[a-f0-9]+: 0f 01 d6 xtest
+[ ]*[a-f0-9]+: 0f 01 d5 xend
+[ ]*[a-f0-9]+: 0f 01 d6 xtest
#pass
Disassembly of section .text:
0+ <_start>:
-[ ]*[a-f0-9]+: 0f 01 cf encls
-[ ]*[a-f0-9]+: 0f 01 d7 enclu
-[ ]*[a-f0-9]+: 0f 01 c0 enclv
+[ ]*[a-f0-9]+: 0f 01 cf encls
+[ ]*[a-f0-9]+: 0f 01 d7 enclu
+[ ]*[a-f0-9]+: 0f 01 c0 enclv
#pass
Disassembly of section \.text:
0+ <_start>:
-[ ]*[a-f0-9]+: 0f 01 e8 + serialize *
+[ ]*[a-f0-9]+: 0f 01 e8 + serialize
#pass
Disassembly of section .text:
0+ <foo>:
-[ ]*[a-f0-9]+: 0f 01 ca clac
-[ ]*[a-f0-9]+: 0f 01 cb stac
+[ ]*[a-f0-9]+: 0f 01 ca clac
+[ ]*[a-f0-9]+: 0f 01 cb stac
#pass
[ ]*[a-f0-9]+: df 08 fisttps \(%rax\)
[ ]*[a-f0-9]+: db 08 fisttpl \(%rax\)
[ ]*[a-f0-9]+: dd 08 fisttpll \(%rax\)
-[ ]*[a-f0-9]+: 0f ae e8 lfence
+[ ]*[a-f0-9]+: 0f ae e8 lfence
[ ]*[a-f0-9]+: 0f f7 c7 maskmovq %mm7,%mm0
-[ ]*[a-f0-9]+: 0f ae f0 mfence
+[ ]*[a-f0-9]+: 0f ae f0 mfence
[ ]*[a-f0-9]+: 0f 01 c8 monitor %rax,%ecx,%edx
[ ]*[a-f0-9]+: f2 0f d6 c8 movdq2q %xmm0,%mm1
[ ]*[a-f0-9]+: 0f c3 00 movnti %eax,\(%rax\)
[ ]*[a-f0-9]+: 0f 38 0a c1 psignd %mm1,%mm0
[ ]*[a-f0-9]+: 0f 38 09 c1 psignw %mm1,%mm0
[ ]*[a-f0-9]+: 0f fb c1 psubq %mm1,%mm0
-[ ]*[a-f0-9]+: 0f ae f8 sfence
+[ ]*[a-f0-9]+: 0f ae f8 sfence
#pass
[ ]*[a-f0-9]+: f2 0f 7d d2[ ]+hsubps xmm2,xmm2
[ ]*[a-f0-9]+: f2 0f 7d 1c 24[ ]+hsubps xmm3,(XMMWORD PTR )?\[rsp\]
[ ]*[a-f0-9]+: f2 0f f0 2e[ ]+lddqu xmm5,(XMMWORD PTR )?\[rsi\]
-[ ]*[a-f0-9]+: 0f 01 c8[ ]+monitor *
-[ ]*[a-f0-9]+: 0f 01 c8[ ]+monitor *
-[ ]*[a-f0-9]+: 0f 01 c8[ ]+monitor *
+[ ]*[a-f0-9]+: 0f 01 c8[ ]+monitor
+[ ]*[a-f0-9]+: 0f 01 c8[ ]+monitor
+[ ]*[a-f0-9]+: 0f 01 c8[ ]+monitor
[ ]*[a-f0-9]+: f2 0f 12 f7[ ]+movddup xmm6,xmm7
[ ]*[a-f0-9]+: f2 0f 12 38[ ]+movddup xmm7,(QWORD PTR )?\[rax\]
[ ]*[a-f0-9]+: f3 0f 16 01[ ]+movshdup xmm0,(XMMWORD PTR )?\[rcx\]
[ ]*[a-f0-9]+: f3 0f 16 ca[ ]+movshdup xmm1,xmm2
[ ]*[a-f0-9]+: f3 0f 12 13[ ]+movsldup xmm2,(XMMWORD PTR )?\[rbx\]
[ ]*[a-f0-9]+: f3 0f 12 dc[ ]+movsldup xmm3,xmm4
-[ ]*[a-f0-9]+: 0f 01 c9[ ]+mwait *
-[ ]*[a-f0-9]+: 0f 01 c9[ ]+mwait *
-[ ]*[a-f0-9]+: 0f 01 c9[ ]+mwait *
-[ ]*[a-f0-9]+: 67 0f 01 c8[ ]+addr32 monitor *
-[ ]*[a-f0-9]+: 67 0f 01 c8[ ]+addr32 monitor *
-[ ]*[a-f0-9]+: 67 0f 01 c8[ ]+addr32 monitor *
+[ ]*[a-f0-9]+: 0f 01 c9[ ]+mwait
+[ ]*[a-f0-9]+: 0f 01 c9[ ]+mwait
+[ ]*[a-f0-9]+: 0f 01 c9[ ]+mwait
+[ ]*[a-f0-9]+: 67 0f 01 c8[ ]+addr32 monitor
+[ ]*[a-f0-9]+: 67 0f 01 c8[ ]+addr32 monitor
+[ ]*[a-f0-9]+: 67 0f 01 c8[ ]+addr32 monitor
[ ]*[a-f0-9]+: f2 0f 12 38[ ]+movddup xmm7,(QWORD PTR )?\[rax\]
[ ]*[a-f0-9]+: f2 0f 12 38[ ]+movddup xmm7,(QWORD PTR )?\[rax\]
-[ ]*[a-f0-9]+: 0f 01 c8[ ]+monitor *
-[ ]*[a-f0-9]+: 67 0f 01 c8[ ]+addr32 monitor *
-[ ]*[a-f0-9]+: 0f 01 c9[ ]+mwait *
+[ ]*[a-f0-9]+: 0f 01 c8[ ]+monitor
+[ ]*[a-f0-9]+: 67 0f 01 c8[ ]+addr32 monitor
+[ ]*[a-f0-9]+: 0f 01 c9[ ]+mwait
#pass
Disassembly of section .text:
0+ <foo>:
-[ ]*[a-f0-9]+: 0f 01 c8 monitor
-[ ]*[a-f0-9]+: 0f 01 c9 mwait
-[ ]*[a-f0-9]+: 0f 01 c1 vmcall
-[ ]*[a-f0-9]+: 0f 01 c2 vmlaunch
-[ ]*[a-f0-9]+: 0f 01 c3 vmresume
-[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
-[ ]*[a-f0-9]+: 66 cf iretw
-[ ]*[a-f0-9]+: cf iretd
-[ ]*[a-f0-9]+: 48 cf iretq
-[ ]*[a-f0-9]+: 0f 07 sysretd
+[ ]*[a-f0-9]+: 0f 01 c8 monitor
+[ ]*[a-f0-9]+: 0f 01 c9 mwait
+[ ]*[a-f0-9]+: 0f 01 c1 vmcall
+[ ]*[a-f0-9]+: 0f 01 c2 vmlaunch
+[ ]*[a-f0-9]+: 0f 01 c3 vmresume
+[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
+[ ]*[a-f0-9]+: 66 cf iretw
+[ ]*[a-f0-9]+: cf iretd
+[ ]*[a-f0-9]+: 48 cf iretq
+[ ]*[a-f0-9]+: 0f 07 sysretd
[ ]*[a-f0-9]+: 48 89 e5 mov rbp,rsp
-[ ]*[a-f0-9]+: 48 0f 07 sysretq
-[ ]*[a-f0-9]+: 66 cf iretw
-[ ]*[a-f0-9]+: cf iretd
-[ ]*[a-f0-9]+: cf iretd
-[ ]*[a-f0-9]+: 48 cf iretq
-[ ]*[a-f0-9]+: 0f 07 sysretd
+[ ]*[a-f0-9]+: 48 0f 07 sysretq
+[ ]*[a-f0-9]+: 66 cf iretw
+[ ]*[a-f0-9]+: cf iretd
+[ ]*[a-f0-9]+: cf iretd
+[ ]*[a-f0-9]+: 48 cf iretq
+[ ]*[a-f0-9]+: 0f 07 sysretd
[ ]*[a-f0-9]+: 48 89 e5 mov rbp,rsp
-[ ]*[a-f0-9]+: 48 0f 07 sysretq
+[ ]*[a-f0-9]+: 48 0f 07 sysretq
#pass
0+ <foo>:
[ ]*[a-f0-9]+: 0f 01 c8 monitor %rax,%ecx,%edx
[ ]*[a-f0-9]+: 0f 01 c9 mwait %eax,%ecx
-[ ]*[a-f0-9]+: 0f 01 c1 vmcall
-[ ]*[a-f0-9]+: 0f 01 c2 vmlaunch
-[ ]*[a-f0-9]+: 0f 01 c3 vmresume
-[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
-[ ]*[a-f0-9]+: 66 cf iretw
-[ ]*[a-f0-9]+: cf iretl
-[ ]*[a-f0-9]+: 48 cf iretq
-[ ]*[a-f0-9]+: 0f 07 sysretl
+[ ]*[a-f0-9]+: 0f 01 c1 vmcall
+[ ]*[a-f0-9]+: 0f 01 c2 vmlaunch
+[ ]*[a-f0-9]+: 0f 01 c3 vmresume
+[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
+[ ]*[a-f0-9]+: 66 cf iretw
+[ ]*[a-f0-9]+: cf iretl
+[ ]*[a-f0-9]+: 48 cf iretq
+[ ]*[a-f0-9]+: 0f 07 sysretl
[ ]*[a-f0-9]+: 48 89 e5 movq %rsp,%rbp
-[ ]*[a-f0-9]+: 48 0f 07 sysretq
-[ ]*[a-f0-9]+: 66 cf iretw
-[ ]*[a-f0-9]+: cf iretl
-[ ]*[a-f0-9]+: cf iretl
-[ ]*[a-f0-9]+: 48 cf iretq
-[ ]*[a-f0-9]+: 0f 07 sysretl
+[ ]*[a-f0-9]+: 48 0f 07 sysretq
+[ ]*[a-f0-9]+: 66 cf iretw
+[ ]*[a-f0-9]+: cf iretl
+[ ]*[a-f0-9]+: cf iretl
+[ ]*[a-f0-9]+: 48 cf iretq
+[ ]*[a-f0-9]+: 0f 07 sysretl
[ ]*[a-f0-9]+: 48 89 e5 movq %rsp,%rbp
-[ ]*[a-f0-9]+: 48 0f 07 sysretq
+[ ]*[a-f0-9]+: 48 0f 07 sysretq
#pass
Disassembly of section .text:
0+ <.text>:
-[ ]*[a-f0-9]+:[ ]+0f 34[ ]+\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]+0f 35[ ]+\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]+48 0f 35[ ]+\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]+0f 34[ ]+\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]+0f 35[ ]+\(bad\)[ ]*
-[ ]*[a-f0-9]+:[ ]+48 0f 35[ ]+\(bad\)[ ]*
+[ ]*[a-f0-9]+:[ ]+0f 34[ ]+\(bad\)
+[ ]*[a-f0-9]+:[ ]+0f 35[ ]+\(bad\)
+[ ]*[a-f0-9]+:[ ]+48 0f 35[ ]+\(bad\)
+[ ]*[a-f0-9]+:[ ]+0f 34[ ]+\(bad\)
+[ ]*[a-f0-9]+:[ ]+0f 35[ ]+\(bad\)
+[ ]*[a-f0-9]+:[ ]+48 0f 35[ ]+\(bad\)
#pass
Disassembly of section .text:
0+ <.text>:
-[ ]*[a-f0-9]+: 0f 34 sysenter *
-[ ]*[a-f0-9]+: 0f 35 sysexitl *
-[ ]*[a-f0-9]+: 48 0f 35 sysexitq *
-[ ]*[a-f0-9]+: 0f 34 sysenter *
-[ ]*[a-f0-9]+: 0f 35 sysexitl *
-[ ]*[a-f0-9]+: 48 0f 35 sysexitq *
+[ ]*[a-f0-9]+: 0f 34 sysenter
+[ ]*[a-f0-9]+: 0f 35 sysexitl
+[ ]*[a-f0-9]+: 48 0f 35 sysexitq
+[ ]*[a-f0-9]+: 0f 34 sysenter
+[ ]*[a-f0-9]+: 0f 35 sysexitl
+[ ]*[a-f0-9]+: 48 0f 35 sysexitq
#pass
-#as:
+#as:
#objdump: -dwMintel
#name: x86-64 TBM insns (Intel disassembly)
#source: x86-64-tbm.s
Disassembly of section \.text:
0+ <_start>:
-[ ]*[a-f0-9]+: 66 0f 01 cc + tdcall *
-[ ]*[a-f0-9]+: 66 0f 01 cd + seamret *
-[ ]*[a-f0-9]+: 66 0f 01 ce + seamops *
-[ ]*[a-f0-9]+: 66 0f 01 cf + seamcall *
+[ ]*[a-f0-9]+: 66 0f 01 cc + tdcall
+[ ]*[a-f0-9]+: 66 0f 01 cd + seamret
+[ ]*[a-f0-9]+: 66 0f 01 ce + seamops
+[ ]*[a-f0-9]+: 66 0f 01 cf + seamcall
#pass
Disassembly of section \.text:
0+ <_start>:
- +[a-f0-9]+: f2 0f 01 e8 xsusldtrk[ ]*
- +[a-f0-9]+: f2 0f 01 e9 xresldtrk[ ]*
+ +[a-f0-9]+: f2 0f 01 e8 xsusldtrk
+ +[a-f0-9]+: f2 0f 01 e9 xresldtrk
#pass
Disassembly of section \.text:
0+ <_start>:
- +[a-f0-9]+: f3 0f 01 ec uiret *
- +[a-f0-9]+: f3 0f 01 ed testui *
- +[a-f0-9]+: f3 0f 01 ee clui *
- +[a-f0-9]+: f3 0f 01 ef stui *
+ +[a-f0-9]+: f3 0f 01 ec uiret
+ +[a-f0-9]+: f3 0f 01 ed testui
+ +[a-f0-9]+: f3 0f 01 ee clui
+ +[a-f0-9]+: f3 0f 01 ef stui
+[a-f0-9]+: f3 0f c7 f0 senduipi %rax
+[a-f0-9]+: f3 41 0f c7 f2 senduipi %r10
#pass
0+ <foo>:
+[a-f0-9]+: 89 c3 mov %eax,%ebx
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: c3 ret
Disassembly of section .text:
0+ <bar>:
+[a-f0-9]+: 31 c3 xor %eax,%ebx
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: c3 ret
Disassembly of section .text:
0+ <foo1>:
+[a-f0-9]+: 89 c3 mov %eax,%ebx
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: c3 ret
Disassembly of section .text:
0+ <bar1>:
+[a-f0-9]+: 01 c3 add %eax,%ebx
+[a-f0-9]+: 90 nop
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: c3 ret
Disassembly of section .text:
+[a-f0-9]+: 90 nop
+[a-f0-9]+: 90 nop
+[a-f0-9]+: 90 nop
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: c3 ret
Disassembly of section .text:
+[a-f0-9]+: 31 c3 xor %eax,%ebx
+[a-f0-9]+: 90 nop
+[a-f0-9]+: 90 nop
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: c3 ret
#pass
Disassembly of section .text:
0+ <foo>:
-[ ]*[a-f0-9]+: 0f 01 d4 vmfunc
+[ ]*[a-f0-9]+: 0f 01 d4 vmfunc
[ ]*[a-f0-9]+: 90 nop
#pass
Disassembly of section .text:
0+000 <foo>:
- 0: 0f 01 c1 [ ]*vmcall
- 3: 0f 01 c2 [ ]*vmlaunch
- 6: 0f 01 c3 [ ]*vmresume
- 9: 0f 01 c4 [ ]*vmxoff
+ 0: 0f 01 c1 [ ]*vmcall
+ 3: 0f 01 c2 [ ]*vmlaunch
+ 6: 0f 01 c3 [ ]*vmresume
+ 9: 0f 01 c4 [ ]*vmxoff
c: 66 0f c7 30 [ ]*vmclear \(%rax\)
10: 0f c7 30 [ ]*vmptrld \(%rax\)
13: 0f c7 38 [ ]*vmptrst \(%rax\)
Disassembly of section .text:
0+ <_start>:
-[ ]*[a-f0-9]+:[ ]*f3 0f 09[ ]*wbnoinvd[ ]*
+[ ]*[a-f0-9]+:[ ]*f3 0f 09[ ]*wbnoinvd
#pass
Disassembly of section .text:
0+ <_start>:
-[ ]*[a-f0-9]+:[ ]*f3 0f 09[ ]*wbnoinvd[ ]*
+[ ]*[a-f0-9]+:[ ]*f3 0f 09[ ]*wbnoinvd
#pass
Disassembly of section .text:
0+ <_start>:
-[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
-[ ]*[a-f0-9]+: 0f 01 d1 xsetbv
+[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
+[ ]*[a-f0-9]+: 0f 01 d1 xsetbv
[ ]*[a-f0-9]+: 0f ae 20 xsave \[rax\]
[ ]*[a-f0-9]+: 41 0f ae 20 xsave \[r8\]
[ ]*[a-f0-9]+: 41 0f ae 24 00 xsave \[r8\+rax\*1\]
Disassembly of section .text:
0+ <_start>:
-[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
-[ ]*[a-f0-9]+: 0f 01 d1 xsetbv
+[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
+[ ]*[a-f0-9]+: 0f 01 d1 xsetbv
[ ]*[a-f0-9]+: 0f ae 20 xsave \(%rax\)
[ ]*[a-f0-9]+: 41 0f ae 20 xsave \(%r8\)
[ ]*[a-f0-9]+: 41 0f ae 24 00 xsave \(%r8,%rax,1\)
[ ]*[a-f0-9]+: a3 11 22 33 44 55 66 77 88 movabs ds:0x8877665544332211,eax
[ ]*[a-f0-9]+: 48 a1 11 22 33 44 55 66 77 88 movabs rax,ds:0x8877665544332211
[ ]*[a-f0-9]+: 48 a3 11 22 33 44 55 66 77 88 movabs ds:0x8877665544332211,rax
-[ ]*[a-f0-9]+: 48 99 cqo
-[ ]*[a-f0-9]+: 48 98 cdqe
+[ ]*[a-f0-9]+: 48 99 cqo
+[ ]*[a-f0-9]+: 48 98 cdqe
[ ]*[a-f0-9]+: 48 63 c0 movsxd rax,eax
[ ]*[a-f0-9]+: 48 0f bf c0 movsx rax,ax
[ ]*[a-f0-9]+: 48 0f be c0 movsx rax,al
-[ ]*[a-f0-9]+: cb retf *
+[ ]*[a-f0-9]+: cb retf
[ ]*[a-f0-9]+: ca 10 00 retf 0x10
-[ ]*[a-f0-9]+: 66 cb retfw *
+[ ]*[a-f0-9]+: 66 cb retfw
[ ]*[a-f0-9]+: 66 ca 02 00 retfw 0x2
-[ ]*[a-f0-9]+: cb retf *
+[ ]*[a-f0-9]+: cb retf
[ ]*[a-f0-9]+: ca 04 00 retf 0x4
-[ ]*[a-f0-9]+: 48 cb retfq *
+[ ]*[a-f0-9]+: 48 cb retfq
[ ]*[a-f0-9]+: 48 ca 08 00 retfq 0x8
[0-9a-f]+ <bar>:
[ ]*[a-f0-9]+: a3 11 22 33 44 55 66 77 88 movabs %eax,0x8877665544332211
[ ]*[a-f0-9]+: 48 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%rax
[ ]*[a-f0-9]+: 48 a3 11 22 33 44 55 66 77 88 movabs %rax,0x8877665544332211
-[ ]*[a-f0-9]+: 48 99 cqto
-[ ]*[a-f0-9]+: 48 98 cltq
+[ ]*[a-f0-9]+: 48 99 cqto
+[ ]*[a-f0-9]+: 48 98 cltq
[ ]*[a-f0-9]+: 48 63 c0 movslq %eax,%rax
[ ]*[a-f0-9]+: 48 0f bf c0 movswq %ax,%rax
[ ]*[a-f0-9]+: 48 0f be c0 movsbq %al,%rax
-[ ]*[a-f0-9]+: cb lret *
+[ ]*[a-f0-9]+: cb lret
[ ]*[a-f0-9]+: ca 10 00 lret \$0x10
-[ ]*[a-f0-9]+: 66 cb lretw *
+[ ]*[a-f0-9]+: 66 cb lretw
[ ]*[a-f0-9]+: 66 ca 02 00 lretw \$0x2
-[ ]*[a-f0-9]+: cb lret *
+[ ]*[a-f0-9]+: cb lret
[ ]*[a-f0-9]+: ca 04 00 lret \$0x4
-[ ]*[a-f0-9]+: 48 cb lretq *
+[ ]*[a-f0-9]+: 48 cb lretq
[ ]*[a-f0-9]+: 48 ca 08 00 lretq \$0x8
[0-9a-f]+ <bar>:
[ ]*[a-f0-9]+: 0f ae 2b xrstor \[ebx\]
[ ]*[a-f0-9]+: 0f ae 23 xsave \[ebx\]
[ ]*[a-f0-9]+: 0f ae 33 xsaveopt \[ebx\]
-[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
-[ ]*[a-f0-9]+: 0f 01 d1 xsetbv
+[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
+[ ]*[a-f0-9]+: 0f 01 d1 xsetbv
[ ]*[a-f0-9]+: 0f ae 29 xrstor \[ecx\]
[ ]*[a-f0-9]+: 0f ae 21 xsave \[ecx\]
[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \[ecx\]
[ ]*[a-f0-9]+: 0f ae 2b xrstor \(%ebx\)
[ ]*[a-f0-9]+: 0f ae 23 xsave \(%ebx\)
[ ]*[a-f0-9]+: 0f ae 33 xsaveopt \(%ebx\)
-[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
-[ ]*[a-f0-9]+: 0f 01 d1 xsetbv
+[ ]*[a-f0-9]+: 0f 01 d0 xgetbv
+[ ]*[a-f0-9]+: 0f 01 d1 xsetbv
[ ]*[a-f0-9]+: 0f ae 29 xrstor \(%ecx\)
[ ]*[a-f0-9]+: 0f ae 21 xsave \(%ecx\)
[ ]*[a-f0-9]+: 0f ae 31 xsaveopt \(%ecx\)
# Define the syscall instruction for each target.
if { [istarget "i\[34567\]86-*-linux*"] || [istarget "x86_64-*-linux*"] } {
- set syscall_insn "\[ \t\](int|syscall|sysenter)\[ \t\]"
+ set syscall_insn "\[ \t\](int|syscall|sysenter)\[ \t\]*"
} elseif { [istarget "aarch64*-*-linux*"] || [istarget "arm*-*-linux*"] } {
set syscall_insn "\[ \t\](swi|svc)\[ \t\]"
} else {
# Define the syscall instructions, registers and numbers for each target.
if { [istarget "i\[34567\]86-*-linux*"] || [istarget "x86_64-*-linux*"] } {
- set syscall_insn "\[ \t\](int|syscall|sysenter)\[ \t\]"
+ set syscall_insn "\[ \t\](int|syscall|sysenter)\[ \t\]*"
set syscall_register "eax"
array set syscall_number {fork "(56|120)" vfork "(58|190)" \
clone "(56|120)"}
+[a-f0-9]+: 3e 3e 3e 8b 90 fc ff ff ff ds ds mov %ds:-0x4\(%eax\),%edx
+[a-f0-9]+: 85 d2 test %edx,%edx
+[a-f0-9]+: 74 00 je +[a-f0-9]+ <_start\+0x24>
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
#pass
Disassembly of section .text.default_process_op.isra.0:
0+737c <default_process_op.isra.0>:
- +[a-f0-9]+: 66 c3 retl
+ +[a-f0-9]+: 66 c3 retl
Disassembly of section .text.mpt_scsi_process_op:
+[a-f0-9]+: ff b3 04 00 00 00 push 0x4\(%ebx\)
+[a-f0-9]+: ff a3 08 00 00 00 jmp \*0x8\(%ebx\)
+[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%eax\)
- +[a-f0-9]+: f3 0f 1e fb endbr32
+ +[a-f0-9]+: f3 0f 1e fb endbr32
+[a-f0-9]+: 68 00 00 00 00 push \$0x0
+[a-f0-9]+: e9 e2 ff ff ff jmp [a-f0-9]+ <bar1@plt-0x30>
+[a-f0-9]+: 66 90 xchg %ax,%ax
- +[a-f0-9]+: f3 0f 1e fb endbr32
+ +[a-f0-9]+: f3 0f 1e fb endbr32
+[a-f0-9]+: 68 08 00 00 00 push \$0x8
+[a-f0-9]+: e9 d2 ff ff ff jmp [a-f0-9]+ <bar1@plt-0x30>
+[a-f0-9]+: 66 90 xchg %ax,%ax
Disassembly of section .plt.sec:
[a-f0-9]+ <bar1@plt>:
- +[a-f0-9]+: f3 0f 1e fb endbr32
+ +[a-f0-9]+: f3 0f 1e fb endbr32
+[a-f0-9]+: ff a3 0c 00 00 00 jmp \*0xc\(%ebx\)
+[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
[a-f0-9]+ <bar2@plt>:
- +[a-f0-9]+: f3 0f 1e fb endbr32
+ +[a-f0-9]+: f3 0f 1e fb endbr32
+[a-f0-9]+: ff a3 10 00 00 00 jmp \*0x10\(%ebx\)
+[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
+[a-f0-9]+: e8 c7 ff ff ff call [a-f0-9]+ <bar1@plt>
+[a-f0-9]+: 83 c4 08 add \$0x8,%esp
+[a-f0-9]+: 5b pop %ebx
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
[a-f0-9]+ <__x86.get_pc_thunk.bx>:
+[a-f0-9]+: 8b 1c 24 mov \(%esp\),%ebx
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
#pass
+[a-f0-9]+: ff b3 04 00 00 00 push 0x4\(%ebx\)
+[a-f0-9]+: ff a3 08 00 00 00 jmp \*0x8\(%ebx\)
+[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%eax\)
- +[a-f0-9]+: f3 0f 1e fb endbr32
+ +[a-f0-9]+: f3 0f 1e fb endbr32
+[a-f0-9]+: 68 00 00 00 00 push \$0x0
+[a-f0-9]+: e9 e2 ff ff ff jmp 140 <bar1@plt-0x30>
+[a-f0-9]+: 66 90 xchg %ax,%ax
- +[a-f0-9]+: f3 0f 1e fb endbr32
+ +[a-f0-9]+: f3 0f 1e fb endbr32
+[a-f0-9]+: 68 08 00 00 00 push \$0x8
+[a-f0-9]+: e9 d2 ff ff ff jmp 140 <bar1@plt-0x30>
+[a-f0-9]+: 66 90 xchg %ax,%ax
Disassembly of section .plt.sec:
0+170 <bar1@plt>:
- +[a-f0-9]+: f3 0f 1e fb endbr32
+ +[a-f0-9]+: f3 0f 1e fb endbr32
+[a-f0-9]+: ff a3 0c 00 00 00 jmp \*0xc\(%ebx\)
+[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
0+180 <bar2@plt>:
- +[a-f0-9]+: f3 0f 1e fb endbr32
+ +[a-f0-9]+: f3 0f 1e fb endbr32
+[a-f0-9]+: ff a3 10 00 00 00 jmp \*0x10\(%ebx\)
+[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
+[a-f0-9]+: e8 c7 ff ff ff call 170 <bar1@plt>
+[a-f0-9]+: 83 c4 08 add \$0x8,%esp
+[a-f0-9]+: 5b pop %ebx
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
0+1ae <__x86.get_pc_thunk.bx>:
+[a-f0-9]+: 8b 1c 24 mov \(%esp\),%ebx
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
#pass
+[a-f0-9]+: ff b3 04 00 00 00 push 0x4\(%ebx\)
+[a-f0-9]+: ff a3 08 00 00 00 jmp \*0x8\(%ebx\)
+[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%eax\)
- +[a-f0-9]+: f3 0f 1e fb endbr32
+ +[a-f0-9]+: f3 0f 1e fb endbr32
+[a-f0-9]+: 68 00 00 00 00 push \$0x0
+[a-f0-9]+: e9 e2 ff ff ff jmp [a-f0-9]+ <bar1@plt-0x30>
+[a-f0-9]+: 66 90 xchg %ax,%ax
- +[a-f0-9]+: f3 0f 1e fb endbr32
+ +[a-f0-9]+: f3 0f 1e fb endbr32
+[a-f0-9]+: 68 08 00 00 00 push \$0x8
+[a-f0-9]+: e9 d2 ff ff ff jmp [a-f0-9]+ <bar1@plt-0x30>
+[a-f0-9]+: 66 90 xchg %ax,%ax
Disassembly of section .plt.sec:
[a-f0-9]+ <bar1@plt>:
- +[a-f0-9]+: f3 0f 1e fb endbr32
+ +[a-f0-9]+: f3 0f 1e fb endbr32
+[a-f0-9]+: ff a3 0c 00 00 00 jmp \*0xc\(%ebx\)
+[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
[a-f0-9]+ <bar2@plt>:
- +[a-f0-9]+: f3 0f 1e fb endbr32
+ +[a-f0-9]+: f3 0f 1e fb endbr32
+[a-f0-9]+: ff a3 10 00 00 00 jmp \*0x10\(%ebx\)
+[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
+[a-f0-9]+: e8 c7 ff ff ff call [a-f0-9]+ <bar1@plt>
+[a-f0-9]+: 83 c4 08 add \$0x8,%esp
+[a-f0-9]+: 5b pop %ebx
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
[a-f0-9]+ <__x86.get_pc_thunk.bx>:
+[a-f0-9]+: 8b 1c 24 mov \(%esp\),%ebx
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
#pass
+[a-f0-9]+: ff b3 04 00 00 00 push 0x4\(%ebx\)
+[a-f0-9]+: ff a3 08 00 00 00 jmp \*0x8\(%ebx\)
+[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%eax\)
- +[a-f0-9]+: f3 0f 1e fb endbr32
+ +[a-f0-9]+: f3 0f 1e fb endbr32
+[a-f0-9]+: 68 00 00 00 00 push \$0x0
+[a-f0-9]+: e9 e2 ff ff ff jmp 140 <bar1@plt-0x30>
+[a-f0-9]+: 66 90 xchg %ax,%ax
- +[a-f0-9]+: f3 0f 1e fb endbr32
+ +[a-f0-9]+: f3 0f 1e fb endbr32
+[a-f0-9]+: 68 08 00 00 00 push \$0x8
+[a-f0-9]+: e9 d2 ff ff ff jmp 140 <bar1@plt-0x30>
+[a-f0-9]+: 66 90 xchg %ax,%ax
Disassembly of section .plt.sec:
0+170 <bar1@plt>:
- +[a-f0-9]+: f3 0f 1e fb endbr32
+ +[a-f0-9]+: f3 0f 1e fb endbr32
+[a-f0-9]+: ff a3 0c 00 00 00 jmp \*0xc\(%ebx\)
+[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
0+180 <bar2@plt>:
- +[a-f0-9]+: f3 0f 1e fb endbr32
+ +[a-f0-9]+: f3 0f 1e fb endbr32
+[a-f0-9]+: ff a3 10 00 00 00 jmp \*0x10\(%ebx\)
+[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
+[a-f0-9]+: e8 c7 ff ff ff call 170 <bar1@plt>
+[a-f0-9]+: 83 c4 08 add \$0x8,%esp
+[a-f0-9]+: 5b pop %ebx
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
0+1ae <__x86.get_pc_thunk.bx>:
+[a-f0-9]+: 8b 1c 24 mov \(%esp\),%ebx
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
#pass
+[a-f0-9]+: ff b3 04 00 00 00 push 0x4\(%ebx\)
+[a-f0-9]+: ff a3 08 00 00 00 jmp \*0x8\(%ebx\)
+[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%eax\)
- +[a-f0-9]+: f3 0f 1e fb endbr32
+ +[a-f0-9]+: f3 0f 1e fb endbr32
+[a-f0-9]+: 68 00 00 00 00 push \$0x0
+[a-f0-9]+: e9 e2 ff ff ff jmp 140 <bar1@plt-0x30>
+[a-f0-9]+: 66 90 xchg %ax,%ax
- +[a-f0-9]+: f3 0f 1e fb endbr32
+ +[a-f0-9]+: f3 0f 1e fb endbr32
+[a-f0-9]+: 68 08 00 00 00 push \$0x8
+[a-f0-9]+: e9 d2 ff ff ff jmp 140 <bar1@plt-0x30>
+[a-f0-9]+: 66 90 xchg %ax,%ax
Disassembly of section .plt.sec:
0+170 <bar1@plt>:
- +[a-f0-9]+: f3 0f 1e fb endbr32
+ +[a-f0-9]+: f3 0f 1e fb endbr32
+[a-f0-9]+: ff a3 0c 00 00 00 jmp \*0xc\(%ebx\)
+[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
0+180 <bar2@plt>:
- +[a-f0-9]+: f3 0f 1e fb endbr32
+ +[a-f0-9]+: f3 0f 1e fb endbr32
+[a-f0-9]+: ff a3 10 00 00 00 jmp \*0x10\(%ebx\)
+[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
+[a-f0-9]+: e8 c7 ff ff ff call 170 <bar1@plt>
+[a-f0-9]+: 83 c4 08 add \$0x8,%esp
+[a-f0-9]+: 5b pop %ebx
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
0+1ae <__x86.get_pc_thunk.bx>:
+[a-f0-9]+: 8b 1c 24 mov \(%esp\),%ebx
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
#pass
Disassembly of section .text:
0+8048084 <foo>:
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
0+8048085 <bar>:
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
0+8048086 <_start>:
+[a-f0-9]+: ff 15 a8 90 04 08 call \*0x80490a8
0+804807c <_start>:
+[a-f0-9]+: 8b 05 8c 90 04 08 mov 0x804908c,%eax
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
0+8048083 <ifunc>:
+[a-f0-9]+: b8 ef be ad 0b mov \$0xbadbeef,%eax
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
#pass
#...
[a-f0-9]+ <main>:
[a-f0-9]+: 31 c0 xor %eax,%eax
-[a-f0-9]+: c3 ret
+[a-f0-9]+: c3 ret
#pass
+[a-f0-9]+: e8 00 00 00 00 call [0-9a-f]+ <foo>
[0-9a-f]+ <foo>:
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
#pass
Disassembly of section .text:
0+[a-f0-9]+ <printk>:
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
Disassembly of section .init.text:
#...
0+[a-f0-9]+ <__x86.get_pc_thunk.bx>:
+[a-f0-9]+: 8b 1c 24 mov \(%esp\),%ebx
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
#pass
Disassembly of section .text:
0+[a-f0-9]+ <foo>:
-[ ]*[a-f0-9]+: c3 ret
+[ ]*[a-f0-9]+: c3 ret
0+[a-f0-9]+ <bar>:
[ ]*[a-f0-9]+: e8 fa ff ff ff call [a-f0-9]+ <foo>
-[ ]*[a-f0-9]+: c3 ret
+[ ]*[a-f0-9]+: c3 ret
#pass
0+[a-f0-9]+ <bar>:
[ ]*[a-f0-9]+: 8b 81 [a-f0-9][a-f0-9] [a-f0-9][a-f0-9] ff ff mov -0x[a-f0-9]+\(%ecx\),%eax
[ ]*[a-f0-9]+: 8b 00 mov \(%eax\),%eax
-[ ]*[a-f0-9]+: c3 ret
+[ ]*[a-f0-9]+: c3 ret
#pass
0+[a-f0-9]+ <bar>:
[ ]*[a-f0-9]+: 8b 81 [a-f0-9][a-f0-9] [a-f0-9][a-f0-9] 00 00 mov 0x[a-f0-9]+\(%ecx\),%eax
-[ ]*[a-f0-9]+: c3 ret
+[ ]*[a-f0-9]+: c3 ret
#pass
Disassembly of section .text:
[0-9a-f]+ <___tls_get_addr>:
-[ ]*[a-f0-9]+: c3 ret
+[ ]*[a-f0-9]+: c3 ret
[0-9a-f]+ <_start>:
[ ]*[a-f0-9]+: 55 push %ebp
[ ]*[a-f0-9]+: 89 f0 mov %esi,%eax
[ ]*[a-f0-9]+: 5b pop %ebx
[ ]*[a-f0-9]+: 5e pop %esi
-[ ]*[a-f0-9]+: c9 leave
-[ ]*[a-f0-9]+: c3 ret
+[ ]*[a-f0-9]+: c9 leave
+[ ]*[a-f0-9]+: c3 ret
#pass
Disassembly of section .text:
[0-9a-f]+ <___tls_get_addr>:
-[ ]*[a-f0-9]+: c3 ret
+[ ]*[a-f0-9]+: c3 ret
[0-9a-f]+ <_start>:
[ ]*[a-f0-9]+: 55 push %ebp
[ ]*[a-f0-9]+: 89 f0 mov %esi,%eax
[ ]*[a-f0-9]+: 5b pop %ebx
[ ]*[a-f0-9]+: 5e pop %esi
-[ ]*[a-f0-9]+: c9 leave
-[ ]*[a-f0-9]+: c3 ret
+[ ]*[a-f0-9]+: c9 leave
+[ ]*[a-f0-9]+: c3 ret
#pass
Disassembly of section .text:
0+110 <foo>:
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
0+111 <bar>:
+[a-f0-9]+: e8 00 00 00 00 call 116 <bar\+0x5>
+[a-f0-9]+: 81 c3 9e 10 00 00 add \$0x109e,%ebx
+[a-f0-9]+: e8 de ff ff ff call 100 <\*ABS\*@plt>
+[a-f0-9]+: 8d 83 4c ef ff ff lea -0x10b4\(%ebx\),%eax
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
#pass
Disassembly of section .text:
0+100 <__GI_foo>:
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
0+101 <bar>:
+[a-f0-9]+: e8 00 00 00 00 call 106 <bar\+0x5>
+[a-f0-9]+: 81 c3 9e 10 00 00 add \$0x109e,%ebx
+[a-f0-9]+: e8 de ff ff ff call f0 <\*ABS\*@plt>
+[a-f0-9]+: 8d 83 4c ef ff ff lea -0x10b4\(%ebx\),%eax
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
#pass
Disassembly of section .text:
0+190 <foo>:
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: c3 ret
0+191 <bar>:
+[a-f0-9]+: e8 ea ff ff ff call 180 <\*ABS\*\+0x190@plt>
+[a-f0-9]+: 48 8d 05 e3 ff ff ff lea -0x1d\(%rip\),%rax # 180 <\*ABS\*\+0x190@plt>
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: c3 ret
#pass
Disassembly of section .text:
0+190 <foo>:
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: c3 ret
0+191 <bar>:
+[a-f0-9]+: e8 ea ff ff ff call 180 <\*ABS\*\+0x190@plt>
+[a-f0-9]+: 48 8d 05 e3 ff ff ff lea -0x1d\(%rip\),%rax # 180 <\*ABS\*\+0x190@plt>
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: c3 ret
#pass
+[a-f0-9]+: c7 c0 a1 80 04 08 mov \$0x80480a1,%eax
0+80480a0 <foo>:
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
0+80480a1 <bar>:
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
#pass
+[a-f0-9]+: 48 c7 c0 f1 00 40 00 mov \$0x4000f1,%rax
0+4000f0 <foo>:
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: c3 ret
0+4000f1 <bar>:
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: c3 ret
#pass
+[a-f0-9]+: c7 c0 a1 80 04 08 mov \$0x80480a1,%eax
0+80480a0 <foo>:
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
0+80480a1 <bar>:
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
#pass
+[a-f0-9]+: 48 c7 c0 f1 00 40 00 mov \$0x4000f1,%rax
0+4000f0 <foo>:
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: c3 ret
0+4000f1 <bar>:
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: c3 ret
#pass
+[a-f0-9]+: 2e 2e 2e 2e 48 8b 98 fc ff ff ff cs cs cs cs mov -0x4\(%rax\),%rbx
+[a-f0-9]+: 48 85 db test %rbx,%rbx
+[a-f0-9]+: 74 00 je [a-f0-9]+ <_start\+0x25>
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: c3 ret
#pass
Disassembly of section .text:
0+198 <foo>:
- +[a-f0-9]+: f2 c3 bnd ret *
+ +[a-f0-9]+: f2 c3 bnd ret
0+19a <bar>:
+[a-f0-9]+: f2 e8 f0 ff ff ff bnd call 190 <\*ABS\*\+0x198@plt>
- +[a-f0-9]+: f2 c3 bnd ret *
+ +[a-f0-9]+: f2 c3 bnd ret
#pass
Disassembly of section .text.default_process_op.isra.0:
0+737c <default_process_op.isra.0>:
- +[a-f0-9]+: 66 c3 retl
+ +[a-f0-9]+: 66 c3 retl
Disassembly of section .text.mpt_scsi_process_op:
[a-f0-9]+ <bar>:
[ ]*[a-f0-9]+: e8 ([0-9a-f]{2} ){4} * call 0 .*
-[ ]*[a-f0-9]+: c3 ret *
+[ ]*[a-f0-9]+: c3 ret
#pass
+[a-f0-9]+: ff 35 ([0-9a-f]{2} ){4}[ ]+push 0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x8>
+[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmp \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x10>
+[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%rax\)
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: 68 00 00 00 00 push \$0x0
+[a-f0-9]+: e9 e2 ff ff ff jmp [a-f0-9]+ <bar1@plt-0x30>
+[a-f0-9]+: 66 90 xchg %ax,%ax
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: 68 01 00 00 00 push \$0x1
+[a-f0-9]+: e9 d2 ff ff ff jmp [a-f0-9]+ <bar1@plt-0x30>
+[a-f0-9]+: 66 90 xchg %ax,%ax
Disassembly of section .plt.sec:
[a-f0-9]+ <bar1@plt>:
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmp \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <bar1>
+[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
[a-f0-9]+ <bar2@plt>:
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmp \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <bar2>
+[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
+[a-f0-9]+: ff 35 ([0-9a-f]{2} ){4}[ ]+push 0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x8>
+[a-f0-9]+: f2 ff 25 ([0-9a-f]{2} ){4}[ ]+bnd jmp \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x10>
+[a-f0-9]+: 0f 1f 00 nopl \(%rax\)
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: 68 00 00 00 00 push \$0x0
+[a-f0-9]+: f2 e9 e1 ff ff ff bnd jmp [a-f0-9]+ <.*>
+[a-f0-9]+: 90 nop
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: 68 01 00 00 00 push \$0x1
+[a-f0-9]+: f2 e9 d1 ff ff ff bnd jmp [a-f0-9]+ <.*>
+[a-f0-9]+: 90 nop
Disassembly of section .plt.sec:
[a-f0-9]+ <bar1@plt>:
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: f2 ff 25 ([0-9a-f]{2} ){4}[ ]+bnd jmp \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <bar1>
+[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\)
[a-f0-9]+ <bar2@plt>:
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: f2 ff 25 ([0-9a-f]{2} ){4}[ ]+bnd jmp \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <bar2>
+[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\)
+[a-f0-9]+: ff 35 4a 01 20 00 push 0x20014a\(%rip\) # 200290 <_GLOBAL_OFFSET_TABLE_\+0x8>
+[a-f0-9]+: ff 25 4c 01 20 00 jmp \*0x20014c\(%rip\) # 200298 <_GLOBAL_OFFSET_TABLE_\+0x10>
+[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%rax\)
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: 68 00 00 00 00 push \$0x0
+[a-f0-9]+: e9 e2 ff ff ff jmp 140 <bar1@plt-0x30>
+[a-f0-9]+: 66 90 xchg %ax,%ax
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: 68 01 00 00 00 push \$0x1
+[a-f0-9]+: e9 d2 ff ff ff jmp 140 <bar1@plt-0x30>
+[a-f0-9]+: 66 90 xchg %ax,%ax
Disassembly of section .plt.sec:
0+170 <bar1@plt>:
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: ff 25 26 01 20 00 jmp \*0x200126\(%rip\) # 2002a0 <bar1>
+[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
0+180 <bar2@plt>:
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: ff 25 1e 01 20 00 jmp \*0x20011e\(%rip\) # 2002a8 <bar2>
+[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
+[a-f0-9]+: ff 35 ca 01 20 00 push 0x2001ca\(%rip\) # 2003c0 <_GLOBAL_OFFSET_TABLE_\+0x8>
+[a-f0-9]+: f2 ff 25 cb 01 20 00 bnd jmp \*0x2001cb\(%rip\) # 2003c8 <_GLOBAL_OFFSET_TABLE_\+0x10>
+[a-f0-9]+: 0f 1f 00 nopl \(%rax\)
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: 68 00 00 00 00 push \$0x0
+[a-f0-9]+: f2 e9 e1 ff ff ff bnd jmp 1f0 <.*>
+[a-f0-9]+: 90 nop
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: 68 01 00 00 00 push \$0x1
+[a-f0-9]+: f2 e9 d1 ff ff ff bnd jmp 1f0 <.*>
+[a-f0-9]+: 90 nop
Disassembly of section .plt.sec:
0+220 <bar1@plt>:
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: f2 ff 25 a5 01 20 00 bnd jmp \*0x2001a5\(%rip\) # 2003d0 <bar1>
+[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\)
0+230 <bar2@plt>:
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: f2 ff 25 9d 01 20 00 bnd jmp \*0x20019d\(%rip\) # 2003d8 <bar2>
+[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\)
+[a-f0-9]+: ff 35 ([0-9a-f]{2} ){4}[ ]+push 0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x8>
+[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmp \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x10>
+[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%rax\)
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: 68 00 00 00 00 push \$0x0
+[a-f0-9]+: e9 e2 ff ff ff jmp [a-f0-9]+ <bar1@plt-0x30>
+[a-f0-9]+: 66 90 xchg %ax,%ax
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: 68 01 00 00 00 push \$0x1
+[a-f0-9]+: e9 d2 ff ff ff jmp [a-f0-9]+ <bar1@plt-0x30>
+[a-f0-9]+: 66 90 xchg %ax,%ax
Disassembly of section .plt.sec:
[a-f0-9]+ <bar1@plt>:
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmp \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <bar1>
+[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
[a-f0-9]+ <bar2@plt>:
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmp \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <bar2>
+[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
+[a-f0-9]+: ff 35 ([0-9a-f]{2} ){4}[ ]+push 0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x8>
+[a-f0-9]+: f2 ff 25 ([0-9a-f]{2} ){4}[ ]+bnd jmp \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x10>
+[a-f0-9]+: 0f 1f 00 nopl \(%rax\)
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: 68 00 00 00 00 push \$0x0
+[a-f0-9]+: f2 e9 e1 ff ff ff bnd jmp [a-f0-9]+ <.*>
+[a-f0-9]+: 90 nop
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: 68 01 00 00 00 push \$0x1
+[a-f0-9]+: f2 e9 d1 ff ff ff bnd jmp [a-f0-9]+ <.*>
+[a-f0-9]+: 90 nop
Disassembly of section .plt.sec:
[a-f0-9]+ <bar1@plt>:
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: f2 ff 25 ([0-9a-f]{2} ){4}[ ]+bnd jmp \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <bar1>
+[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\)
[a-f0-9]+ <bar2@plt>:
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: f2 ff 25 ([0-9a-f]{2} ){4}[ ]+bnd jmp \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <bar2>
+[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\)
+[a-f0-9]+: ff 35 4a 01 20 00 push 0x20014a\(%rip\) # 200290 <_GLOBAL_OFFSET_TABLE_\+0x8>
+[a-f0-9]+: ff 25 4c 01 20 00 jmp \*0x20014c\(%rip\) # 200298 <_GLOBAL_OFFSET_TABLE_\+0x10>
+[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%rax\)
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: 68 00 00 00 00 push \$0x0
+[a-f0-9]+: e9 e2 ff ff ff jmp 140 <bar1@plt-0x30>
+[a-f0-9]+: 66 90 xchg %ax,%ax
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: 68 01 00 00 00 push \$0x1
+[a-f0-9]+: e9 d2 ff ff ff jmp 140 <bar1@plt-0x30>
+[a-f0-9]+: 66 90 xchg %ax,%ax
Disassembly of section .plt.sec:
0+170 <bar1@plt>:
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: ff 25 26 01 20 00 jmp \*0x200126\(%rip\) # 2002a0 <bar1>
+[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
0+180 <bar2@plt>:
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: ff 25 1e 01 20 00 jmp \*0x20011e\(%rip\) # 2002a8 <bar2>
+[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
+[a-f0-9]+: ff 35 ca 01 20 00 push 0x2001ca\(%rip\) # 2003c0 <_GLOBAL_OFFSET_TABLE_\+0x8>
+[a-f0-9]+: f2 ff 25 cb 01 20 00 bnd jmp \*0x2001cb\(%rip\) # 2003c8 <_GLOBAL_OFFSET_TABLE_\+0x10>
+[a-f0-9]+: 0f 1f 00 nopl \(%rax\)
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: 68 00 00 00 00 push \$0x0
+[a-f0-9]+: f2 e9 e1 ff ff ff bnd jmp 1f0 <.*>
+[a-f0-9]+: 90 nop
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: 68 01 00 00 00 push \$0x1
+[a-f0-9]+: f2 e9 d1 ff ff ff bnd jmp 1f0 <.*>
+[a-f0-9]+: 90 nop
Disassembly of section .plt.sec:
0+220 <bar1@plt>:
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: f2 ff 25 a5 01 20 00 bnd jmp \*0x2001a5\(%rip\) # 2003d0 <bar1>
+[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\)
0+230 <bar2@plt>:
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: f2 ff 25 9d 01 20 00 bnd jmp \*0x20019d\(%rip\) # 2003d8 <bar2>
+[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\)
+[a-f0-9]+: ff 35 ([0-9a-f]{2} ){4}[ ]+push 0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x8>
+[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmp \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x10>
+[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%rax\)
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: 68 00 00 00 00 push \$0x0
+[a-f0-9]+: e9 e2 ff ff ff jmp [a-f0-9]+ <bar1@plt-0x30>
+[a-f0-9]+: 66 90 xchg %ax,%ax
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: 68 01 00 00 00 push \$0x1
+[a-f0-9]+: e9 d2 ff ff ff jmp [a-f0-9]+ <bar1@plt-0x30>
+[a-f0-9]+: 66 90 xchg %ax,%ax
Disassembly of section .plt.sec:
[a-f0-9]+ <bar1@plt>:
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmp \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <bar1>
+[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
[a-f0-9]+ <bar2@plt>:
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmp \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <bar2>
+[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
+[a-f0-9]+: ff 35 ([0-9a-f]{2} ){4}[ ]+push 0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x8>
+[a-f0-9]+: f2 ff 25 ([0-9a-f]{2} ){4}[ ]+bnd jmp \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x10>
+[a-f0-9]+: 0f 1f 00 nopl \(%rax\)
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: 68 00 00 00 00 push \$0x0
+[a-f0-9]+: f2 e9 e1 ff ff ff bnd jmp [a-f0-9]+ <.*>
+[a-f0-9]+: 90 nop
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: 68 01 00 00 00 push \$0x1
+[a-f0-9]+: f2 e9 d1 ff ff ff bnd jmp [a-f0-9]+ <.*>
+[a-f0-9]+: 90 nop
Disassembly of section .plt.sec:
[a-f0-9]+ <bar1@plt>:
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: f2 ff 25 ([0-9a-f]{2} ){4}[ ]+bnd jmp \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <bar1>
+[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\)
[a-f0-9]+ <bar2@plt>:
- +[a-f0-9]+: f3 0f 1e fa endbr64
+ +[a-f0-9]+: f3 0f 1e fa endbr64
+[a-f0-9]+: f2 ff 25 ([0-9a-f]{2} ){4}[ ]+bnd jmp \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <bar2>
+[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\)
0+401000 <getaddr1>:
+[a-f0-9]+: 48 8d 05 0d 20 00 00 lea 0x200d\(%rip\),%rax # 403014 <__bss_start>
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
+[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%rax,%rax,1\)
0+401010 <getaddr2>:
+[a-f0-9]+: 48 8d 05 fd 1f 00 00 lea 0x1ffd\(%rip\),%rax # 403014 <__bss_start>
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
+[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%rax,%rax,1\)
0+401020 <begin>:
+[a-f0-9]+: e8 d7 ff ff ff call 401000 <getaddr1>
+[a-f0-9]+: e8 e2 ff ff ff call 401010 <getaddr2>
+[a-f0-9]+: 48 83 c4 28 add \$0x28,%rsp
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
#pass
0+401000 <getaddr1>:
+[a-f0-9]+: 48 8d 05 0d 20 00 00 lea 0x200d\(%rip\),%rax # 403014 <__bss_start>
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
+[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%rax,%rax,1\)
0+401010 <getaddr2>:
+[a-f0-9]+: 48 8d 05 fd 1f 00 00 lea 0x1ffd\(%rip\),%rax # 403014 <__bss_start>
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
+[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%rax,%rax,1\)
0+401020 <begin>:
+[a-f0-9]+: e8 d7 ff ff ff call 401000 <getaddr1>
+[a-f0-9]+: e8 e2 ff ff ff call 401010 <getaddr2>
+[a-f0-9]+: 48 83 c4 28 add \$0x28,%rsp
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
#pass
0+401000 <getaddr1>:
+[a-f0-9]+: 48 8d 05 0d 20 00 00 lea 0x200d\(%rip\),%rax # 403014 <__bss_start>
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
+[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%rax,%rax,1\)
0+401010 <getaddr2>:
+[a-f0-9]+: 48 8d 05 fd 1f 00 00 lea 0x1ffd\(%rip\),%rax # 403014 <__bss_start>
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
+[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%rax,%rax,1\)
0+401020 <begin>:
+[a-f0-9]+: e8 d7 ff ff ff call 401000 <getaddr1>
+[a-f0-9]+: e8 e2 ff ff ff call 401010 <getaddr2>
+[a-f0-9]+: 48 83 c4 28 add \$0x28,%rsp
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
#pass
+[a-f0-9]+: e8 4c 00 00 00 call 401060 <opti_Od>
+[a-f0-9]+: e8 07 00 00 00 call 401020 <opti_O1>
+[a-f0-9]+: 48 83 c4 28 add \$0x28,%rsp
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
+[a-f0-9]+: 66 90 xchg %ax,%ax
0+401020 <opti_O1>:
+[a-f0-9]+: 48 89 05 dc 1f 00 00 mov %rax,0x1fdc\(%rip\) # 403020 <Struct\+0x8>
+[a-f0-9]+: 83 c8 ff or \$0xffffffff,%eax
+[a-f0-9]+: c7 05 cb 1f 00 00 55 55 44 44 movl \$0x44445555,0x1fcb\(%rip\) # 40301c <Struct\+0x4>
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
+[a-f0-9]+: 66 2e 0f 1f 84 00 00 00 00 00 cs nopw 0x0\(%rax,%rax,1\)
+[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%rax\)
+[a-f0-9]+: 48 ba 88 88 88 88 88 88 88 88 movabs \$0x8888888888888888,%rdx
+[a-f0-9]+: 48 89 54 01 08 mov %rdx,0x8\(%rcx,%rax,1\)
+[a-f0-9]+: b8 ff ff ff ff mov \$0xffffffff,%eax
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
#pass
0+401000 <begin>:
+[a-f0-9]+: 66 90 xchg %ax,%ax
- +[a-f0-9]+: cc int3
+ +[a-f0-9]+: cc int3
+[a-f0-9]+: 48 8d 05 07 10 00 00 lea 0x1007\(%rip\),%rax # 402011 <initializedVar>
+[a-f0-9]+: 48 3b 05 ef 0f 00 00 cmp 0xfef\(%rip\),%rax # 402000 <Struct>
+[a-f0-9]+: 74 01 je 401014 <begin\+0x14>
- +[a-f0-9]+: cc int3
+ +[a-f0-9]+: cc int3
+[a-f0-9]+: 48 8d 05 fa 0f 00 00 lea 0xffa\(%rip\),%rax # 402015 <non_initialVar>
+[a-f0-9]+: 48 3b 05 e6 0f 00 00 cmp 0xfe6\(%rip\),%rax # 402008 <Struct\+0x8>
+[a-f0-9]+: 74 01 je 401025 <begin\+0x25>
- +[a-f0-9]+: cc int3
+ +[a-f0-9]+: cc int3
+[a-f0-9]+: 66 ba 80 00 mov \$0x80,%dx
+[a-f0-9]+: b0 12 mov \$0x12,%al
+[a-f0-9]+: ee out %al,\(%dx\)
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
#pass
+[a-f0-9]+: 48 89 74 24 20 mov %rsi,0x20\(%rsp\)
+[a-f0-9]+: 57 push %rdi
+[a-f0-9]+: 48 83 ec 20 sub \$0x20,%rsp
- +[a-f0-9]+: cc int3
+ +[a-f0-9]+: cc int3
+[a-f0-9]+: 8b 05 1d 20 00 00 mov 0x201d\(%rip\),%eax # 403038 <deadloopvar>
+[a-f0-9]+: 83 f8 01 cmp \$0x1,%eax
+[a-f0-9]+: 74 f5 je 401015 <main\+0x15>
- +[a-f0-9]+: 0f 31 rdtsc
+ +[a-f0-9]+: 0f 31 rdtsc
+[a-f0-9]+: 48 c1 e2 20 shl \$0x20,%rdx
+[a-f0-9]+: 48 0b c2 or %rdx,%rax
+[a-f0-9]+: 74 5d je 401088 <main\+0x88>
+[a-f0-9]+: 74 28 je 401075 <main\+0x75>
+[a-f0-9]+: b8 05 00 00 00 mov \$0x5,%eax
+[a-f0-9]+: 2b 84 2b 48 30 00 00 sub 0x3048\(%rbx,%rbp,1\),%eax
- +[a-f0-9]+: 99 cltd
+ +[a-f0-9]+: 99 cltd
+[a-f0-9]+: 2b c2 sub %edx,%eax
+[a-f0-9]+: d1 f8 sar %eax
+[a-f0-9]+: 48 63 d0 movslq %eax,%rdx
+[a-f0-9]+: 48 8b 74 24 48 mov 0x48\(%rsp\),%rsi
+[a-f0-9]+: 48 83 c4 20 add \$0x20,%rsp
+[a-f0-9]+: 5f pop %rdi
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
+[a-f0-9]+: 66 90 xchg %ax,%ax
0+4010a8 <xfunc>:
+[a-f0-9]+: 66 90 xchg %ax,%ax
- +[a-f0-9]+: cc int3
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: cc int3
+ +[a-f0-9]+: c3 ret
0+4010ac <xstring>:
+[a-f0-9]+: 40 53 rex push %rbx
+[a-f0-9]+: 75 f0 jne 4010b9 <xstring\+0xd>
+[a-f0-9]+: 48 83 c4 20 add \$0x20,%rsp
+[a-f0-9]+: 5b pop %rbx
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
#pass
Disassembly of section .plt.got:
[a-f0-9]+ <[_a-z]+@plt>:
-[ ]*[a-f0-9]+: f3 0f 1e fa endbr64
+[ ]*[a-f0-9]+: f3 0f 1e fa endbr64
[ ]*[a-f0-9]+: ff 25 .. .. 3f 00 jmp +\*0x3f....\(%rip\) # ...... <.*>
#pass
Disassembly of section .plt.got:
[a-f0-9]+ <[_a-z]+@plt>:
-[ ]*[a-f0-9]+: f3 0f 1e fa endbr64
+[ ]*[a-f0-9]+: f3 0f 1e fa endbr64
[ ]*[a-f0-9]+: f2 ff 25 .. .. 3f 00 bnd jmp \*0x3f....\(%rip\) # ...... <.*>
#pass
[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 5 <foo>
0+5 <foo>:
-[ ]*[a-f0-9]+: c3 ret
+[ ]*[a-f0-9]+: c3 ret
Disassembly of section .text:
0+4000e0 <foo>:
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: c3 ret
0+4000e1 <bar>:
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: c3 ret
0+4000e2 <_start>:
+[a-f0-9]+: ff 15 28 00 20 00 call \*0x200028\(%rip\) # 600110 <.*>
Disassembly of section .text:
0+1c8 <foo>:
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: c3 ret
0+1c9 <bar>:
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: c3 ret
0+1ca <_start>:
+[a-f0-9]+: ff 15 28 01 20 00 call \*0x200128\(%rip\) # 2002f8 <_DYNAMIC\+0x100>
Disassembly of section .text:
0+188 <foo>:
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: c3 ret
0+189 <bar>:
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: c3 ret
0+18a <_start>:
+[a-f0-9]+: ff 15 08 01 20 00 call \*0x200108\(%rip\) # 200298 <.*>
Disassembly of section .text:
0+40008c <foo>:
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: c3 ret
0+40008d <bar>:
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: c3 ret
0+40008e <_start>:
+[a-f0-9]+: ff 15 2c 00 20 00 call \*0x20002c\(%rip\) # 6000c0 <_start\+0x200032>
Disassembly of section .text:
0+120 <foo>:
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: c3 ret
0+121 <bar>:
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: c3 ret
0+122 <_start>:
+[a-f0-9]+: ff 15 a8 00 20 00 call \*0x2000a8\(%rip\) # 2001d0 <.*>
Disassembly of section .text:
0+100 <foo>:
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: c3 ret
0+101 <bar>:
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: c3 ret
0+102 <_start>:
+[a-f0-9]+: ff 15 98 00 20 00 call \*0x200098\(%rip\) # 2001a0 <.*>
#...
[a-f0-9]+ <main>:
[a-f0-9]+: 31 c0 xor %eax,%eax
-[a-f0-9]+: c3 ret *
+[a-f0-9]+: c3 ret
#pass
#...
[a-f0-9]+ <main>:
[a-f0-9]+: 31 c0 xor %eax,%eax
-[a-f0-9]+: c3 ret *
+[a-f0-9]+: c3 ret
#pass
+[a-f0-9]+: e8 00 00 00 00 call [0-9a-f]+ <foo>
[0-9a-f]+ <foo>:
- +[a-f0-9]+: c3 ret *
+ +[a-f0-9]+: c3 ret
#pass
Disassembly of section .text:
0+[a-f0-9]+ <printk>:
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
Disassembly of section .init.text:
+[a-f0-9]+: 41 89 13 mov %edx,\(%r11\)
+[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax
+[a-f0-9]+: 5d pop %rbp
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
#pass
+[a-f0-9]+: 41 89 13 mov %edx,\(%r11\)
+[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax
+[a-f0-9]+: 5d pop %rbp
- +[a-f0-9]+: c3 ret
+ +[a-f0-9]+: c3 ret
#pass
Disassembly of section .text:
0+[a-f0-9]+ <foo>:
-[ ]*[a-f0-9]+: c3 ret *
+[ ]*[a-f0-9]+: c3 ret
0+[a-f0-9]+ <bar>:
[ ]*[a-f0-9]+: e8 fa ff ff ff call [a-f0-9]+ <foo>
-[ ]*[a-f0-9]+: c3 ret *
+[ ]*[a-f0-9]+: c3 ret
#pass
0+[a-f0-9]+ <bar>:
[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*>
[ ]*[a-f0-9]+: 8b 00 mov \(%rax\),%eax
-[ ]*[a-f0-9]+: c3 ret *
+[ ]*[a-f0-9]+: c3 ret
#pass
0+[a-f0-9]+ <bar>:
[ ]*[a-f0-9]+: 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%eax # [a-f0-9]+ <foo>
-[ ]*[a-f0-9]+: c3 ret *
+[ ]*[a-f0-9]+: c3 ret
#pass
[0-9a-f]+: ff 35 .. .. 20 00 push .*\(%rip\) # 201358 <_GLOBAL_OFFSET_TABLE_\+0x8>
[0-9a-f]+: ff 25 .. .. 20 00 jmp \*.*\(%rip\) # 201360 <_GLOBAL_OFFSET_TABLE_\+0x10>
[0-9a-f]+: 0f 1f 40 00 nopl 0x0\(%rax\)
- [0-9a-f]+: f3 0f 1e fa endbr64
+ [0-9a-f]+: f3 0f 1e fa endbr64
[0-9a-f]+: ff 35 .. .. 20 00 push .*\(%rip\) # 201358 <_GLOBAL_OFFSET_TABLE_\+0x8>
[0-9a-f]+: ff 25 .. .. 20 00 jmp \*.*\(%rip\) # 201348 <.*>
Disassembly of section .text:
[a-f0-9]+ <__tls_get_addr>:
-[ ]*[a-f0-9]+: c3 ret *
+[ ]*[a-f0-9]+: c3 ret
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 48 c7 c0 f4 ff ff ff mov \$0xfffffffffffffff4,%rax
[ ]*[a-f0-9]+: 03 18 add \(%rax\),%ebx
[ ]*[a-f0-9]+: 89 d8 mov %ebx,%eax
[ ]*[a-f0-9]+: 5b pop %rbx
-[ ]*[a-f0-9]+: c3 ret *
+[ ]*[a-f0-9]+: c3 ret
#pass
Disassembly of section .text:
[a-f0-9]+ <__tls_get_addr>:
-[ ]*[a-f0-9]+: c3 ret *
+[ ]*[a-f0-9]+: c3 ret
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 48 c7 c0 f4 ff ff ff mov \$0xfffffffffffffff4,%rax
[ ]*[a-f0-9]+: 03 18 add \(%rax\),%ebx
[ ]*[a-f0-9]+: 89 d8 mov %ebx,%eax
[ ]*[a-f0-9]+: 5b pop %rbx
-[ ]*[a-f0-9]+: c3 ret *
+[ ]*[a-f0-9]+: c3 ret
#pass
const char *p;
struct dis_private priv;
int prefix_length;
+ int op_count;
ins->isa64 = 0;
ins->intel_mnemonic = !SYSV386_COMPAT;
return MAX_CODE_LENGTH;
}
+ /* Calculate the number of operands this instruction has. */
+ op_count = 0;
+ for (i = 0; i < MAX_OPERANDS; ++i)
+ if (*ins->op_out[i] != '\0')
+ ++op_count;
+
+ /* Calculate the number of spaces to print after the mnemonic. */
ins->obufp = ins->mnemonicendp;
- for (i = strlen (ins->obuf) + prefix_length; i < 6; i++)
- oappend (ins, " ");
- oappend (ins, " ");
+ if (op_count > 0)
+ {
+ i = strlen (ins->obuf) + prefix_length;
+ if (i < 7)
+ i = 7 - i;
+ else
+ i = 1;
+ }
+ else
+ i = 0;
+
+ /* Print the instruction mnemonic along with any trailing whitespace. */
(*ins->info->fprintf_styled_func)
- (ins->info->stream, dis_style_mnemonic, "%s", ins->obuf);
+ (ins->info->stream, dis_style_mnemonic, "%s%*s", ins->obuf, i, "");
/* The enter and bound instructions are printed with operands in the same
order as the intel book; everything else is printed in reverse order. */
NOP_Fixup (instr_info *ins, int opnd, int sizeflag)
{
if ((ins->prefixes & PREFIX_DATA) == 0 && (ins->rex & REX_B) == 0)
- strcpy (ins->obuf, "nop");
+ ins->mnemonicendp = stpcpy (ins->obuf, "nop");
else if (opnd == 0)
OP_REG (ins, eAX_reg, sizeflag);
else