aarch64.md: New pattern.
authorDavid Sherwood <david.sherwood@arm.com>
Wed, 2 Dec 2015 16:29:17 +0000 (16:29 +0000)
committerDavid Sherwood <davids@gcc.gnu.org>
Wed, 2 Dec 2015 16:29:17 +0000 (16:29 +0000)
2015-12-02  David Sherwood  <david.sherwood@arm.com>

    gcc/
* config/aarch64/aarch64.md: New pattern.
* config/aarch64/aarch64-simd.md: Likewise.
* config/aarch64/iterators.md: New unspecs, iterators.
    gcc/testsuite
* gcc.target/aarch64/fmaxmin.c: New test.

From-SVN: r231187

gcc/ChangeLog
gcc/config/aarch64/aarch64-simd.md
gcc/config/aarch64/aarch64.md
gcc/config/aarch64/iterators.md
gcc/testsuite/ChangeLog

index ca0b22e452a0ae7941a849326fddee7dcb301755..db75d76dea377e669f20a1a26987bfd0c51cc055 100644 (file)
@@ -1,3 +1,9 @@
+2015-12-02  David Sherwood  <david.sherwood@arm.com>
+
+       * config/aarch64/aarch64.md: New pattern.
+       * config/aarch64/aarch64-simd.md: Likewise.
+       * config/aarch64/iterators.md: New unspecs, iterators.
+
 2015-12-02  Pierre-Marie de Rodat  <derodat@adacore.com>
 
        * dwarf2out.c (dwar2out_var_location): In addition to notes,
index 7910484baf0377d89211f9945d6bbc66103f8fc8..ae1075c289573073b798c615b4fac66f11f6dece 100644 (file)
   [(set_attr "type" "neon_fp_minmax_<Vetype><q>")]
 )
 
+;; Auto-vectorized forms for the IEEE-754 fmax()/fmin() functions
+(define_insn "<fmaxmin><mode>3"
+  [(set (match_operand:VDQF 0 "register_operand" "=w")
+       (unspec:VDQF [(match_operand:VDQF 1 "register_operand" "w")
+                     (match_operand:VDQF 2 "register_operand" "w")]
+                     FMAXMIN))]
+  "TARGET_SIMD"
+  "<fmaxmin_op>\\t%0.<Vtype>, %1.<Vtype>, %2.<Vtype>"
+  [(set_attr "type" "neon_fp_minmax_<Vetype><q>")]
+)
+
 ;; 'across lanes' add.
 
 (define_expand "reduc_plus_scal_<mode>"
index 64a40ae3175f4c278b0170c00f26db31aa244e25..765df6a305e45e661cb2eeb5310ec06b33ef5b66 100644 (file)
   [(set_attr "type" "f_minmax<s>")]
 )
 
+;; Scalar forms for the IEEE-754 fmax()/fmin() functions
+(define_insn "<fmaxmin><mode>3"
+  [(set (match_operand:GPF 0 "register_operand" "=w")
+       (unspec:GPF [(match_operand:GPF 1 "register_operand" "w")
+                    (match_operand:GPF 2 "register_operand" "w")]
+                    FMAXMIN))]
+  "TARGET_FLOAT"
+  "<fmaxmin_op>\\t%<s>0, %<s>1, %<s>2"
+  [(set_attr "type" "f_minmax<s>")]
+)
+
 ;; For copysign (x, y), we want to generate:
 ;;
 ;;   LDR d2, #(1 << 63)
index 9343c9cd1c837946731f9b40f3c174cd8168d246..8bdd2648f8932a30f97ae8607c93efbad34ffafa 100644 (file)
     UNSPEC_VEC_SHR      ; Used in aarch64-simd.md.
     UNSPEC_SQRDMLAH     ; Used in aarch64-simd.md.
     UNSPEC_SQRDMLSH     ; Used in aarch64-simd.md.
+    UNSPEC_FMAXNM       ; Used in aarch64-simd.md.
+    UNSPEC_FMINNM       ; Used in aarch64-simd.md.
 ])
 
 ;; ------------------------------------------------------------------
 
 (define_int_iterator FMAXMIN_UNS [UNSPEC_FMAX UNSPEC_FMIN])
 
+(define_int_iterator FMAXMIN [UNSPEC_FMAXNM UNSPEC_FMINNM])
+
 (define_int_iterator VQDMULH [UNSPEC_SQDMULH UNSPEC_SQRDMULH])
 
 (define_int_iterator USSUQADD [UNSPEC_SUQADD UNSPEC_USQADD])
                                 (UNSPEC_FMINNMV "fminnm")
                                 (UNSPEC_FMINV "fmin")])
 
+(define_int_attr fmaxmin [(UNSPEC_FMAXNM "fmax")
+                         (UNSPEC_FMINNM "fmin")])
+
+(define_int_attr fmaxmin_op [(UNSPEC_FMAXNM "fmaxnm")
+                            (UNSPEC_FMINNM "fminnm")])
+
 (define_int_attr sur [(UNSPEC_SHADD "s") (UNSPEC_UHADD "u")
                      (UNSPEC_SRHADD "sr") (UNSPEC_URHADD "ur")
                      (UNSPEC_SHSUB "s") (UNSPEC_UHSUB "u")
index 4f7af876162e1573af4a7fa8d5d11388c2331b1d..e867353ee5b0f42592502b90df366a9d5bf08bb6 100644 (file)
@@ -1,3 +1,7 @@
+2015-12-02  David Sherwood  <david.sherwood@arm.com>
+
+        * gcc.target/aarch64/fmaxmin.c: New test.
+
 2015-12-02  Thomas Schwinge  <thomas@codesourcery.com>
 
        * gfortran.dg/goacc/coarray.f95: XFAIL.