ppc: support ffmadds instruction

diff --git a/gas/testsuite/gas/ppc/ffmadds.d b/gas/testsuite/gas/ppc/ffmadds.d
new file mode 100644 (file)
index 0000000..176d323
--- /dev/null
+++ b/gas/testsuite/gas/ppc/ffmadds.d
@@ -0,0 +1,14 @@
+#as: -mlibresoc
+#objdump: -dr -Mlibresoc
+
+.*:     file format .*
+
+
+Disassembly of section \.text:
+0+ <\.text>:
+.*:\s+(ef e0 00 0a|0a 00 e0 ef)\s+ffmadds\s+f31,f0,f0
+.*:\s+(ec 1f 00 0a|0a 00 1f ec)\s+ffmadds\s+f0,f31,f0
+.*:\s+(ec 00 f8 0a|0a f8 00 ec)\s+ffmadds\s+f0,f0,f31
+.*:\s+(ef e0 00 0b|0b 00 e0 ef)\s+ffmadds.\s+f31,f0,f0
+.*:\s+(ec 1f 00 0b|0b 00 1f ec)\s+ffmadds.\s+f0,f31,f0
+.*:\s+(ec 00 f8 0b|0b f8 00 ec)\s+ffmadds.\s+f0,f0,f31

diff --git a/gas/testsuite/gas/ppc/ffmadds.s b/gas/testsuite/gas/ppc/ffmadds.s
new file mode 100644 (file)
index 0000000..dbb4500
--- /dev/null
+++ b/gas/testsuite/gas/ppc/ffmadds.s
@@ -0,0 +1,6 @@
+ffmadds 31,0,0
+ffmadds 0,31,0
+ffmadds 0,0,31
+ffmadds. 31,0,0
+ffmadds. 0,31,0
+ffmadds. 0,0,31

diff --git a/gas/testsuite/gas/ppc/ppc.exp b/gas/testsuite/gas/ppc/ppc.exp
index a41f5e961a12b7cbfe354ab51270c28d9af4504b..fb26dc571466a576707ca9b992e2cd7446a02bdf 100644 (file)
--- a/gas/testsuite/gas/ppc/ppc.exp
+++ b/gas/testsuite/gas/ppc/ppc.exp
@@ -176,3 +176,4 @@ run_dump_test "dsrd"
 run_dump_test "maddedus"
 run_dump_test "minmax"
 run_dump_test "ffmsubs"
+run_dump_test "ffmadds"

diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index e76b83db1207d77521e8614d689016f9ad29940d..8b7174c649cafffdefccd9c77b5690efa9d28326 100644 (file)
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -9188,6 +9188,9 @@ const struct powerpc_opcode powerpc_opcodes[] = {
 {"ffmsubs",    A(59,4,0),      AFRC_MASK,   SFFS,      PPCVLE,         {FRT, FRA, FRB}},
 {"ffmsubs.",   A(59,4,1),      AFRC_MASK,   SFFS,      PPCVLE,         {FRT, FRA, FRB}},
 
+{"ffmadds",    A(59,5,0),      AFRC_MASK,   SFFS,      PPCVLE,         {FRT, FRA, FRB}},
+{"ffmadds.",   A(59,5,1),      AFRC_MASK,   SFFS,      PPCVLE,         {FRT, FRA, FRB}},
+
 {"fdivs",      A(59,18,0),     AFRC_MASK,   PPC,       PPCEFS|PPCVLE,  {FRT, FRA, FRB}},
 {"fdivs.",     A(59,18,1),     AFRC_MASK,   PPC,       PPCEFS|PPCVLE,  {FRT, FRA, FRB}},