Wishbone: omit fixed LSBs

diff --git a/migen/bus/wishbone.py b/migen/bus/wishbone.py
index f9e24a299400ea1de98438088a21b40f59aa317b..b1df3b72460bbae855620aac308fa67bb759d0a6 100644 (file)
--- a/migen/bus/wishbone.py
+++ b/migen/bus/wishbone.py
@@ -4,7 +4,7 @@ from migen.corelogic.misc import multimux, optree
 from migen.bus.simple import Simple, get_sig_name
 
 _desc = [
-       (True,  "adr",  32),
+       (True,  "adr",  30),
        (True,  "dat",  32),
        (False, "dat",  32),
        (True,  "sel",  4),

diff --git a/migen/bus/wishbone2csr.py b/migen/bus/wishbone2csr.py
index 7cfc7a0aba53921a219868c4532b46f10cc2cf63..497cac68250f57a1198710a67365969b1547af81 100644 (file)
--- a/migen/bus/wishbone2csr.py
+++ b/migen/bus/wishbone2csr.py
@@ -16,7 +16,7 @@ class Inst():
                sync = [
                        self.csr.we_o.eq(0),
                        self.csr.d_o.eq(self.wishbone.dat_i),
-                       self.csr.a_o.eq(self.wishbone.adr_i[2:16]),
+                       self.csr.a_o.eq(self.wishbone.adr_i[:14]),
                        self.wishbone.dat_o.eq(self.csr.d_i)
                ]
                return Fragment(sync=sync) + self.timeline.get_fragment()