re PR target/91769 (wrong code with -O2 on MIPS)

Fix PR target/91769

This fixes the issue by checking that addr's base reg is not part of dest
multiword reg instead just checking the first reg of dest.

gcc/ChangeLog:

2019-10-03  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>

	PR target/91769
	* config/mips/mips.c (mips_split_move): Use reg_overlap_mentioned_p
	instead of REGNO equality check on addr.reg.

gcc/testsuite/ChangeLog:

2019-10-03  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>

	PR target/91769
	* gcc.target/mips/pr91769.c: New test.

From-SVN: r276525

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index ff52beb4869367675d32139ff411a620dcdd3e5c..1815dc9d8e7f00d685c6893a8dc9c2ebcec41958 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2019-10-03  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
+
+       PR target/91769
+       * config/mips/mips.c (mips_split_move): Use reg_overlap_mentioned_p
+       instead of REGNO equality check on addr.reg.
+
 2019-10-03  Jan Hubicka  <hubicka@ucw.cz>
 
        * params.def (PARAM_INLINE_HEURISTICS_HINT_PERCENT,

diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 648d95f3808781dee8e530f7f66b0e069954c69c..e7c22123ed52e73d819180d20706bf9a0fa8c605 100644 (file)
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -4862,7 +4862,7 @@ mips_split_move (rtx dest, rtx src, enum mips_split_type split_type, rtx insn_)
                {
                  rtx tmp = XEXP (src, 0);
                  mips_classify_address (&addr, tmp, GET_MODE (tmp), true);
-                 if (addr.reg && REGNO (addr.reg) != REGNO (dest))
+                 if (addr.reg && !reg_overlap_mentioned_p (dest, addr.reg))
                    validate_change (next, &SET_SRC (set), src, false);
                }
              else

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index d4852d37c3f7059d1aa0ee162dd304631704145d..7939c369ff9b76ec5b969c7d8f1d3198340eb0ec 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2019-10-03  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
+
+       PR target/91769
+       * gcc.target/mips/pr91769.c: New test.
+
 2019-10-03  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
 
        * g++.dg/cpp0x/gen-attrs-67.C: Expect constructor priorities error

diff --git a/gcc/testsuite/gcc.target/mips/pr91769.c b/gcc/testsuite/gcc.target/mips/pr91769.c
new file mode 100644 (file)
index 0000000..c9ad70d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/pr91769.c
@@ -0,0 +1,19 @@
+/* PR target/91769 */
+/* { dg-do compile } */
+/* { dg-skip-if "naming registers makes this a code quality test" { *-*-* } { "-O0" "-g" } { "" } } */
+/* { dg-options "-EL -mgp32 -mhard-float" } */
+
+NOCOMPRESSION double
+foo (void)
+{
+  register double* pf __asm__ ("$a1");
+  __asm__ __volatile__ ("":"=r"(pf));
+  double f = *pf;
+
+  if (f != f)
+    f = -f;
+  return f;
+}
+
+/* { dg-final { scan-assembler-not "lw\t\\\$4,0\\(\\\$5\\)\n\tlw\t\\\$5,4\\(\\\$5\\)\n\tldc1\t\\\$.*,0\\(\\\$5\\)" } } */
+/* { dg-final { scan-assembler "lw\t\\\$4,0\\(\\\$5\\)\n\tlw\t\\\$5,4\\(\\\$5\\)\n\tmtc1\t\\\$4,\\\$.*\n\tmthc1\t\\\$5,\\\$.*" } } */