fixup verilog doubleslash test

- add generated doubleslash.v to .gitignore
- ensure backend verilog can be read again

diff --git a/tests/verilog/.gitignore b/tests/verilog/.gitignore
index 34da234374eef92264e184cb1fe4501e9dc740e1..96ebe20ba261015a9bc2bce5f988682a21791559 100644 (file)
--- a/tests/verilog/.gitignore
+++ b/tests/verilog/.gitignore
@@ -3,3 +3,4 @@
 /run-test.mk
 /const_arst.v
 /const_sr.v
+/doubleslash.v

diff --git a/tests/verilog/doubleslash.ys b/tests/verilog/doubleslash.ys
index 8a51f12c2cab1c1c2adff410dc20e9aed5e6a320..c41673ee5a42b08a77478875b4e650641abfb635 100644 (file)
--- a/tests/verilog/doubleslash.ys
+++ b/tests/verilog/doubleslash.ys
@@ -17,3 +17,5 @@ proc
 opt -full
 
 write_verilog doubleslash.v
+design -reset
+read_verilog doubleslash.v