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i965/fs: Don't apply POW/FDIV workaround on Gen10+
authorMatt Turner <mattst88@gmail.com>
Fri, 25 Aug 2017 22:52:27 +0000 (15:52 -0700)
committerMatt Turner <mattst88@gmail.com>
Wed, 4 Oct 2017 21:08:37 +0000 (14:08 -0700)
The documentation says it applies only to Gens 8 and 9.

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
src/intel/compiler/brw_fs_generator.cpp patch | blob | history

diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp
index 6489cc0d38fd8fa625d2a7f3853cbff662a3b5a5..2622a9191735f23a07a99046e6c4da6af31dd4ff 100644 (file)
--- a/src/intel/compiler/brw_fs_generator.cpp
+++ b/src/intel/compiler/brw_fs_generator.cpp
@@ -1639,6 +1639,7 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width)
        * and empirically this affects CHV as well.
        */
       if (devinfo->gen >= 8 &&
+          devinfo->gen <= 9 &&
           p->nr_insn > 1 &&
           brw_inst_opcode(devinfo, brw_last_inst) == BRW_OPCODE_MATH &&
           brw_inst_math_function(devinfo, brw_last_inst) == BRW_MATH_FUNCTION_POW &&