to get at the current architecture and at the target specific vector.
Add target specific vector to I387_FISEG_REGNUM and I387_FOP_REGNUM and
remove define of I387_ST0_REGNUM.
* amd64-tdep.c (I387_ST0_REGNUM): Remove define.
(amd64_supply_fxsave, amd64_collect_fxsave): Use get_regcache_arch to
get at the current architecture
(I387_FISEG_REGNUM, I387_FOSEG_REGNUM): Add target specific vector as
parameter.
* i386-tdep.c: Remove various define's and undef's of I387_ST0_REGNUM,
I387_NUM_XMM_REGS and I387_MM0_REGNUM.
(I387_NUM_XMM_REGS, I387_XMM0_REGNUM, I387_MXCSR_REGNUM,
I387_ST0_REGNUM, I387_FCTRL_REGNUM, I387_MM0_REGNUM,
(I387_FSTAT_REGNUM): Add target specific vector as parameter.
(i386_register_name, i386_dbx_reg_to_regnum): Use gdbarch_tdep to get
at the target specific vector.
(i386_get_longjmp_target): Use get_frame_arch to get at the current
architecture. Use gdbarch_tdep to get at the target specific vector.
(i386_fp_regnum_p, i386_fpc_regnum_p): Add gdbarch as parameter and
update caller. Use gdbarch_tdep to get at the target specific vector.
(i386_register_to_value: Use get_frame_arch to get at the current
architecture.
* i386-tdep.h (i386_fp_regnum_p, i386_fpc_regnum_p): Add gdbarch as
parameter.
* i387-tdep.c (I387_FCTRL_REGNUM, I387_FSTAT_REGNUM, I387_FTAG_REGNUM,
I387_FISEG_REGNUM, I387_FIOFF_REGNUM, I387_FOSEG_REGNUM
I387_FOOFF_REGNUM, I387_FOP_REGNUM, I387_ST0_REGNUM, FSAVE_ADDR,
FXSAVE_ADDR, I387_XMM0_REGNUM): Add target specific vector as parameter.
(I387_ST0_REGNUM, I387_NUM_XMM_REGS): Remove various define's and
undef's.
(i387_convert_register_p, i387_register_to_value,
i387_value_to_register): Update call for i386_fp_regnum_p.
* i387-tdep.h: Remove comment.
(I387_ST0_REGNUM, I387_NUM_XMM_REGS, I387_MM0_REGNUM): Add define.
(I387_FCTRL_REGNUM, I387_FSTAT_REGNUM, I387_FTAG_REGNUM,
I387_FISEG_REGNUM, I387_FIOFF_REGNUM, I387_FOSEG_REGNUM,
I387_FOOFF_REGNUM, I387_FOP_REGNUM, I387_XMM0_REGNUM,
I387_MXCSR_REGNUM): Add target specific vector as parameter.
+2008-03-11 Markus Deuling <deuling@de.ibm.com>
+
+ * win32-nat.c (do_win32_fetch_inferior_registers): Use get_regcache_arch
+ to get at the current architecture and at the target specific vector.
+ Add target specific vector to I387_FISEG_REGNUM and I387_FOP_REGNUM and
+ remove define of I387_ST0_REGNUM.
+
+ * amd64-tdep.c (I387_ST0_REGNUM): Remove define.
+
+ (amd64_supply_fxsave, amd64_collect_fxsave): Use get_regcache_arch to
+ get at the current architecture
+ (I387_FISEG_REGNUM, I387_FOSEG_REGNUM): Add target specific vector as
+ parameter.
+
+ * i386-tdep.c: Remove various define's and undef's of I387_ST0_REGNUM,
+ I387_NUM_XMM_REGS and I387_MM0_REGNUM.
+
+ (I387_NUM_XMM_REGS, I387_XMM0_REGNUM, I387_MXCSR_REGNUM,
+ I387_ST0_REGNUM, I387_FCTRL_REGNUM, I387_MM0_REGNUM,
+ (I387_FSTAT_REGNUM): Add target specific vector as parameter.
+
+ (i386_register_name, i386_dbx_reg_to_regnum): Use gdbarch_tdep to get
+ at the target specific vector.
+
+ (i386_get_longjmp_target): Use get_frame_arch to get at the current
+ architecture. Use gdbarch_tdep to get at the target specific vector.
+
+ (i386_fp_regnum_p, i386_fpc_regnum_p): Add gdbarch as parameter and
+ update caller. Use gdbarch_tdep to get at the target specific vector.
+
+ (i386_register_to_value: Use get_frame_arch to get at the current
+ architecture.
+
+ * i386-tdep.h (i386_fp_regnum_p, i386_fpc_regnum_p): Add gdbarch as
+ parameter.
+
+ * i387-tdep.c (I387_FCTRL_REGNUM, I387_FSTAT_REGNUM, I387_FTAG_REGNUM,
+ I387_FISEG_REGNUM, I387_FIOFF_REGNUM, I387_FOSEG_REGNUM
+ I387_FOOFF_REGNUM, I387_FOP_REGNUM, I387_ST0_REGNUM, FSAVE_ADDR,
+ FXSAVE_ADDR, I387_XMM0_REGNUM): Add target specific vector as parameter.
+
+ (I387_ST0_REGNUM, I387_NUM_XMM_REGS): Remove various define's and
+ undef's.
+
+ (i387_convert_register_p, i387_register_to_value,
+ i387_value_to_register): Update call for i386_fp_regnum_p.
+
+ * i387-tdep.h: Remove comment.
+ (I387_ST0_REGNUM, I387_NUM_XMM_REGS, I387_MM0_REGNUM): Add define.
+ (I387_FCTRL_REGNUM, I387_FSTAT_REGNUM, I387_FTAG_REGNUM,
+ I387_FISEG_REGNUM, I387_FIOFF_REGNUM, I387_FOSEG_REGNUM,
+ I387_FOOFF_REGNUM, I387_FOP_REGNUM, I387_XMM0_REGNUM,
+ I387_MXCSR_REGNUM): Add target specific vector as parameter.
+
2008-03-10 Daniel Jacobowitz <dan@codesourcery.com>
* Makefile.in (fork-child.o): Update.
}
\f
-#define I387_ST0_REGNUM AMD64_ST0_REGNUM
-
/* The 64-bit FXSAVE format differs from the 32-bit format in the
sense that the instruction pointer and data pointer are simply
64-bit offsets into the code segment and the data segment instead
void
amd64_supply_fxsave (struct regcache *regcache, int regnum,
- const void *fxsave)
+ const void *fxsave)
{
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
i387_supply_fxsave (regcache, regnum, fxsave);
- if (fxsave && gdbarch_ptr_bit (get_regcache_arch (regcache)) == 64)
+ if (fxsave && gdbarch_ptr_bit (gdbarch) == 64)
{
const gdb_byte *regs = fxsave;
- if (regnum == -1 || regnum == I387_FISEG_REGNUM)
- regcache_raw_supply (regcache, I387_FISEG_REGNUM, regs + 12);
- if (regnum == -1 || regnum == I387_FOSEG_REGNUM)
- regcache_raw_supply (regcache, I387_FOSEG_REGNUM, regs + 20);
+ if (regnum == -1 || regnum == I387_FISEG_REGNUM (tdep))
+ regcache_raw_supply (regcache, I387_FISEG_REGNUM (tdep), regs + 12);
+ if (regnum == -1 || regnum == I387_FOSEG_REGNUM (tdep))
+ regcache_raw_supply (regcache, I387_FOSEG_REGNUM (tdep), regs + 20);
}
}
amd64_collect_fxsave (const struct regcache *regcache, int regnum,
void *fxsave)
{
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
gdb_byte *regs = fxsave;
i387_collect_fxsave (regcache, regnum, fxsave);
- if (gdbarch_ptr_bit (get_regcache_arch (regcache)) == 64)
+ if (gdbarch_ptr_bit (gdbarch) == 64)
{
- if (regnum == -1 || regnum == I387_FISEG_REGNUM)
- regcache_raw_collect (regcache, I387_FISEG_REGNUM, regs + 12);
- if (regnum == -1 || regnum == I387_FOSEG_REGNUM)
- regcache_raw_collect (regcache, I387_FOSEG_REGNUM, regs + 20);
+ if (regnum == -1 || regnum == I387_FISEG_REGNUM (tdep))
+ regcache_raw_collect (regcache, I387_FISEG_REGNUM (tdep), regs + 12);
+ if (regnum == -1 || regnum == I387_FOSEG_REGNUM (tdep))
+ regcache_raw_collect (regcache, I387_FOSEG_REGNUM (tdep), regs + 20);
}
}
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
-#define I387_ST0_REGNUM tdep->st0_regnum
-#define I387_NUM_XMM_REGS tdep->num_xmm_regs
-
- if (I387_NUM_XMM_REGS == 0)
+ if (I387_NUM_XMM_REGS (tdep) == 0)
return 0;
- return (I387_XMM0_REGNUM <= regnum && regnum < I387_MXCSR_REGNUM);
-
-#undef I387_ST0_REGNUM
-#undef I387_NUM_XMM_REGS
+ return (I387_XMM0_REGNUM (tdep) <= regnum
+ && regnum < I387_MXCSR_REGNUM (tdep));
}
static int
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
-#define I387_ST0_REGNUM tdep->st0_regnum
-#define I387_NUM_XMM_REGS tdep->num_xmm_regs
-
- if (I387_NUM_XMM_REGS == 0)
+ if (I387_NUM_XMM_REGS (tdep) == 0)
return 0;
- return (regnum == I387_MXCSR_REGNUM);
-
-#undef I387_ST0_REGNUM
-#undef I387_NUM_XMM_REGS
+ return (regnum == I387_MXCSR_REGNUM (tdep));
}
-#define I387_ST0_REGNUM (gdbarch_tdep (current_gdbarch)->st0_regnum)
-#define I387_MM0_REGNUM (gdbarch_tdep (current_gdbarch)->mm0_regnum)
-#define I387_NUM_XMM_REGS (gdbarch_tdep (current_gdbarch)->num_xmm_regs)
-
/* FP register? */
int
-i386_fp_regnum_p (int regnum)
+i386_fp_regnum_p (struct gdbarch *gdbarch, int regnum)
{
- if (I387_ST0_REGNUM < 0)
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+ if (I387_ST0_REGNUM (tdep) < 0)
return 0;
- return (I387_ST0_REGNUM <= regnum && regnum < I387_FCTRL_REGNUM);
+ return (I387_ST0_REGNUM (tdep) <= regnum
+ && regnum < I387_FCTRL_REGNUM (tdep));
}
int
-i386_fpc_regnum_p (int regnum)
+i386_fpc_regnum_p (struct gdbarch *gdbarch, int regnum)
{
- if (I387_ST0_REGNUM < 0)
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+ if (I387_ST0_REGNUM (tdep) < 0)
return 0;
- return (I387_FCTRL_REGNUM <= regnum && regnum < I387_XMM0_REGNUM);
+ return (I387_FCTRL_REGNUM (tdep) <= regnum
+ && regnum < I387_XMM0_REGNUM (tdep));
}
/* Return the name of register REGNUM. */
i386_register_name (struct gdbarch *gdbarch, int regnum)
{
if (i386_mmx_regnum_p (gdbarch, regnum))
- return i386_mmx_names[regnum - I387_MM0_REGNUM];
+ return i386_mmx_names[regnum - I387_MM0_REGNUM (gdbarch_tdep (gdbarch))];
if (regnum >= 0 && regnum < i386_num_register_names)
return i386_register_names[regnum];
static int
i386_dbx_reg_to_regnum (struct gdbarch *gdbarch, int reg)
{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
/* This implements what GCC calls the "default" register map
(dbx_register_map[]). */
else if (reg >= 12 && reg <= 19)
{
/* Floating-point registers. */
- return reg - 12 + I387_ST0_REGNUM;
+ return reg - 12 + I387_ST0_REGNUM (tdep);
}
else if (reg >= 21 && reg <= 28)
{
/* SSE registers. */
- return reg - 21 + I387_XMM0_REGNUM;
+ return reg - 21 + I387_XMM0_REGNUM (tdep);
}
else if (reg >= 29 && reg <= 36)
{
/* MMX registers. */
- return reg - 29 + I387_MM0_REGNUM;
+ return reg - 29 + I387_MM0_REGNUM (tdep);
}
/* This will hopefully provoke a warning. */
static int
i386_svr4_reg_to_regnum (struct gdbarch *gdbarch, int reg)
{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
/* This implements the GCC register map that tries to be compatible
with the SVR4 C compiler for DWARF (svr4_dbx_register_map[]). */
else if (reg >= 11 && reg <= 18)
{
/* Floating-point registers. */
- return reg - 11 + I387_ST0_REGNUM;
+ return reg - 11 + I387_ST0_REGNUM (tdep);
}
else if (reg >= 21 && reg <= 36)
{
switch (reg)
{
- case 37: return I387_FCTRL_REGNUM;
- case 38: return I387_FSTAT_REGNUM;
- case 39: return I387_MXCSR_REGNUM;
+ case 37: return I387_FCTRL_REGNUM (tdep);
+ case 38: return I387_FSTAT_REGNUM (tdep);
+ case 39: return I387_MXCSR_REGNUM (tdep);
case 40: return I386_ES_REGNUM;
case 41: return I386_CS_REGNUM;
case 42: return I386_SS_REGNUM;
return gdbarch_num_regs (gdbarch) + gdbarch_num_pseudo_regs (gdbarch);
}
-#undef I387_ST0_REGNUM
-#undef I387_MM0_REGNUM
-#undef I387_NUM_XMM_REGS
\f
/* This is the variable that is set with "set disassembly-flavor", and
{
gdb_byte buf[8];
CORE_ADDR sp, jb_addr;
- int jb_pc_offset = gdbarch_tdep (get_frame_arch (frame))->jb_pc_offset;
+ struct gdbarch *gdbarch = get_frame_arch (frame);
+ int jb_pc_offset = gdbarch_tdep (gdbarch)->jb_pc_offset;
int len = TYPE_LENGTH (builtin_type_void_func_ptr);
/* If JB_PC_OFFSET is -1, we have no way to find out where the
/* Don't use I386_ESP_REGNUM here, since this function is also used
for AMD64. */
- get_frame_register (frame, gdbarch_sp_regnum (get_frame_arch (frame)), buf);
+ get_frame_register (frame, gdbarch_sp_regnum (gdbarch), buf);
sp = extract_typed_address (buf, builtin_type_void_data_ptr);
if (target_read_memory (sp + len, buf, len))
return 0;
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
int len = TYPE_LENGTH (type);
- /* Define I387_ST0_REGNUM such that we use the proper definitions
- for the architecture. */
-#define I387_ST0_REGNUM I386_ST0_REGNUM
-
if (TYPE_CODE (type) == TYPE_CODE_FLT)
{
ULONGEST fstat;
actual value doesn't really matter, but 7 is what a normal
function return would end up with if the program started out
with a freshly initialized FPU. */
- regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM, &fstat);
+ regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM (tdep), &fstat);
fstat |= (7 << 11);
- regcache_raw_write_unsigned (regcache, I387_FSTAT_REGNUM, fstat);
+ regcache_raw_write_unsigned (regcache, I387_FSTAT_REGNUM (tdep), fstat);
/* Mark %st(1) through %st(7) as empty. Since we set the top of
the floating-point register stack to 7, the appropriate value
for the tag word is 0x3fff. */
- regcache_raw_write_unsigned (regcache, I387_FTAG_REGNUM, 0x3fff);
+ regcache_raw_write_unsigned (regcache, I387_FTAG_REGNUM (tdep), 0x3fff);
}
else
{
internal_error (__FILE__, __LINE__,
_("Cannot store return value of %d bytes long."), len);
}
-
-#undef I387_ST0_REGNUM
}
\f
if (regnum == I386_EBP_REGNUM || regnum == I386_ESP_REGNUM)
return builtin_type_void_data_ptr;
- if (i386_fp_regnum_p (regnum))
+ if (i386_fp_regnum_p (gdbarch, regnum))
return builtin_type_i387_ext;
if (i386_mmx_regnum_p (gdbarch, regnum))
if (i386_sse_regnum_p (gdbarch, regnum))
return i386_sse_type (gdbarch);
-#define I387_ST0_REGNUM I386_ST0_REGNUM
-#define I387_NUM_XMM_REGS (gdbarch_tdep (gdbarch)->num_xmm_regs)
-
- if (regnum == I387_MXCSR_REGNUM)
+ if (regnum == I387_MXCSR_REGNUM (gdbarch_tdep (gdbarch)))
return i386_mxcsr_type;
-#undef I387_ST0_REGNUM
-#undef I387_NUM_XMM_REGS
-
return builtin_type_int;
}
ULONGEST fstat;
int tos;
- /* Define I387_ST0_REGNUM such that we use the proper definitions
- for REGCACHE's architecture. */
-#define I387_ST0_REGNUM tdep->st0_regnum
-
mmxreg = regnum - tdep->mm0_regnum;
- regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM, &fstat);
+ regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM (tdep), &fstat);
tos = (fstat >> 11) & 0x7;
fpreg = (mmxreg + tos) % 8;
- return (I387_ST0_REGNUM + fpreg);
-
-#undef I387_ST0_REGNUM
+ return (I387_ST0_REGNUM (tdep) + fpreg);
}
static void
i386_register_to_value (struct frame_info *frame, int regnum,
struct type *type, gdb_byte *to)
{
+ struct gdbarch *gdbarch = get_frame_arch (frame);
int len = TYPE_LENGTH (type);
/* FIXME: kettenis/20030609: What should we do if REGNUM isn't
available in FRAME (i.e. if it wasn't saved)? */
- if (i386_fp_regnum_p (regnum))
+ if (i386_fp_regnum_p (gdbarch, regnum))
{
i387_register_to_value (frame, regnum, type, to);
return;
while (len > 0)
{
gdb_assert (regnum != -1);
- gdb_assert (register_size (get_frame_arch (frame), regnum) == 4);
+ gdb_assert (register_size (gdbarch, regnum) == 4);
get_frame_register (frame, regnum, to);
regnum = i386_next_regnum (regnum);
{
int len = TYPE_LENGTH (type);
- if (i386_fp_regnum_p (regnum))
+ if (i386_fp_regnum_p (get_frame_arch (frame), regnum))
{
i387_value_to_register (frame, regnum, type, from);
return;
{
int sse_regnum_p = (i386_sse_regnum_p (gdbarch, regnum)
|| i386_mxcsr_regnum_p (gdbarch, regnum));
- int fp_regnum_p = (i386_fp_regnum_p (regnum)
- || i386_fpc_regnum_p (regnum));
+ int fp_regnum_p = (i386_fp_regnum_p (gdbarch, regnum)
+ || i386_fpc_regnum_p (gdbarch, regnum));
int mmx_regnum_p = (i386_mmx_regnum_p (gdbarch, regnum));
if (group == i386_mmx_reggroup)
/* Return non-zero if REGNUM matches the FP register and the FP
register set is active. */
-extern int i386_fp_regnum_p (int regnum);
-extern int i386_fpc_regnum_p (int regnum);
+extern int i386_fp_regnum_p (struct gdbarch *, int);
+extern int i386_fpc_regnum_p (struct gdbarch *, int);
/* Register numbers of various important registers. */
gdb_assert (gdbarch == get_frame_arch (frame));
- /* Define I387_ST0_REGNUM such that we use the proper definitions
- for FRAME's architecture. */
-#define I387_ST0_REGNUM tdep->st0_regnum
-
- fctrl = get_frame_register_unsigned (frame, I387_FCTRL_REGNUM);
- fstat = get_frame_register_unsigned (frame, I387_FSTAT_REGNUM);
- ftag = get_frame_register_unsigned (frame, I387_FTAG_REGNUM);
- fiseg = get_frame_register_unsigned (frame, I387_FISEG_REGNUM);
- fioff = get_frame_register_unsigned (frame, I387_FIOFF_REGNUM);
- foseg = get_frame_register_unsigned (frame, I387_FOSEG_REGNUM);
- fooff = get_frame_register_unsigned (frame, I387_FOOFF_REGNUM);
- fop = get_frame_register_unsigned (frame, I387_FOP_REGNUM);
+ fctrl = get_frame_register_unsigned (frame, I387_FCTRL_REGNUM (tdep));
+ fstat = get_frame_register_unsigned (frame, I387_FSTAT_REGNUM (tdep));
+ ftag = get_frame_register_unsigned (frame, I387_FTAG_REGNUM (tdep));
+ fiseg = get_frame_register_unsigned (frame, I387_FISEG_REGNUM (tdep));
+ fioff = get_frame_register_unsigned (frame, I387_FIOFF_REGNUM (tdep));
+ foseg = get_frame_register_unsigned (frame, I387_FOSEG_REGNUM (tdep));
+ fooff = get_frame_register_unsigned (frame, I387_FOOFF_REGNUM (tdep));
+ fop = get_frame_register_unsigned (frame, I387_FOP_REGNUM (tdep));
top = ((fstat >> 11) & 7);
break;
}
- get_frame_register (frame, (fpreg + 8 - top) % 8 + I387_ST0_REGNUM, raw);
+ get_frame_register (frame, (fpreg + 8 - top) % 8 + I387_ST0_REGNUM (tdep),
+ raw);
fputs_filtered ("0x", file);
for (i = 9; i >= 0; i--)
fprintf_filtered (file, "%s\n", hex_string_custom (fooff, 8));
fprintf_filtered (file, "Opcode: %s\n",
hex_string_custom (fop ? (fop | 0xd800) : 0, 4));
-
-#undef I387_ST0_REGNUM
}
\f
int
i387_convert_register_p (struct gdbarch *gdbarch, int regnum, struct type *type)
{
- if (i386_fp_regnum_p (regnum))
+ if (i386_fp_regnum_p (gdbarch, regnum))
{
/* Floating point registers must be converted unless we are
accessing them in their hardware type. */
{
gdb_byte from[I386_MAX_REGISTER_SIZE];
- gdb_assert (i386_fp_regnum_p (regnum));
+ gdb_assert (i386_fp_regnum_p (get_frame_arch (frame), regnum));
/* We only support floating-point values. */
if (TYPE_CODE (type) != TYPE_CODE_FLT)
{
gdb_byte to[I386_MAX_REGISTER_SIZE];
- gdb_assert (i386_fp_regnum_p (regnum));
+ gdb_assert (i386_fp_regnum_p (get_frame_arch (frame), regnum));
/* We only support floating-point values. */
if (TYPE_CODE (type) != TYPE_CODE_FLT)
18 /* `fop' (bottom 11 bits). */
};
-#define FSAVE_ADDR(fsave, regnum) \
- (fsave + fsave_offset[regnum - I387_ST0_REGNUM])
+#define FSAVE_ADDR(tdep, fsave, regnum) \
+ (fsave + fsave_offset[regnum - I387_ST0_REGNUM (tdep)])
\f
/* Fill register REGNUM in REGCACHE with the appropriate value from
gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
- /* Define I387_ST0_REGNUM and I387_NUM_XMM_REGS such that we use the
- proper definitions for REGCACHE's architecture. */
-
-#define I387_ST0_REGNUM tdep->st0_regnum
-#define I387_NUM_XMM_REGS tdep->num_xmm_regs
-
- for (i = I387_ST0_REGNUM; i < I387_XMM0_REGNUM; i++)
+ for (i = I387_ST0_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++)
if (regnum == -1 || regnum == i)
{
if (fsave == NULL)
/* Most of the FPU control registers occupy only 16 bits in the
fsave area. Give those a special treatment. */
- if (i >= I387_FCTRL_REGNUM
- && i != I387_FIOFF_REGNUM && i != I387_FOOFF_REGNUM)
+ if (i >= I387_FCTRL_REGNUM (tdep)
+ && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
{
gdb_byte val[4];
- memcpy (val, FSAVE_ADDR (regs, i), 2);
+ memcpy (val, FSAVE_ADDR (tdep, regs, i), 2);
val[2] = val[3] = 0;
- if (i == I387_FOP_REGNUM)
+ if (i == I387_FOP_REGNUM (tdep))
val[1] &= ((1 << 3) - 1);
regcache_raw_supply (regcache, i, val);
}
else
- regcache_raw_supply (regcache, i, FSAVE_ADDR (regs, i));
+ regcache_raw_supply (regcache, i, FSAVE_ADDR (tdep, regs, i));
}
/* Provide dummy values for the SSE registers. */
- for (i = I387_XMM0_REGNUM; i < I387_MXCSR_REGNUM; i++)
+ for (i = I387_XMM0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++)
if (regnum == -1 || regnum == i)
regcache_raw_supply (regcache, i, NULL);
- if (regnum == -1 || regnum == I387_MXCSR_REGNUM)
+ if (regnum == -1 || regnum == I387_MXCSR_REGNUM (tdep))
{
gdb_byte buf[4];
store_unsigned_integer (buf, 4, 0x1f80);
- regcache_raw_supply (regcache, I387_MXCSR_REGNUM, buf);
+ regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), buf);
}
-
-#undef I387_ST0_REGNUM
-#undef I387_NUM_XMM_REGS
}
/* Fill register REGNUM (if it is a floating-point register) in *FSAVE
gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
- /* Define I387_ST0_REGNUM such that we use the proper definitions
- for REGCACHE's architecture. */
-#define I387_ST0_REGNUM tdep->st0_regnum
-
- for (i = I387_ST0_REGNUM; i < I387_XMM0_REGNUM; i++)
+ for (i = I387_ST0_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++)
if (regnum == -1 || regnum == i)
{
/* Most of the FPU control registers occupy only 16 bits in
the fsave area. Give those a special treatment. */
- if (i >= I387_FCTRL_REGNUM
- && i != I387_FIOFF_REGNUM && i != I387_FOOFF_REGNUM)
+ if (i >= I387_FCTRL_REGNUM (tdep)
+ && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
{
gdb_byte buf[4];
regcache_raw_collect (regcache, i, buf);
- if (i == I387_FOP_REGNUM)
+ if (i == I387_FOP_REGNUM (tdep))
{
/* The opcode occupies only 11 bits. Make sure we
don't touch the other bits. */
buf[1] &= ((1 << 3) - 1);
- buf[1] |= ((FSAVE_ADDR (regs, i))[1] & ~((1 << 3) - 1));
+ buf[1] |= ((FSAVE_ADDR (tdep, regs, i))[1] & ~((1 << 3) - 1));
}
- memcpy (FSAVE_ADDR (regs, i), buf, 2);
+ memcpy (FSAVE_ADDR (tdep, regs, i), buf, 2);
}
else
- regcache_raw_collect (regcache, i, FSAVE_ADDR (regs, i));
+ regcache_raw_collect (regcache, i, FSAVE_ADDR (tdep, regs, i));
}
-#undef I387_ST0_REGNUM
}
\f
160 + 15 * 16, /* ... %xmm15 (128 bits each). */
};
-#define FXSAVE_ADDR(fxsave, regnum) \
- (fxsave + fxsave_offset[regnum - I387_ST0_REGNUM])
+#define FXSAVE_ADDR(tdep, fxsave, regnum) \
+ (fxsave + fxsave_offset[regnum - I387_ST0_REGNUM (tdep)])
/* We made an unfortunate choice in putting %mxcsr after the SSE
registers %xmm0-%xmm7 instead of before, since it makes supporting
gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
gdb_assert (tdep->num_xmm_regs > 0);
- /* Define I387_ST0_REGNUM and I387_NUM_XMM_REGS such that we use the
- proper definitions for REGCACHE's architecture. */
-
-#define I387_ST0_REGNUM tdep->st0_regnum
-#define I387_NUM_XMM_REGS tdep->num_xmm_regs
-
- for (i = I387_ST0_REGNUM; i < I387_MXCSR_REGNUM; i++)
+ for (i = I387_ST0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++)
if (regnum == -1 || regnum == i)
{
if (regs == NULL)
/* Most of the FPU control registers occupy only 16 bits in
the fxsave area. Give those a special treatment. */
- if (i >= I387_FCTRL_REGNUM && i < I387_XMM0_REGNUM
- && i != I387_FIOFF_REGNUM && i != I387_FOOFF_REGNUM)
+ if (i >= I387_FCTRL_REGNUM (tdep) && i < I387_XMM0_REGNUM (tdep)
+ && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
{
gdb_byte val[4];
- memcpy (val, FXSAVE_ADDR (regs, i), 2);
+ memcpy (val, FXSAVE_ADDR (tdep, regs, i), 2);
val[2] = val[3] = 0;
- if (i == I387_FOP_REGNUM)
+ if (i == I387_FOP_REGNUM (tdep))
val[1] &= ((1 << 3) - 1);
- else if (i== I387_FTAG_REGNUM)
+ else if (i== I387_FTAG_REGNUM (tdep))
{
/* The fxsave area contains a simplified version of
the tag word. We have to look at the actual 80-bit
int fpreg;
int top;
- top = ((FXSAVE_ADDR (regs, I387_FSTAT_REGNUM))[1] >> 3);
+ top = ((FXSAVE_ADDR (tdep, regs,
+ I387_FSTAT_REGNUM (tdep)))[1] >> 3);
top &= 0x7;
for (fpreg = 7; fpreg >= 0; fpreg--)
if (val[0] & (1 << fpreg))
{
- int regnum = (fpreg + 8 - top) % 8 + I387_ST0_REGNUM;
- tag = i387_tag (FXSAVE_ADDR (regs, regnum));
+ int regnum = (fpreg + 8 - top) % 8
+ + I387_ST0_REGNUM (tdep);
+ tag = i387_tag (FXSAVE_ADDR (tdep, regs, regnum));
}
else
tag = 3; /* Empty */
regcache_raw_supply (regcache, i, val);
}
else
- regcache_raw_supply (regcache, i, FXSAVE_ADDR (regs, i));
+ regcache_raw_supply (regcache, i, FXSAVE_ADDR (tdep, regs, i));
}
- if (regnum == I387_MXCSR_REGNUM || regnum == -1)
+ if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1)
{
if (regs == NULL)
- regcache_raw_supply (regcache, I387_MXCSR_REGNUM, NULL);
+ regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), NULL);
else
- regcache_raw_supply (regcache, I387_MXCSR_REGNUM,
+ regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep),
FXSAVE_MXCSR_ADDR (regs));
}
-
-#undef I387_ST0_REGNUM
-#undef I387_NUM_XMM_REGS
}
/* Fill register REGNUM (if it is a floating-point or SSE register) in
gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
gdb_assert (tdep->num_xmm_regs > 0);
- /* Define I387_ST0_REGNUM and I387_NUM_XMM_REGS such that we use the
- proper definitions for REGCACHE's architecture. */
-
-#define I387_ST0_REGNUM tdep->st0_regnum
-#define I387_NUM_XMM_REGS tdep->num_xmm_regs
-
- for (i = I387_ST0_REGNUM; i < I387_MXCSR_REGNUM; i++)
+ for (i = I387_ST0_REGNUM (tdep); i < I387_MXCSR_REGNUM (tdep); i++)
if (regnum == -1 || regnum == i)
{
/* Most of the FPU control registers occupy only 16 bits in
the fxsave area. Give those a special treatment. */
- if (i >= I387_FCTRL_REGNUM && i < I387_XMM0_REGNUM
- && i != I387_FIOFF_REGNUM && i != I387_FOOFF_REGNUM)
+ if (i >= I387_FCTRL_REGNUM (tdep) && i < I387_XMM0_REGNUM (tdep)
+ && i != I387_FIOFF_REGNUM (tdep) && i != I387_FOOFF_REGNUM (tdep))
{
gdb_byte buf[4];
regcache_raw_collect (regcache, i, buf);
- if (i == I387_FOP_REGNUM)
+ if (i == I387_FOP_REGNUM (tdep))
{
/* The opcode occupies only 11 bits. Make sure we
don't touch the other bits. */
buf[1] &= ((1 << 3) - 1);
- buf[1] |= ((FXSAVE_ADDR (regs, i))[1] & ~((1 << 3) - 1));
+ buf[1] |= ((FXSAVE_ADDR (tdep, regs, i))[1] & ~((1 << 3) - 1));
}
- else if (i == I387_FTAG_REGNUM)
+ else if (i == I387_FTAG_REGNUM (tdep))
{
/* Converting back is much easier. */
buf[0] |= (1 << fpreg);
}
}
- memcpy (FXSAVE_ADDR (regs, i), buf, 2);
+ memcpy (FXSAVE_ADDR (tdep, regs, i), buf, 2);
}
else
- regcache_raw_collect (regcache, i, FXSAVE_ADDR (regs, i));
+ regcache_raw_collect (regcache, i, FXSAVE_ADDR (tdep, regs, i));
}
- if (regnum == I387_MXCSR_REGNUM || regnum == -1)
- regcache_raw_collect (regcache, I387_MXCSR_REGNUM,
+ if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1)
+ regcache_raw_collect (regcache, I387_MXCSR_REGNUM (tdep),
FXSAVE_MXCSR_ADDR (regs));
-
-#undef I387_ST0_REGNUM
-#undef I387_NUM_XMM_REGS
}
/* Recreate the FTW (tag word) valid bits from the 80-bit FP data in
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
ULONGEST fstat;
- /* Define I387_ST0_REGNUM such that we use the proper
- definitions for the architecture. */
-#define I387_ST0_REGNUM tdep->st0_regnum
-
/* Set the top of the floating-point register stack to 7. The
actual value doesn't really matter, but 7 is what a normal
function return would end up with if the program started out with
a freshly initialized FPU. */
- regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM, &fstat);
+ regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM (tdep), &fstat);
fstat |= (7 << 11);
- regcache_raw_write_unsigned (regcache, I387_FSTAT_REGNUM, fstat);
+ regcache_raw_write_unsigned (regcache, I387_FSTAT_REGNUM (tdep), fstat);
/* Mark %st(1) through %st(7) as empty. Since we set the top of the
floating-point register stack to 7, the appropriate value for the
tag word is 0x3fff. */
- regcache_raw_write_unsigned (regcache, I387_FTAG_REGNUM, 0x3fff);
+ regcache_raw_write_unsigned (regcache, I387_FTAG_REGNUM (tdep), 0x3fff);
-#undef I387_ST0_REGNUM
}
struct type;
struct ui_file;
-/* Because the number of general-purpose registers is different for
- AMD64, the floating-point registers and SSE registers get shifted.
- The following definitions are intended to help writing code that
- needs the register numbers of floating-point registers and SSE
- registers. In order to use these, one should provide a definition
- for I387_ST0_REGNUM, and possibly I387_NUM_XMM_REGS, preferably by
- using a local "#define" in the body of the function that uses this.
- Please "#undef" them before the end of the function. */
-
-#define I387_FCTRL_REGNUM (I387_ST0_REGNUM + 8)
-#define I387_FSTAT_REGNUM (I387_FCTRL_REGNUM + 1)
-#define I387_FTAG_REGNUM (I387_FCTRL_REGNUM + 2)
-#define I387_FISEG_REGNUM (I387_FCTRL_REGNUM + 3)
-#define I387_FIOFF_REGNUM (I387_FCTRL_REGNUM + 4)
-#define I387_FOSEG_REGNUM (I387_FCTRL_REGNUM + 5)
-#define I387_FOOFF_REGNUM (I387_FCTRL_REGNUM + 6)
-#define I387_FOP_REGNUM (I387_FCTRL_REGNUM + 7)
-#define I387_XMM0_REGNUM (I387_ST0_REGNUM + 16)
-#define I387_MXCSR_REGNUM (I387_XMM0_REGNUM + I387_NUM_XMM_REGS)
-\f
+#define I387_ST0_REGNUM(tdep) ((tdep)->st0_regnum)
+#define I387_NUM_XMM_REGS(tdep) ((tdep)->num_xmm_regs)
+#define I387_MM0_REGNUM(tdep) ((tdep)->mm0_regnum)
+
+#define I387_FCTRL_REGNUM(tdep) (I387_ST0_REGNUM (tdep) + 8)
+#define I387_FSTAT_REGNUM(tdep) (I387_FCTRL_REGNUM (tdep) + 1)
+#define I387_FTAG_REGNUM(tdep) (I387_FCTRL_REGNUM (tdep) + 2)
+#define I387_FISEG_REGNUM(tdep) (I387_FCTRL_REGNUM (tdep) + 3)
+#define I387_FIOFF_REGNUM(tdep) (I387_FCTRL_REGNUM (tdep) + 4)
+#define I387_FOSEG_REGNUM(tdep) (I387_FCTRL_REGNUM (tdep) + 5)
+#define I387_FOOFF_REGNUM(tdep) (I387_FCTRL_REGNUM (tdep) + 6)
+#define I387_FOP_REGNUM(tdep) (I387_FCTRL_REGNUM (tdep) + 7)
+#define I387_XMM0_REGNUM(tdep) (I387_ST0_REGNUM (tdep) + 16)
+#define I387_MXCSR_REGNUM(tdep) \
+ (I387_XMM0_REGNUM (tdep) + I387_NUM_XMM_REGS (tdep))
/* Print out the i387 floating point state. */
do_win32_fetch_inferior_registers (struct regcache *regcache, int r)
{
char *context_offset = ((char *) ¤t_thread->context) + mappings[r];
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
long l;
if (!current_thread)
current_thread->reload_context = 0;
}
-#define I387_ST0_REGNUM I386_ST0_REGNUM
-
- if (r == I387_FISEG_REGNUM)
+ if (r == I387_FISEG_REGNUM (tdep))
{
l = *((long *) context_offset) & 0xffff;
regcache_raw_supply (regcache, r, (char *) &l);
}
- else if (r == I387_FOP_REGNUM)
+ else if (r == I387_FOP_REGNUM (tdep))
{
l = (*((long *) context_offset) >> 16) & ((1 << 11) - 1);
regcache_raw_supply (regcache, r, (char *) &l);
regcache_raw_supply (regcache, r, context_offset);
else
{
- for (r = 0; r < gdbarch_num_regs (get_regcache_arch (regcache)); r++)
+ for (r = 0; r < gdbarch_num_regs (gdbarch); r++)
do_win32_fetch_inferior_registers (regcache, r);
}
-
-#undef I387_ST0_REGNUM
}
static void
do_win32_fetch_inferior_registers (struct regcache *regcache, int r)
{
char *context_offset = ((char *) ¤t_thread->context) + mappings[r];
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
long l;
if (!current_thread)
current_thread->reload_context = 0;
}
-#define I387_ST0_REGNUM I386_ST0_REGNUM
-
- if (r == I387_FISEG_REGNUM)
+ if (r == I387_FISEG_REGNUM (tdep))
{
l = *((long *) context_offset) & 0xffff;
regcache_raw_supply (regcache, r, (char *) &l);
}
- else if (r == I387_FOP_REGNUM)
+ else if (r == I387_FOP_REGNUM (tdep))
{
l = (*((long *) context_offset) >> 16) & ((1 << 11) - 1);
regcache_raw_supply (regcache, r, (char *) &l);
regcache_raw_supply (regcache, r, context_offset);
else
{
- for (r = 0; r < gdbarch_num_regs (get_regcache_arch (regcache)); r++)
+ for (r = 0; r < gdbarch_num_regs (gdbarch); r++)
do_win32_fetch_inferior_registers (regcache, r);
}
-
-#undef I387_ST0_REGNUM
}
static void
projects / binutils-gdb.git / commitdiff