rs6000_option_override_internal (bool global_init_p)
{
bool ret = true;
- bool have_cpu = false;
-
- /* The default cpu requested at configure time, if any. */
- const char *implicit_cpu = OPTION_TARGET_CPU_DEFAULT;
HOST_WIDE_INT set_masks;
HOST_WIDE_INT ignore_masks;
- int cpu_index;
+ int cpu_index = -1;
int tune_index;
struct cl_target_option *main_target_opt
= ((global_init_p || target_option_default_node == NULL)
with -mtune on the command line. Process a '--with-cpu' configuration
request as an implicit --cpu. */
if (rs6000_cpu_index >= 0)
- {
- cpu_index = rs6000_cpu_index;
- have_cpu = true;
- }
+ cpu_index = rs6000_cpu_index;
else if (main_target_opt != NULL && main_target_opt->x_rs6000_cpu_index >= 0)
- {
- rs6000_cpu_index = cpu_index = main_target_opt->x_rs6000_cpu_index;
- have_cpu = true;
- }
- else if (implicit_cpu)
- {
- rs6000_cpu_index = cpu_index = rs6000_cpu_name_lookup (implicit_cpu);
- have_cpu = true;
- }
- else
- {
- /* PowerPC 64-bit LE requires at least ISA 2.07. */
- const char *default_cpu = ((!TARGET_POWERPC64)
- ? "powerpc"
- : ((BYTES_BIG_ENDIAN)
- ? "powerpc64"
- : "powerpc64le"));
-
- rs6000_cpu_index = cpu_index = rs6000_cpu_name_lookup (default_cpu);
- have_cpu = false;
- }
-
- gcc_assert (cpu_index >= 0);
+ cpu_index = main_target_opt->x_rs6000_cpu_index;
+ else if (OPTION_TARGET_CPU_DEFAULT)
+ cpu_index = rs6000_cpu_name_lookup (OPTION_TARGET_CPU_DEFAULT);
- if (have_cpu)
+ if (cpu_index >= 0)
{
-#ifndef HAVE_AS_POWER9
- if (processor_target_table[rs6000_cpu_index].processor
- == PROCESSOR_POWER9)
+ const char *unavailable_cpu = NULL;
+ switch (processor_target_table[cpu_index].processor)
{
- have_cpu = false;
- warning (0, "will not generate power9 instructions because "
- "assembler lacks power9 support");
- }
+#ifndef HAVE_AS_POWER9
+ case PROCESSOR_POWER9:
+ unavailable_cpu = "power9";
+ break;
#endif
#ifndef HAVE_AS_POWER8
- if (processor_target_table[rs6000_cpu_index].processor
- == PROCESSOR_POWER8)
- {
- have_cpu = false;
- warning (0, "will not generate power8 instructions because "
- "assembler lacks power8 support");
- }
+ case PROCESSOR_POWER8:
+ unavailable_cpu = "power8";
+ break;
#endif
#ifndef HAVE_AS_POPCNTD
- if (processor_target_table[rs6000_cpu_index].processor
- == PROCESSOR_POWER7)
- {
- have_cpu = false;
- warning (0, "will not generate power7 instructions because "
- "assembler lacks power7 support");
- }
+ case PROCESSOR_POWER7:
+ unavailable_cpu = "power7";
+ break;
#endif
#ifndef HAVE_AS_DFP
- if (processor_target_table[rs6000_cpu_index].processor
- == PROCESSOR_POWER6)
- {
- have_cpu = false;
- warning (0, "will not generate power6 instructions because "
- "assembler lacks power6 support");
- }
+ case PROCESSOR_POWER6:
+ unavailable_cpu = "power6";
+ break;
#endif
#ifndef HAVE_AS_POPCNTB
- if (processor_target_table[rs6000_cpu_index].processor
- == PROCESSOR_POWER5)
- {
- have_cpu = false;
- warning (0, "will not generate power5 instructions because "
- "assembler lacks power5 support");
- }
+ case PROCESSOR_POWER5:
+ unavailable_cpu = "power5";
+ break;
#endif
-
- if (!have_cpu)
+ default:
+ break;
+ }
+ if (unavailable_cpu)
{
- /* PowerPC 64-bit LE requires at least ISA 2.07. */
- const char *default_cpu = (!TARGET_POWERPC64
- ? "powerpc"
- : (BYTES_BIG_ENDIAN
- ? "powerpc64"
- : "powerpc64le"));
-
- rs6000_cpu_index = cpu_index = rs6000_cpu_name_lookup (default_cpu);
+ cpu_index = -1;
+ warning (0, "will not generate %qs instructions because "
+ "assembler lacks %qs support", unavailable_cpu,
+ unavailable_cpu);
}
}
with those from the cpu, except for options that were explicitly set. If
we don't have a cpu, do not override the target bits set in
TARGET_DEFAULT. */
- if (have_cpu)
+ if (cpu_index >= 0)
{
+ rs6000_cpu_index = cpu_index;
rs6000_isa_flags &= ~set_masks;
rs6000_isa_flags |= (processor_target_table[cpu_index].target_enable
& set_masks);
If there is a TARGET_DEFAULT, use that. Otherwise fall back to using
-mcpu=powerpc, -mcpu=powerpc64, or -mcpu=powerpc64le defaults. */
- HOST_WIDE_INT flags = ((TARGET_DEFAULT) ? TARGET_DEFAULT
- : processor_target_table[cpu_index].target_enable);
+ HOST_WIDE_INT flags;
+ if (TARGET_DEFAULT)
+ flags = TARGET_DEFAULT;
+ else
+ {
+ /* PowerPC 64-bit LE requires at least ISA 2.07. */
+ const char *default_cpu = (!TARGET_POWERPC64
+ ? "powerpc"
+ : (BYTES_BIG_ENDIAN
+ ? "powerpc64"
+ : "powerpc64le"));
+ int default_cpu_index = rs6000_cpu_name_lookup (default_cpu);
+ flags = processor_target_table[default_cpu_index].target_enable;
+ }
rs6000_isa_flags |= (flags & ~rs6000_isa_flags_explicit);
}
if (rs6000_tune_index >= 0)
tune_index = rs6000_tune_index;
- else if (have_cpu)
+ else if (cpu_index >= 0)
rs6000_tune_index = tune_index = cpu_index;
else
{
for (i = 0; i < ARRAY_SIZE (processor_target_table); i++)
if (processor_target_table[i].processor == tune_proc)
{
- rs6000_tune_index = tune_index = i;
+ tune_index = i;
break;
}
}
rs6000_isa_flags |= (ISA_3_0_MASKS_SERVER & ~ignore_masks);
else if (TARGET_P9_MINMAX)
{
- if (have_cpu)
+ if (cpu_index >= 0)
{
if (cpu_index == PROCESSOR_POWER9)
{
default:
- if (have_cpu && !(rs6000_isa_flags_explicit & OPTION_MASK_ISEL))
+ if (cpu_index >= 0 && !(rs6000_isa_flags_explicit & OPTION_MASK_ISEL))
rs6000_isa_flags &= ~OPTION_MASK_ISEL;
break;
{
struct cl_target_option cur_target;
bool ret;
- tree old_optimize = build_optimization_node (&global_options);
+ tree old_optimize;
tree new_target, new_optimize;
- tree func_optimize = DECL_FUNCTION_SPECIFIC_OPTIMIZATION (fndecl);
+ tree func_optimize;
gcc_assert ((fndecl != NULL_TREE) && (args != NULL_TREE));
}
target_option_current_node = cur_tree;
+ rs6000_activate_target_options (target_option_current_node);
/* If we have the preprocessor linked in (i.e. C or C++ languages), possibly
change the macros that are defined. */
/* Restore target's globals from NEW_TREE and invalidate the
rs6000_previous_fndecl cache. */
-static void
+void
rs6000_activate_target_options (tree new_tree)
{
cl_target_option_restore (&global_options, TREE_TARGET_OPTION (new_tree));