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util/tgsi: Fix ureg_EMIT/ENDPRIM prototype.
author
José Fonseca
<jfonseca@vmware.com>
Tue, 15 Jul 2014 13:47:20 +0000
(14:47 +0100)
committer
José Fonseca
<jfonseca@vmware.com>
Tue, 15 Jul 2014 13:56:31 +0000
(14:56 +0100)
0cbefc1bea703378381afff946e30c27a21f191d
added a source argument to
EMIT/ENDPRIM, but it did not update tgsi_ureg accordingly, causing all
users of ureg_EMIT/ENDPRIM to fail at runtime with an assertion failure.
Trivial.
src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h
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diff --git
a/src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h
b/src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h
index cc5c03bd4576b10b40f7c6fcd28e79d73cef13a3..7888be86702b350233666226560fc3cbfbb2e714 100644
(file)
--- a/
src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h
+++ b/
src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h
@@
-146,8
+146,8
@@
OP13(SAD)
OP12_TEX(TXF)
OP12_TEX(TXQ)
OP00(CONT)
-OP0
0
(EMIT)
-OP0
0
(ENDPRIM)
+OP0
1
(EMIT)
+OP0
1
(ENDPRIM)
OP00_LBL(BGNLOOP)
OP00(BGNSUB)
OP00_LBL(ENDLOOP)