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diff --git a/openpower/sv/svp64.mdwn b/openpower/sv/svp64.mdwn
index f3ec7a6a5471dc90cdb09317c6455d6527b151ef..8a578031f76101bc48409f26c34c7aa6fcb0fd0c 100644 (file)
--- a/openpower/sv/svp64.mdwn
+++ b/openpower/sv/svp64.mdwn
@@ -82,7 +82,7 @@ linearly to larger sizes; SV Vectorisation iterates sequentially through these r
 Where the integer regfile in standard scalar
 OpenPOWER v3.0B/v3.1B is r0 to r31, SV extends this as r0 to r127.
 Likewise FP registers are extended to 128 (fp0 to fp127), and CRs are
-extended to 64 entries, CR0 thru CR63.
+extended to 128 entries, CR0 thru CR127.
 
 The names of the registers therefore reflects a simple linear extension
 of the OpenPOWER v3.0B / v3.1B register naming, and in hardware this