i965: Add names for all instructions to dump_instruction() in FS and VS.

I'd previously added the minimum names to understand my dumps, but this
makes dumps in general much easier to read.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 1b5887d0cffde71c58a6349d86dd4bef851f944e..2bd7b3402ce12faf85ff0710dde98fe28ed7d854 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -2525,25 +2525,7 @@ fs_visitor::dump_instruction(fs_inst *inst)
              inst->flag_subreg);
    }
 
-   if (inst->opcode < ARRAY_SIZE(opcode_descs) &&
-       opcode_descs[inst->opcode].name) {
-      printf("%s", opcode_descs[inst->opcode].name);
-   } else {
-      switch (inst->opcode) {
-      case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:
-         printf("uniform_pull_const");
-         break;
-      case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD_GEN7:
-         printf("uniform_pull_const_gen7");
-         break;
-      case FS_OPCODE_SET_SIMD4X2_OFFSET:
-         printf("set_global_offset");
-         break;
-      default:
-         printf("op%d", inst->opcode);
-         break;
-      }
-   }
+   printf("%s", brw_instruction_name(inst->opcode));
    if (inst->saturate)
       printf(".sat");
    if (inst->conditional_mod) {

diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index aeac69ac85af983081f5ff86d74c6a11e7adb46a..e4392bd1b9b2e9b15f00986cc46bc0566ecca67e 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -378,3 +378,113 @@ brw_texture_offset(ir_constant *offset)
    }
    return offset_bits;
 }
+
+const char *
+brw_instruction_name(enum opcode op)
+{
+   char *fallback;
+
+   if (op < ARRAY_SIZE(opcode_descs) && opcode_descs[op].name)
+      return opcode_descs[op].name;
+
+   switch (op) {
+   case FS_OPCODE_FB_WRITE:
+      return "fb_write";
+
+   case SHADER_OPCODE_RCP:
+      return "rcp";
+   case SHADER_OPCODE_RSQ:
+      return "rsq";
+   case SHADER_OPCODE_SQRT:
+      return "sqrt";
+   case SHADER_OPCODE_EXP2:
+      return "exp2";
+   case SHADER_OPCODE_LOG2:
+      return "log2";
+   case SHADER_OPCODE_POW:
+      return "pow";
+   case SHADER_OPCODE_INT_QUOTIENT:
+      return "int_quot";
+   case SHADER_OPCODE_INT_REMAINDER:
+      return "int_rem";
+   case SHADER_OPCODE_SIN:
+      return "sin";
+   case SHADER_OPCODE_COS:
+      return "cos";
+
+   case SHADER_OPCODE_TEX:
+      return "tex";
+   case SHADER_OPCODE_TXD:
+      return "txd";
+   case SHADER_OPCODE_TXF:
+      return "txf";
+   case SHADER_OPCODE_TXL:
+      return "txl";
+   case SHADER_OPCODE_TXS:
+      return "txs";
+   case FS_OPCODE_TXB:
+      return "txb";
+   case SHADER_OPCODE_TXF_MS:
+      return "txf_ms";
+
+   case FS_OPCODE_DDX:
+      return "ddx";
+   case FS_OPCODE_DDY:
+      return "ddy";
+
+   case FS_OPCODE_PIXEL_X:
+      return "pixel_x";
+   case FS_OPCODE_PIXEL_Y:
+      return "pixel_y";
+
+   case FS_OPCODE_CINTERP:
+      return "cinterp";
+   case FS_OPCODE_LINTERP:
+      return "linterp";
+
+   case FS_OPCODE_SPILL:
+      return "spill";
+   case FS_OPCODE_UNSPILL:
+      return "unspill";
+
+   case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:
+      return "uniform_pull_const";
+   case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD_GEN7:
+      return "uniform_pull_const_gen7";
+   case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD:
+      return "varying_pull_const";
+   case FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_GEN7:
+      return "varying_pull_const_gen7";
+
+   case FS_OPCODE_MOV_DISPATCH_TO_FLAGS:
+      return "mov_dispatch_to_flags";
+   case FS_OPCODE_DISCARD_JUMP:
+      return "discard_jump";
+
+   case FS_OPCODE_SET_SIMD4X2_OFFSET:
+      return "set_simd4x2_offset";
+
+   case FS_OPCODE_PACK_HALF_2x16_SPLIT:
+      return "pack_half_2x16_split";
+   case FS_OPCODE_UNPACK_HALF_2x16_SPLIT_X:
+      return "unpack_half_2x16_split_x";
+   case FS_OPCODE_UNPACK_HALF_2x16_SPLIT_Y:
+      return "unpack_half_2x16_split_y";
+
+   case VS_OPCODE_URB_WRITE:
+      return "urb_write";
+   case VS_OPCODE_SCRATCH_READ:
+      return "scratch_read";
+   case VS_OPCODE_SCRATCH_WRITE:
+      return "scratch_write";
+   case VS_OPCODE_PULL_CONSTANT_LOAD:
+      return "pull_constant_load";
+
+   default:
+      /* Yes, this leaks.  It's in debug code, it should never occur, and if
+       * it does, you should just add the case to the list above.
+       */
+      asprintf(&fallback, "op%d", op);
+      return fallback;
+   }
+}

diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h
index 46fe570364f60710f4ddbec0da00c0177852e3dc..9d21d8f5eb8ebf476db5535af103c92165d2b857 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drivers/dri/i965/brw_shader.h
@@ -58,3 +58,4 @@ int brw_type_for_base_type(const struct glsl_type *type);
 uint32_t brw_conditional_for_comparison(unsigned int op);
 uint32_t brw_math_function(enum opcode op);
 uint32_t brw_texture_offset(ir_constant *offset);
+const char *brw_instruction_name(enum opcode op);

diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index 9308ed61041857456fa156531b950a9c7b1a5be9..184eff9345bf78f65f00ec6c01ee2cba801b1451 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -972,12 +972,7 @@ vec4_visitor::split_virtual_grfs()
 void
 vec4_visitor::dump_instruction(vec4_instruction *inst)
 {
-   if (inst->opcode < ARRAY_SIZE(opcode_descs) &&
-       opcode_descs[inst->opcode].name) {
-      printf("%s ", opcode_descs[inst->opcode].name);
-   } else {
-      printf("op%d ", inst->opcode);
-   }
+   printf("%s ", brw_instruction_name(inst->opcode));
 
    switch (inst->dst.file) {
    case GRF: