--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Test that PADDI is generated to add a large constant. */
+unsigned long
+add (unsigned long a)
+{
+ return a + 0x12345U;
+}
+
+/* { dg-final { scan-assembler {\mpaddi\M} } } */
+/* { dg-final { scan-assembler-not {\maddi\M} } } */
+/* { dg-final { scan-assembler-not {\maddis\M} } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Test that PLI (PADDI) is generated to load a large constant. */
+unsigned long long
+large (void)
+{
+ return 0x12345678ULL;
+}
+
+/* { dg-final { scan-assembler {\mpli\M} } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether we generate a prefixed load/store operation for addresses that
+ don't meet DS/DQ offset constraints. 64-bit is needed for testing the use
+ of the PLWA instruciton. */
+
+struct packed_struct
+{
+ long long pad; /* offset 0 bytes. */
+ unsigned char pad_uc; /* offset 8 bytes. */
+ unsigned char uc; /* offset 9 bytes. */
+
+ unsigned char pad_sc[sizeof (long long) - sizeof (unsigned char)];
+ unsigned char sc; /* offset 17 bytes. */
+
+ unsigned char pad_us[sizeof (long long) - sizeof (signed char)];
+ unsigned short us; /* offset 25 bytes. */
+
+ unsigned char pad_ss[sizeof (long long) - sizeof (unsigned short)];
+ short ss; /* offset 33 bytes. */
+
+ unsigned char pad_ui[sizeof (long long) - sizeof (short)];
+ unsigned int ui; /* offset 41 bytes. */
+
+ unsigned char pad_si[sizeof (long long) - sizeof (unsigned int)];
+ unsigned int si; /* offset 49 bytes. */
+
+ unsigned char pad_f[sizeof (long long) - sizeof (int)];
+ float f; /* offset 57 bytes. */
+
+ unsigned char pad_d[sizeof (long long) - sizeof (float)];
+ double d; /* offset 65 bytes. */
+ __float128 f128; /* offset 73 bytes. */
+} __attribute__((packed));
+
+unsigned char
+load_uc (struct packed_struct *p)
+{
+ return p->uc; /* LBZ 3,9(3). */
+}
+
+signed char
+load_sc (struct packed_struct *p)
+{
+ return p->sc; /* LBZ 3,17(3) + EXTSB 3,3. */
+}
+
+unsigned short
+load_us (struct packed_struct *p)
+{
+ return p->us; /* LHZ 3,25(3). */
+}
+
+short
+load_ss (struct packed_struct *p)
+{
+ return p->ss; /* LHA 3,33(3). */
+}
+
+unsigned int
+load_ui (struct packed_struct *p)
+{
+ return p->ui; /* LWZ 3,41(3). */
+}
+
+int
+load_si (struct packed_struct *p)
+{
+ return p->si; /* PLWA 3,49(3). */
+}
+
+float
+load_float (struct packed_struct *p)
+{
+ return p->f; /* LFS 1,57(3). */
+}
+
+double
+load_double (struct packed_struct *p)
+{
+ return p->d; /* LFD 1,65(3). */
+}
+
+__float128
+load_float128 (struct packed_struct *p)
+{
+ return p->f128; /* PLXV 34,73(3). */
+}
+
+void
+store_uc (struct packed_struct *p, unsigned char uc)
+{
+ p->uc = uc; /* STB 4,9(3). */
+}
+
+void
+store_sc (struct packed_struct *p, signed char sc)
+{
+ p->sc = sc; /* STB 4,17(3). */
+}
+
+void
+store_us (struct packed_struct *p, unsigned short us)
+{
+ p->us = us; /* STH 4,25(3). */
+}
+
+void
+store_ss (struct packed_struct *p, signed short ss)
+{
+ p->ss = ss; /* STH 4,33(3). */
+}
+
+void
+store_ui (struct packed_struct *p, unsigned int ui)
+{
+ p->ui = ui; /* STW 4,41(3). */
+}
+
+void
+store_si (struct packed_struct *p, signed int si)
+{
+ p->si = si; /* STW 4,49(3). */
+}
+
+void
+store_float (struct packed_struct *p, float f)
+{
+ p->f = f; /* STFS 1,57(3). */
+}
+
+void
+store_double (struct packed_struct *p, double d)
+{
+ p->d = d; /* STFD 1,65(3). */
+}
+
+void
+store_float128 (struct packed_struct *p, __float128 f128)
+{
+ p->f128 = f128; /* PSTXV 34,1(3). */
+}
+
+/* { dg-final { scan-assembler-times {\mextsb\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mlbz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mlfd\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mlfs\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mlha\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mlhz\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mlwz\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mplwa\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mplxv\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mpstxv\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mstb\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mstfd\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mstfs\M} 1 } } */
+/* { dg-final { scan-assembler-times {\msth\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mstw\M} 2 } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the _Decimal64 type. */
+
+#define TYPE _Decimal64
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplfd\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstfd\M} 2 } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the double type. */
+
+#define TYPE double
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplfd\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstfd\M} 2 } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the long long type. */
+
+#define TYPE long long
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mpld\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstd\M} 2 } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the short type. */
+
+#define TYPE short
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplh[az]\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpsth\M} 2 } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the _Float128 type. */
+
+#define TYPE _Float128
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplxv\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstxv\M} 2 } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the signed char type. */
+
+#define TYPE signed char
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplbz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstb\M} 2 } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the _Decimal32 type. Note, the _Decimal32 type will not generate any
+ prefixed load or stores, because there is no prefixed load/store instruction
+ to load up a vector register as a zero extended 32-bit integer. So we count
+ the number of load addresses that are generated. */
+
+#define TYPE _Decimal32
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mpli\M} 3 } } */
+/* { dg-final { scan-assembler-times {\mlfiwzx\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mstfiwx\M} 2 } } */
+
+
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the float type. */
+
+#define TYPE float
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplfs\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstfs\M} 2 } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the _Decimal64 type. */
+
+#define TYPE int
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplw[az]\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstw\M} 2 } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the unsigned long long type. */
+
+#define TYPE unsigned long long
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mpld\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstd\M} 2 } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the unsigned short type. */
+
+#define TYPE unsigned short
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplhz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpsth\M} 2 } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the unsigned char type. */
+
+#define TYPE unsigned char
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplbz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstb\M} 2 } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the unsigned int type. */
+
+#define TYPE unsigned int
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplwz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstw\M} 2 } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the vector double type. */
+
+#define TYPE vector double
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplxv\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstxv\M} 2 } } */
--- /dev/null
+/* Common tests for prefixed instructions testing whether we can generate a
+ 34-bit offset using 1 instruction. */
+
+#ifndef TYPE
+#define TYPE unsigned int
+#endif
+
+#if !defined(DO_ADD) && !defined(DO_VALUE) && !defined(DO_SET)
+#define DO_ADD 1
+#define DO_VALUE 1
+#define DO_SET 1
+#endif
+
+#ifndef CONSTANT
+#define CONSTANT 0x12480UL
+#endif
+
+#if DO_ADD
+void
+add (TYPE *p, TYPE a)
+{
+ p[CONSTANT] += a;
+}
+#endif
+
+#if DO_VALUE
+TYPE
+value (TYPE *p)
+{
+ return p[CONSTANT];
+}
+#endif
+
+#if DO_SET
+void
+set (TYPE *p, TYPE a)
+{
+ p[CONSTANT] = a;
+}
+#endif
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Make sure that we don't generate a prefixed form of the load and store with
+ update instructions (i.e. instead of generating LWZU we have to generate
+ PLWZ plus a PADDI). */
+
+#ifndef SIZE
+#define SIZE 50000
+#endif
+
+struct foo {
+ unsigned int field;
+ char pad[SIZE];
+};
+
+struct foo *inc_load (struct foo *p, unsigned int *q)
+{
+ *q = (++p)->field; /* PLWZ, PADDI, STW. */
+ return p;
+}
+
+struct foo *dec_load (struct foo *p, unsigned int *q)
+{
+ *q = (--p)->field; /* PLWZ, PADDI, STW. */
+ return p;
+}
+
+struct foo *inc_store (struct foo *p, unsigned int *q)
+{
+ (++p)->field = *q; /* LWZ, PADDI, PSTW. */
+ return p;
+}
+
+struct foo *dec_store (struct foo *p, unsigned int *q)
+{
+ (--p)->field = *q; /* LWZ, PADDI, PSTW. */
+ return p;
+}
+
+/* { dg-final { scan-assembler-times {\mlwz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mstw\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpaddi\M} 4 } } */
+/* { dg-final { scan-assembler-times {\mplwz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstw\M} 2 } } */
+/* { dg-final { scan-assembler-not {\mplwzu\M} } } */
+/* { dg-final { scan-assembler-not {\mpstwu\M} } } */
+/* { dg-final { scan-assembler-not {\maddis\M} } } */
+/* { dg-final { scan-assembler-not {\maddi\M} } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ _Decimal64 type. */
+
+#define TYPE _Decimal64
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplfd\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstfd\M} 2 } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ double type. */
+
+#define TYPE double
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplfd\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstfd\M} 2 } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ long long type. */
+
+#define TYPE long long
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mpld\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstd\M} 2 } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ short type. */
+
+#define TYPE short
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplh[az]\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpsth\M} 2 } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ _Float128 type. */
+
+#define TYPE _Float128
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplxv\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstxv\M} 2 } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ signed char type. */
+
+#define TYPE signed char
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplbz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstb\M} 2 } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ _Decimal32 type. Note, the _Decimal32 type will not generate any prefixed
+ load or stores, because there is no prefixed load/store instruction to load
+ up a vector register as a zero extended 32-bit integer. So we count the
+ number of load addresses that are generated. */
+
+#define TYPE _Decimal32
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mpla\M} 3 } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ float type. */
+
+#define TYPE float
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplfs\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstfs\M} 2 } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ int type. */
+
+#define TYPE int
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplw[az]\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstw\M} 2 } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ unsigned long long type. */
+
+#define TYPE unsigned long long
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mpld\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstd\M} 2 } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ unsigned short type. */
+
+#define TYPE unsigned short
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplhz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpsth\M} 2 } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ unsigned char type. */
+
+#define TYPE unsigned char
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplbz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstb\M} 2 } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ unsigned int type. */
+
+#define TYPE unsigned int
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplwz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstw\M} 2 } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ vector double type. */
+
+#define TYPE vector double
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplxv\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstxv\M} 2 } } */
--- /dev/null
+/* Common tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for each type. */
+
+#ifndef TYPE
+#define TYPE unsigned int
+#endif
+
+static TYPE a;
+
+/* Make sure a is not optimized away. */
+TYPE *p = &a;
+
+#if !defined(DO_ADD) && !defined(DO_VALUE) && !defined(DO_SET)
+#define DO_ADD 1
+#define DO_VALUE 1
+#define DO_SET 1
+#endif
+
+#if DO_ADD
+void
+add (TYPE b)
+{
+ a += b;
+}
+#endif
+
+#if DO_VALUE
+TYPE
+value (void)
+{
+ return a;
+}
+#endif
+
+#if DO_SET
+void
+set (TYPE b)
+{
+ a = b;
+}
+#endif
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Test that PLI (PADDI) is generated to load a large constant for SImode. */
+void
+large_si (unsigned int *p)
+{
+ *p = 0x12345U;
+}
+
+/* { dg-final { scan-assembler {\mpli\M} } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10 -fstack-protector-strong" } */
+
+/* Test that we can handle large stack frames with -fstack-protector-strong and
+ prefixed addressing. This was originally discovered when trying to build
+ glibc with -mcpu=power10, and vfwprintf.c failed because it used
+ -fstack-protector-strong. It needs 64-bit due to the size of the stack. */
+
+extern long foo (char *);
+
+long
+bar (void)
+{
+ char buffer[0x20000];
+ return foo (buffer) + 1;
+}
+
+/* { dg-final { scan-assembler {\mpld\M} } } */
+/* { dg-final { scan-assembler {\mpstd\M} } } */
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