remove trailing spaces

diff --git a/openpower/sv/rfc/ls003.mdwn b/openpower/sv/rfc/ls003.mdwn
index 86ccbaac3922fb37f2071a1ca0c870e5cda52e5c..3d7615a9eb4d502e279641da768d9b29778dbfbc 100644 (file)
--- a/openpower/sv/rfc/ls003.mdwn
+++ b/openpower/sv/rfc/ls003.mdwn
@@ -1,4 +1,4 @@
-# RFC ls003 Big Integer 
+# RFC ls003 Big Integer
 
 **URLs**:
 
@@ -81,7 +81,7 @@ TODO: address Jacob's comments: https://libre-soc.org/irclog/%23libre-soc.2022-1
 1. It is not practical to add Rc=1 variants as VA-Form is used and
    there is a **pair** of results produced.
 2. An overflow variant (XER.OV set) of `divmod2du` would be valuable
-   but VA-Form EXT004 is under severe pressure. 
+   but VA-Form EXT004 is under severe pressure.
 3. Both `maddhdu` and `divmod2du` instructions have been present in Intel x86
    for several decades.  Likewise, variants of `dsld` and `dsrd`.
 4. None of these instruction is present in VSX: these are 128/64 whereas
@@ -371,8 +371,8 @@ Pseudo-code:
 
     n <- (RB)[58:63]                        # Take lower 6-bits for shift
     v <- ROTL64((RA), 64-n)                 # Rotate RA 64-bit left by 64-n bits
-    mask <- MASK(n, 63)                     # 0's mask, set mask[n:63] to 1' 
-    RT <- (v[0:63] & mask) | ((RC) & ¬mask) # 
+    mask <- MASK(n, 63)                     # 0's mask, set mask[n:63] to 1'
+    RT <- (v[0:63] & mask) | ((RC) & ¬mask) #
     RS <- v[0:63] & ¬mask
     overflow = 0
     if RS != [0]*64: