h8300.md: Organize peephole2's that trasform (compare (reg:HI) (const_int)).

	* config/h8300/h8300.md: Organize peephole2's that trasform
	(compare (reg:HI) (const_int)).

From-SVN: r65089

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c7b59f0071f2b5b3b964e04d872ac2eed90bb52e..b779ea3c63dc8fdb439999a610a606869ce30fb4 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2003-03-31  Kazu Hirata  <kazu@cs.umass.edu>
+
+       * config/h8300/h8300.md: Organize peephole2's that trasform
+       (compare (reg:HI) (const_int)).
+
 2003-03-31  Roger Sayle  <roger@eyesopen.com>
 
        * emit-rtl.c (dconstm2, dconsthalf): New real constants.

diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md
index f7170c969fa9cfb15531057a4f358dcbdde8b1cd..d0dbb1f358e5b2aef5f2ab8903d804dee49e0f39 100644 (file)
--- a/gcc/config/h8300/h8300.md
+++ b/gcc/config/h8300/h8300.md
@@ -3969,7 +3969,50 @@
 ;; dead     1                       geu/ltu shlr.l
 ;; dead     3 (H8S)                 geu/ltu shlr.l
 ;;
-;; dead   255                       geu/ltu mov.b
+;; ----   255                       geu/ltu mov.b
+
+;; Transform
+;;
+;;     cmp.w   #1,r0
+;;     bne     .L1
+;;
+;; into
+;;
+;;     dec.w   #1,r0
+;;     bne     .L1
+
+(define_peephole2
+  [(set (cc0)
+       (compare (match_operand:HI 0 "register_operand" "")
+                (match_operand:HI 1 "incdec_operand" "")))
+   (set (pc)
+       (if_then_else (match_operator 3 "eqne_operator"
+                       [(cc0) (const_int 0)])
+                     (label_ref (match_operand 2 "" ""))
+                     (pc)))]
+  "(TARGET_H8300H || TARGET_H8300S)
+   && peep2_reg_dead_p (1, operands[0])"
+  [(set (match_dup 0)
+       (unspec:HI [(match_dup 0)
+                   (match_dup 4)]
+                  UNSPEC_INCDEC))
+   (set (cc0)
+       (match_dup 0))
+   (set (pc)
+       (if_then_else (match_op_dup 3 [(cc0) (const_int 0)])
+                     (label_ref (match_dup 2))
+                     (pc)))]
+  "operands[4] = GEN_INT (- INTVAL (operands[1]));")
+
+;; Transform
+;;
+;;     cmp.w   #1,r0
+;;     bhi     .L1
+;;
+;; into
+;;
+;;     shlr.w  r0
+;;     bne     .L1
 
 (define_peephole2
   [(set (cc0)
@@ -3999,6 +4042,37 @@
                  gen_rtx_EQ (VOIDmode, cc0_rtx, const0_rtx));
    operands[5] = GEN_INT (exact_log2 (INTVAL (operands[1]) + 1));")
 
+;; Transform
+;;
+;;     cmp.w   #255,r0
+;;     bhi     .L1
+;;
+;; into
+;;
+;;     mov.b   r0h,r0h
+;;     bne     .L1
+
+(define_peephole2
+  [(set (cc0)
+       (compare (match_operand:HI 0 "register_operand" "")
+                (const_int 255)))
+   (set (pc)
+       (if_then_else (match_operator 1 "gtuleu_operator"
+                       [(cc0) (const_int 0)])
+                     (label_ref (match_operand 2 "" ""))
+                     (pc)))]
+  "TARGET_H8300H || TARGET_H8300S"
+  [(set (cc0)
+       (and:HI (match_dup 0)
+               (const_int -256)))
+   (set (pc)
+       (if_then_else (match_dup 4)
+                     (label_ref (match_dup 2))
+                     (pc)))]
+  "operands[4] = ((GET_CODE (operands[1]) == GTU) ?
+                 gen_rtx_NE (VOIDmode, cc0_rtx, const0_rtx) :
+                 gen_rtx_EQ (VOIDmode, cc0_rtx, const0_rtx));")
+
 ;; (compare (reg:SI) (const_int)) takes 6 bytes, so we try to achieve
 ;; the equivalent with shorter sequences.  Here is the summary.  Cases
 ;; are grouped for each define_peephole2.
@@ -4041,31 +4115,6 @@
 ;; For a small constant, it is cheaper to actually do the subtraction
 ;; and then test the register.
 
-(define_peephole2
-  [(set (cc0)
-       (compare (match_operand:HI 0 "register_operand" "")
-                (match_operand:HI 1 "incdec_operand" "")))
-   (set (pc)
-       (if_then_else (match_operator 3 "eqne_operator"
-                       [(cc0) (const_int 0)])
-                     (label_ref (match_operand 2 "" ""))
-                     (pc)))]
-  "(TARGET_H8300H || TARGET_H8300S)
-   && peep2_reg_dead_p (1, operands[0])"
-  [(set (match_dup 0)
-       (unspec:HI [(match_dup 0)
-                   (match_dup 4)]
-                  UNSPEC_INCDEC))
-   (set (cc0)
-       (match_dup 0))
-   (set (pc)
-       (if_then_else (match_op_dup 3 [(cc0) (const_int 0)])
-                     (label_ref (match_dup 2))
-                     (pc)))]
-  "operands[4] = GEN_INT (- INTVAL (operands[1]));")
-
-;; The SImode version of the previous pattern.
-
 (define_peephole2
   [(set (cc0)
        (compare (match_operand:SI 0 "register_operand" "")
@@ -4209,29 +4258,6 @@
                  gen_rtx_EQ (VOIDmode, cc0_rtx, const0_rtx));
    operands[5] = GEN_INT (~INTVAL (operands[1]));")
 
-;; Transform A <= 255 to (A & 0xff00) == 0.
-
-(define_peephole2
-  [(set (cc0)
-       (compare (match_operand:HI 0 "register_operand" "")
-                (const_int 255)))
-   (set (pc)
-       (if_then_else (match_operator 1 "gtuleu_operator"
-                       [(cc0) (const_int 0)])
-                     (label_ref (match_operand 2 "" ""))
-                     (pc)))]
-  "TARGET_H8300H || TARGET_H8300S"
-  [(set (cc0)
-       (and:HI (match_dup 0)
-               (const_int -256)))
-   (set (pc)
-       (if_then_else (match_dup 4)
-                     (label_ref (match_dup 2))
-                     (pc)))]
-  "operands[4] = ((GET_CODE (operands[1]) == GTU) ?
-                 gen_rtx_NE (VOIDmode, cc0_rtx, const0_rtx) :
-                 gen_rtx_EQ (VOIDmode, cc0_rtx, const0_rtx));")
-
 ;; Transform A <= 65535 to (A & 0xffff0000) == 0.
 
 (define_peephole2