* m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.

* m32c-ibld.c: Regenerate.

diff --git a/cpu/ChangeLog b/cpu/ChangeLog
index 975feea64d09aabef4030eecd36650f9e16b5a09..667538ac2922f089a37f6c370ab0076c536a6a74 100644 (file)
--- a/cpu/ChangeLog
+++ b/cpu/ChangeLog
@@ -1,3 +1,7 @@
+2010-07-03  DJ Delorie  <dj@delorie.com>
+
+       * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
+
 2010-02-11  Doug Evans  <dje@sebabeach.org>
 
        * m32r.cpu (HASH-PREFIX): Delete.

diff --git a/cpu/m32c.cpu b/cpu/m32c.cpu
index 28d6ea5685251758b6ffd505c1d7f2fcf87fb1f3..bcc36161f7cb374c98ee1f010acb2b16b8768a1b 100644 (file)
--- a/cpu/m32c.cpu
+++ b/cpu/m32c.cpu
@@ -572,10 +572,10 @@
 )
 (df  f-dsp-8-s24 "24 bit signed" (all-isas) 8 24 INT
      ((value pc) (or SI
-                    (or (srl value 16) (and value #xff00))
+                    (or (and (srl value 16) #xff) (and value #xff00))
                     (sll (ext INT (trunc QI (and value #xff))) 16)))
      ((value pc) (or SI
-                    (or (srl value 16) (and value #xff00))
+                    (or (and (srl value 16) #xff) (and value #xff00))
                     (sll (ext INT (trunc QI (and value #xff))) 16)))
  )
 

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 50489cd28a49ce4bf2df50dfc7f02887c3a039fb..527a93c9fa8a78d4b2e072d6fa3a3dd1dd12e134 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2010-07-03  DJ Delorie  <dj@delorie.com>
+
+       * m32c-ibld.c: Regenerate.
+
 2010-07-03  Alan Modra  <amodra@gmail.com>
 
        * ppc-opc.c (PWR2COM): Define.

diff --git a/opcodes/m32c-ibld.c b/opcodes/m32c-ibld.c
index 66fc9991a1ba7a1c141566f9b854509568f767a6..e83d8e0e5c768037c04a93c25e5255d1f0f05887 100644 (file)
--- a/opcodes/m32c-ibld.c
+++ b/opcodes/m32c-ibld.c
@@ -1077,7 +1077,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
     case M32C_OPERAND_DSP_8_S24 :
       {
         long value = fields->f_dsp_8_s24;
-        value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16))));
+        value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16))));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, buffer);
       }
       break;
@@ -2234,7 +2234,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, pc, & value);
-        value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16))));
+        value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16))));
         fields->f_dsp_8_s24 = value;
       }
       break;