+2013-08-28 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/58067
+ * config/i386/i386.md (*tls_global_dynamic_64_largepic): New insn.
+ (*tls_local_dynamic_base_64_largepic): Likewise.
+ (tls_global_dynamic_64_<mode>, tls_local_dynamic_base_64_<mode>):
+ Remove predicate from call operand.
+ * config/i386/i386.c (ix86_tls_get_addr): For -mcmodel=large -fpic
+ return sum of pic_offset_table_rtx and UNSPEC_PLTOFF of the symbol.
+
2013-08-28 Jeff Law <law@redhat.com>
* tree-ssa-threadedge.c (thread_around_empty_block): Remove
(set (attr "length")
(symbol_ref "TARGET_X32 ? 15 : 16"))])
+(define_insn "*tls_global_dynamic_64_largepic"
+ [(set (match_operand:DI 0 "register_operand" "=a")
+ (call:DI
+ (mem:QI (plus:DI (match_operand:DI 2 "register_operand" "b")
+ (match_operand:DI 3 "immediate_operand" "i")))
+ (match_operand 4)))
+ (unspec:DI [(match_operand 1 "tls_symbolic_operand")]
+ UNSPEC_TLS_GD)]
+ "TARGET_64BIT && ix86_cmodel == CM_LARGE_PIC && !TARGET_PECOFF
+ && GET_CODE (operands[3]) == CONST
+ && GET_CODE (XEXP (operands[3], 0)) == UNSPEC
+ && XINT (XEXP (operands[3], 0), 1) == UNSPEC_PLTOFF"
+{
+ output_asm_insn
+ ("lea{q}\t{%E1@tlsgd(%%rip), %%rdi|rdi, %E1@tlsgd[rip]}", operands);
+ output_asm_insn ("movabs{q}\t{%3, %%rax|rax, %3}", operands);
+ output_asm_insn ("add{q}\t{%2, %%rax|rax, %2}", operands);
+ return "call\t{*%%rax|rax}";
+}
+ [(set_attr "type" "multi")
+ (set_attr "length" "22")])
+
(define_expand "tls_global_dynamic_64_<mode>"
[(parallel
[(set (match_operand:P 0 "register_operand")
(call:P
- (mem:QI (match_operand 2 "constant_call_address_operand"))
+ (mem:QI (match_operand 2))
(const_int 0)))
(unspec:P [(match_operand 1 "tls_symbolic_operand")]
UNSPEC_TLS_GD)])]
[(set_attr "type" "multi")
(set_attr "length" "12")])
+(define_insn "*tls_local_dynamic_base_64_largepic"
+ [(set (match_operand:DI 0 "register_operand" "=a")
+ (call:DI
+ (mem:QI (plus:DI (match_operand:DI 1 "register_operand" "b")
+ (match_operand:DI 2 "immediate_operand" "i")))
+ (match_operand 3)))
+ (unspec:DI [(const_int 0)] UNSPEC_TLS_LD_BASE)]
+ "TARGET_64BIT && ix86_cmodel == CM_LARGE_PIC && !TARGET_PECOFF
+ && GET_CODE (operands[2]) == CONST
+ && GET_CODE (XEXP (operands[2], 0)) == UNSPEC
+ && XINT (XEXP (operands[2], 0), 1) == UNSPEC_PLTOFF"
+{
+ output_asm_insn
+ ("lea{q}\t{%&@tlsld(%%rip), %%rdi|rdi, %&@tlsld[rip]}", operands);
+ output_asm_insn ("movabs{q}\t{%2, %%rax|rax, %2}", operands);
+ output_asm_insn ("add{q}\t{%1, %%rax|rax, %1}", operands);
+ return "call\t{*%%rax|rax}";
+}
+ [(set_attr "type" "multi")
+ (set_attr "length" "22")])
+
(define_expand "tls_local_dynamic_base_64_<mode>"
[(parallel
[(set (match_operand:P 0 "register_operand")
(call:P
- (mem:QI (match_operand 1 "constant_call_address_operand"))
+ (mem:QI (match_operand 1))
(const_int 0)))
(unspec:P [(const_int 0)] UNSPEC_TLS_LD_BASE)])]
"TARGET_64BIT")