#include "ansidecl.h"
#include "opcode/bfin.h"
#include "sim-main.h"
+#include "arch.h"
+#include "bfin-sim.h"
#include "dv-bfin_cec.h"
#include "dv-bfin_mmu.h"
typedef int64_t bs40;
typedef int64_t bs64;
+#include "machs.h"
+
/* For dealing with parallel instructions, we must avoid changing our register
file until all parallel insns have been simulated. This queue of stores
can be used to delay a modification.
#define BFIN_L1_CACHE_BYTES 32
+#define BFIN_CPU_STATE (*(struct bfin_cpu_state *) CPU_ARCH_DATA (cpu))
+#define STATE_BOARD_DATA(sd) ((struct bfin_board_data *) STATE_ARCH_DATA (sd))
+
+#include "dv-bfin_trace.h"
+
+#undef CLAMP
+#define CLAMP(a, b, c) min (max (a, b), c)
+
+/* TODO: Move all this trace logic to the common code. */
+#define BFIN_TRACE_CORE(cpu, addr, size, map, val) \
+ do { \
+ TRACE_CORE (cpu, "%cBUS %s %i bytes @ 0x%08x: 0x%0*x", \
+ map == exec_map ? 'I' : 'D', \
+ map == write_map ? "STORE" : "FETCH", \
+ size, addr, size * 2, val); \
+ PROFILE_COUNT_CORE (cpu, addr, size, map); \
+ } while (0)
+#define BFIN_TRACE_BRANCH(cpu, oldpc, newpc, hwloop, fmt, ...) \
+ do { \
+ TRACE_BRANCH (cpu, fmt " to %#x", ## __VA_ARGS__, newpc); \
+ if (STATE_ENVIRONMENT (CPU_STATE (cpu)) == OPERATING_ENVIRONMENT) \
+ bfin_trace_queue (cpu, oldpc, newpc, hwloop); \
+ } while (0)
+
+/* Default memory size. */
+#define BFIN_DEFAULT_MEM_SIZE (128 * 1024 * 1024)
+
#endif
#include "hw-device.h"
#include "hw-tree.h"
+#include "bfin-sim.h"
+
/* We keep the same inital structure layout with DMA enabled devices. */
struct dv_bfin {
bu32 base;
#include "defs.h"
#include "sim-main.h"
-#include "machs.h"
#include "devices.h"
#include "dv-bfin_pll.h"
#include "sim/callback.h"
#include "gdb/signals.h"
#include "sim-main.h"
+#include "sim-options.h"
#include "sim-syscall.h"
#include "sim-hw.h"
+#include "bfin-sim.h"
+
/* The numbers here do not matter. They just need to be unique. They also
need not be static across releases -- they're used internally only. The
mapping from the Linux ABI to the CB values is in linux-targ-map.h. */
#include "bfd.h"
#include "sim-hw.h"
+#include "sim-options.h"
+
#include "devices.h"
+#include "arch.h"
#include "dv-bfin_cec.h"
#include "dv-bfin_dmac.h"
#define _BFIN_MAIN_SIM_H_
#include "sim-basics.h"
-#include "arch.h"
#include "sim-base.h"
-#include "bfin-sim.h"
-
-#include "machs.h"
-
-#define BFIN_CPU_STATE (*(struct bfin_cpu_state *) CPU_ARCH_DATA (cpu))
-#define STATE_BOARD_DATA(sd) ((struct bfin_board_data *) STATE_ARCH_DATA (sd))
-
-#include "sim-config.h"
-#include "sim-types.h"
-#include "sim-engine.h"
-#include "sim-options.h"
-#include "dv-bfin_trace.h"
-
-#undef CLAMP
-#define CLAMP(a, b, c) min (max (a, b), c)
-
-/* TODO: Move all this trace logic to the common code. */
-#define BFIN_TRACE_CORE(cpu, addr, size, map, val) \
- do { \
- TRACE_CORE (cpu, "%cBUS %s %i bytes @ 0x%08x: 0x%0*x", \
- map == exec_map ? 'I' : 'D', \
- map == write_map ? "STORE" : "FETCH", \
- size, addr, size * 2, val); \
- PROFILE_COUNT_CORE (cpu, addr, size, map); \
- } while (0)
-#define BFIN_TRACE_BRANCH(cpu, oldpc, newpc, hwloop, fmt, ...) \
- do { \
- TRACE_BRANCH (cpu, fmt " to %#x", ## __VA_ARGS__, newpc); \
- if (STATE_ENVIRONMENT (CPU_STATE (cpu)) == OPERATING_ENVIRONMENT) \
- bfin_trace_queue (cpu, oldpc, newpc, hwloop); \
- } while (0)
-
-/* Default memory size. */
-#define BFIN_DEFAULT_MEM_SIZE (128 * 1024 * 1024)
-
#endif