Fix gcc2 irix5 c-torture failures, EH/large frame errors

Fix gcc2 irix5 c-torture failures, EH/large frame errors
	* mips/mips.c (save_restore_insns): If gp_offset or fp_offset are
	large_int, emit two insns instead of one splitable insn.
	* dwarf2out.c (dwarf2out_frame_debug): When set cfa_store_offset
	from cfa_temp_value, use cfa_offset.  Add assert checking that
	cfa_reg is SP.

From-SVN: r16573

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index eea0bf05b4cc64d273f1a4aae77dd84fa6244498..e35094a81f936f71c9e622711506eb0b6fef62d5 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+Tue Nov 18 15:39:59 1997  Jim Wilson  <wilson@cygnus.com>
+
+       * mips/mips.c (save_restore_insns): If gp_offset or fp_offset are
+       large_int, emit two insns instead of one splitable insn.
+       * dwarf2out.c (dwarf2out_frame_debug): When set cfa_store_offset
+       from cfa_temp_value, use cfa_offset.  Add assert checking that
+       cfa_reg is SP.
+
 Mon Nov 17 15:35:38 1997  Tom Tromey  <tromey@cygnus.com>
 
        * cccp.c (deps_output): Properly quote file names for make.

diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 2d6984b8737be9ef663e31b1829d10d35093ee4f..706a9bfe7bf3aa109874d970c7b3bbea0a96e97f 100644 (file)
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -5011,9 +5011,32 @@ save_restore_insns (store_p, large_reg, large_offset, file)
          base_offset  = gp_offset;
          if (file == (FILE *)0)
            {
-             insn = emit_move_insn (base_reg_rtx, GEN_INT (gp_offset));
-             if (store_p)
-               RTX_FRAME_RELATED_P (insn) = 1;
+             rtx gp_offset_rtx = GEN_INT (gp_offset);
+
+             /* Instruction splitting doesn't preserve the RTX_FRAME_RELATED_P
+                bit, so make sure that we don't emit anything that can be
+                split.  */
+             /* ??? There is no DImode ori immediate pattern, so we can only
+                do this for 32 bit code.  */
+             if (large_int (gp_offset_rtx)
+                 && GET_MODE (base_reg_rtx) == SImode)
+               {
+                 insn = emit_move_insn (base_reg_rtx,
+                                        GEN_INT (gp_offset & 0xffff0000));
+                 if (store_p)
+                   RTX_FRAME_RELATED_P (insn) = 1;
+                 insn = emit_insn (gen_iorsi3 (base_reg_rtx, base_reg_rtx,
+                                               GEN_INT (gp_offset & 0x0000ffff)));
+                 if (store_p)
+                   RTX_FRAME_RELATED_P (insn) = 1;
+               }
+             else
+               {
+                 insn = emit_move_insn (base_reg_rtx, gp_offset_rtx);
+                 if (store_p)
+                   RTX_FRAME_RELATED_P (insn) = 1;
+               }
+
              if (TARGET_LONG64)
                insn = emit_insn (gen_adddi3 (base_reg_rtx, base_reg_rtx, stack_pointer_rtx));
              else
@@ -5131,7 +5154,32 @@ save_restore_insns (store_p, large_reg, large_offset, file)
          base_offset  = fp_offset;
          if (file == (FILE *)0)
            {
-             insn = emit_move_insn (base_reg_rtx, GEN_INT (fp_offset));
+             rtx fp_offset_rtx = GEN_INT (fp_offset);
+
+             /* Instruction splitting doesn't preserve the RTX_FRAME_RELATED_P
+                bit, so make sure that we don't emit anything that can be
+                split.  */
+             /* ??? There is no DImode ori immediate pattern, so we can only
+                do this for 32 bit code.  */
+             if (large_int (fp_offset_rtx)
+                 && GET_MODE (base_reg_rtx) == SImode)
+               {
+                 insn = emit_move_insn (base_reg_rtx,
+                                        GEN_INT (fp_offset & 0xffff0000));
+                 if (store_p)
+                   RTX_FRAME_RELATED_P (insn) = 1;
+                 insn = emit_insn (gen_iorsi3 (base_reg_rtx, base_reg_rtx,
+                                               GEN_INT (fp_offset & 0x0000ffff)));
+                 if (store_p)
+                   RTX_FRAME_RELATED_P (insn) = 1;
+               }
+             else
+               {
+                 insn = emit_move_insn (base_reg_rtx, fp_offset_rtx);
+                 if (store_p)
+                   RTX_FRAME_RELATED_P (insn) = 1;
+               }
+
              if (store_p)
                RTX_FRAME_RELATED_P (insn) = 1;
              if (TARGET_LONG64)

diff --git a/gcc/dwarf2out.c b/gcc/dwarf2out.c
index dbb0049075d0f3abf9b759ce227add3c7e630503..db472755bb205d15d2dad7e6dafdd78d978181ee 100644 (file)
--- a/gcc/dwarf2out.c
+++ b/gcc/dwarf2out.c
@@ -1194,8 +1194,10 @@ dwarf2out_frame_debug (insn)
              if (GET_CODE (XEXP (src, 0)) != REG
                  || REGNO (XEXP (src, 0)) != cfa_temp_reg)
                abort ();
+             if (cfa_reg != STACK_POINTER_REGNUM)
+               abort ();
              cfa_store_reg = REGNO (dest);
-             cfa_store_offset -= cfa_temp_value;
+             cfa_store_offset = cfa_offset - cfa_temp_value;
            }
          break;