going until we reach the size of the line.
* Makefile.in: Add vec.o to OBJS-libcommon
+2014-01-23 Kirill Yukhin <kirill.yukhin@intel.com>
+ Ilya Tocar <ilya.tocar@intel.com>
+
+ * config/i386/avx512fintrin.h (_mm512_kmov): New.
+ * config/i386/i386.c (IX86_BUILTIN_KMOV16): Ditto.
+ (__builtin_ia32_kmov16): Ditto.
+ * config/i386/i386.md (UNSPEC_KMOV): New.
+ (kmovw): Ditto.
+
2014-01-23 Kirill Yukhin <kirill.yukhin@intel.com>
* config/i386/avx512fintrin.h (_mm512_loadu_si512): Rename.
M,_MM_FROUND_CUR_DIRECTION))
#endif
+extern __inline __mmask16
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_kmov (__mmask16 __A)
+{
+ return __builtin_ia32_kmov16 (__A);
+}
+
#ifdef __DISABLE_AVX512F__
#undef __DISABLE_AVX512F__
#pragma GCC pop_options
IX86_BUILTIN_KUNPCKBW,
IX86_BUILTIN_KXNOR16,
IX86_BUILTIN_KXOR16,
+ IX86_BUILTIN_KMOV16,
/* Alternate 4 and 8 element gather/scatter for the vectorizer
where all operands are 32-byte or 64-byte wide respectively. */
{ OPTION_MASK_ISA_AVX512F, CODE_FOR_kunpckhi, "__builtin_ia32_kunpckhi", IX86_BUILTIN_KUNPCKBW, UNKNOWN, (int) HI_FTYPE_HI_HI },
{ OPTION_MASK_ISA_AVX512F, CODE_FOR_kxnorhi, "__builtin_ia32_kxnorhi", IX86_BUILTIN_KXNOR16, UNKNOWN, (int) HI_FTYPE_HI_HI },
{ OPTION_MASK_ISA_AVX512F, CODE_FOR_xorhi3, "__builtin_ia32_kxorhi", IX86_BUILTIN_KXOR16, UNKNOWN, (int) HI_FTYPE_HI_HI },
+ { OPTION_MASK_ISA_AVX512F, CODE_FOR_kmovw, "__builtin_ia32_kmov16", IX86_BUILTIN_KMOV16, UNKNOWN, (int) HI_FTYPE_HI },
/* SHA */
{ OPTION_MASK_ISA_SSE2, CODE_FOR_sha1msg1, 0, IX86_BUILTIN_SHA1MSG1, UNKNOWN, (int) V4SI_FTYPE_V4SI_V4SI },
;; For BMI2 support
UNSPEC_PDEP
UNSPEC_PEXT
+
+ ;; For AVX512F support
+ UNSPEC_KMOV
])
(define_c_enum "unspecv" [
]
(const_string "SI")))])
+(define_insn "kmovw"
+ [(set (match_operand:HI 0 "nonimmediate_operand" "=k,k")
+ (unspec:HI
+ [(match_operand:HI 1 "nonimmediate_operand" "rm,k")]
+ UNSPEC_KMOV))]
+ "!(MEM_P (operands[0]) && MEM_P (operands[1])) && TARGET_AVX512F"
+ "@
+ kmovw\t{%k1, %0|%0, %k1}
+ kmovw\t{%1, %0|%0, %1}";
+ [(set_attr "mode" "HI")
+ (set_attr "type" "mskmov")
+ (set_attr "prefix" "vex")])
+
+
(define_insn "*movhi_internal"
[(set (match_operand:HI 0 "nonimmediate_operand" "=r,r ,r ,m ,Yk,Yk,rm")
(match_operand:HI 1 "general_operand" "r ,rn,rm,rn,rm,Yk,Yk"))]
* c-c++-common/cpp/warning-zero-in-literals-1.c: New test file.
2014-01-23 Kirill Yukhin <kirill.yukhin@intel.com>
+ Ilya Tocar <ilya.tocar@intel.com>
- * gcc.target/i386/avx512f-vmovdqu32-1.c: Fix intrinsic name.
+ * gcc.target/i386/avx512f-kmovw-1.c: New.
+
+2014-01-23 Kirill Yukhin <kirill.yukhin@intel.com>
+
+ * gcc.target/i386/avx512f-vmovdqu32-1.c: Fix intrinsic name.
* gcc.target/i386/avx512f-vmovdqu32-2.c: Ditto.
* gcc.target/i386/avx512f-vpcmpd-2.c: Ditto.
* gcc.target/i386/avx512f-vpcmpq-2.c: Ditto.
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-mavx512f -O2" } */
+/* { dg-final { scan-assembler "kmovw\[ \\t\]+\[^\n\]*%k\[1-7\]" } } */
+
+#include <immintrin.h>
+volatile __mmask16 k1;
+
+void
+avx512f_test ()
+{
+ k1 = _mm512_kmov (11);
+}