re PR middle-end/91166 ([SVE] Unfolded ZIPs of constants)

2019-07-24  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

	PR middle-end/91166
	* match.pd (vec_perm_expr(v, v, mask) -> v): New pattern.
	(define_predicates): Add entry for uniform_vector_p.
	(vec_same_elem_p): New match pattern.

testsuite/
	* gcc.target/aarch64/sve/pr91166.c: New test.

From-SVN: r273758

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 43d1526e3ffbda09b1cd83dd33cceb25cee90773..7bb56a48e38027afea88f451da063aa928e72d2d 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2019-07-24  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
+
+       PR middle-end/91166
+       * match.pd (vec_perm_expr(v, v, mask) -> v): New pattern.
+       (define_predicates): Add entry for uniform_vector_p.
+       (vec_same_elem_p): New match pattern.
+
 2019-07-24  Iain Sandoe  <iain@sandoe.co.uk>
 
        PR bootstrap/87030

diff --git a/gcc/match.pd b/gcc/match.pd
index 4a7aa0185d8f97e142c26b7ca5c03c05f7b3e280..c5c6a041cfce8a0b24e0cfc63a28a8f9792f31c2 100644 (file)
--- a/gcc/match.pd
+++ b/gcc/match.pd
@@ -36,7 +36,8 @@ along with GCC; see the file COPYING3.  If not see
    integer_valued_real_p
    integer_pow2p
    uniform_integer_cst_p
-   HONOR_NANS)
+   HONOR_NANS
+   uniform_vector_p)
 
 /* Operator lists.  */
 (define_operator_list tcc_comparison
@@ -5568,3 +5569,16 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
          { bitsize_int (at * tree_to_uhwi (TYPE_SIZE (TREE_TYPE (type)))); })
        (if (changed)
         (vec_perm { op0; } { op1; } { op2; }))))))))))
+
+/* VEC_PERM_EXPR (v, v, mask) -> v where v contains same element.  */
+
+(match vec_same_elem_p
+ @0
+ (if (uniform_vector_p (@0))))
+
+(match vec_same_elem_p
+ (vec_duplicate @0))
+
+(simplify
+ (vec_perm vec_same_elem_p@0 @0 @1)
+ @0)

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 75da21ff53ba4b839d7c0b0ac05307485eb60875..369634e8b4a67daf4d98a6ccf59349d88529b216 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2019-07-24  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
+
+       PR middle-end/91166
+       * gcc.target/aarch64/sve/pr91166.c: New test.
+
 2019-07-23  Steven G. Kargl  <kargl@gcc.gnu.org>
 
        PR fortran/54072

diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pr91166.c b/gcc/testsuite/gcc.target/aarch64/sve/pr91166.c
new file mode 100644 (file)
index 0000000..42654be
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pr91166.c
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -march=armv8.2-a+sve -fdump-tree-optimized" } */
+
+void
+f1 (double x[][4]) 
+{
+  for (int i = 0; i < 4; ++i)
+    for (int j = 0; j < 4; ++j)
+      x[i][j] = 0;
+}
+
+void
+f2 (double x[][4], double y)
+{
+  for (int i = 0; i < 4; ++i)
+    for (int j = 0; j < 4; ++j)
+      x[i][j] = y;
+}
+
+/* { dg-final { scan-tree-dump-not "VEC_PERM_EXPR" "optimized"} } */