rs6000.c (expand_block_clear): Add TARGET_SPE cases to set eight bytes at a time.

gcc/
	* config/rs6000/rs6000.c (expand_block_clear): Add TARGET_SPE
	cases to set eight bytes at a time.
	(expand_block_move): Likewise.

gcc/testsuite/
	* gcc.target/powerpc/spe-vector-memset.c: New testcase.
	* gcc.target/powerpc/spe-vector-memcpy.c: New testcase.

From-SVN: r127670

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 82b7685d5cd8f4e2890c16a0f9e3e7d7d3b5c804..6cbda5f9d59fc48818bbf14018d9c284b26f495c 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2007-08-21  Nathan Froyd  <froydnj@codesourcery.com>
+
+       * config/rs6000/rs6000.c (expand_block_clear): Add TARGET_SPE
+       cases to set eight bytes at a time.
+       (expand_block_move): Likewise.
+       
 2007-08-21  Jakub Jelinek  <jakub@redhat.com>
 
        PR debug/32610

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 5354e525200b7d92342cbe704f1c712549058853..44e492854c52cb9d6a9d9521dafacbdf01bfb27d 100644 (file)
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -9852,6 +9852,8 @@ expand_block_clear (rtx operands[])
     clear_step = 16;
   else if (TARGET_POWERPC64 && align >= 32)
     clear_step = 8;
+  else if (TARGET_SPE && align >= 64)
+    clear_step = 8;
   else
     clear_step = 4;
 
@@ -9870,10 +9872,15 @@ expand_block_clear (rtx operands[])
          clear_bytes = 16;
          mode = V4SImode;
        }
+      else if (bytes >= 8 && TARGET_SPE && align >= 64)
+        {
+          clear_bytes = 8;
+          mode = V2SImode;
+        }
       else if (bytes >= 8 && TARGET_POWERPC64
-         /* 64-bit loads and stores require word-aligned
-            displacements.  */
-         && (align >= 64 || (!STRICT_ALIGNMENT && align >= 32)))
+              /* 64-bit loads and stores require word-aligned
+                 displacements.  */
+              && (align >= 64 || (!STRICT_ALIGNMENT && align >= 32)))
        {
          clear_bytes = 8;
          mode = DImode;
@@ -9963,6 +9970,12 @@ expand_block_move (rtx operands[])
          mode = V4SImode;
          gen_func.mov = gen_movv4si;
        }
+      else if (TARGET_SPE && bytes >= 8 && align >= 64)
+        {
+          move_bytes = 8;
+          mode = V2SImode;
+          gen_func.mov = gen_movv2si;
+        }
       else if (TARGET_STRING
          && bytes > 24         /* move up to 32 bytes at a time */
          && ! fixed_regs[5]

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 002f82420853ef96633e5507dbbcd87234536e21..9800a7f742def7f51f2586721194e29c69676345 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2007-08-21  Nathan Froyd  <froydnj@codesourcery.com>
+
+       * gcc.target/powerpc/spe-vector-memset.c: New testcase.
+       * gcc.target/powerpc/spe-vector-memcpy.c: New testcase.
+
 2007-08-21  Jakub Jelinek  <jakub@redhat.com>
 
        PR debug/32610

diff --git a/gcc/testsuite/gcc.target/powerpc/spe-vector-memcpy.c b/gcc/testsuite/gcc.target/powerpc/spe-vector-memcpy.c
new file mode 100644 (file)
index 0000000..d12f669
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/spe-vector-memcpy.c
@@ -0,0 +1,10 @@
+/* { dg-do compile { target powerpc*-*-* } } */
+/* { dg-require-effective-target powerpc_spe } */
+/* { dg-options "-O -mspe=yes" } */
+/* { dg-final { scan-assembler "evstdd" } } */
+
+void foo(void)
+{
+  int x[8] __attribute__((aligned(64))) = { 1, 1, 1, 1, 1, 1, 1, 1 };
+  bar (x);
+}

diff --git a/gcc/testsuite/gcc.target/powerpc/spe-vector-memset.c b/gcc/testsuite/gcc.target/powerpc/spe-vector-memset.c
new file mode 100644 (file)
index 0000000..7ecaf10
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/spe-vector-memset.c
@@ -0,0 +1,13 @@
+/* { dg-do compile { target powerpc*-*-* } } */
+/* { dg-require-effective-target powerpc_spe } */
+/* { dg-options "-O -mspe=yes" } */
+/* { dg-final { scan-assembler "evstdd" } } */
+
+#include <string.h>
+
+void foo(void)
+{
+  int x[8] __attribute__((aligned(64)));
+  memset (x, 0, sizeof (x));
+  bar (x);
+}