submit.shader_record_len = vc4->shader_rec.next - vc4->shader_rec.base;
submit.shader_record_count = vc4->shader_rec_count;
+ if (!(vc4_debug & VC4_DEBUG_NORAST)) {
#ifndef USE_VC4_SIMULATOR
- int ret = drmIoctl(vc4->fd, DRM_IOCTL_VC4_SUBMIT_CL, &submit);
- if (ret)
- errx(1, "VC4 submit failed\n");
+ int ret = drmIoctl(vc4->fd, DRM_IOCTL_VC4_SUBMIT_CL, &submit);
+ if (ret)
+ errx(1, "VC4 submit failed\n");
#else
- vc4_simulator_flush(vc4, csurf);
+ vc4_simulator_flush(vc4, csurf);
#endif
+ }
+
vc4_reset_cl(&vc4->bcl);
vc4_reset_cl(&vc4->rcl);
vc4_reset_cl(&vc4->shader_rec);
struct vc4_screen *screen = vc4_screen(pscreen);
struct vc4_context *vc4;
+ /* Prevent dumping of the shaders built during context setup. */
+ uint32_t saved_shaderdb_flag = vc4_debug & VC4_DEBUG_SHADERDB;
+ vc4_debug &= ~VC4_DEBUG_SHADERDB;
+
vc4 = CALLOC_STRUCT(vc4_context);
if (vc4 == NULL)
return NULL;
if (!vc4->primconvert)
goto fail;
+ vc4_debug |= saved_shaderdb_flag;
+
return &vc4->base;
fail:
if (tgsi_op == TGSI_OPCODE_END)
return;
- tgsi_dump_instruction(tgsi_inst, asdf++);
-
if (tgsi_op > ARRAY_SIZE(op_trans) || !op_trans[tgsi_op].func) {
fprintf(stderr, "unknown tgsi inst: ");
tgsi_dump_instruction(tgsi_inst, asdf++);
{
/* XXX: lols */
for (int i = 0; i < 4; i++) {
- trans->inputs[i] = qir_uniform_ui(trans, fui(i / 4.0));
+ trans->inputs[i] = qir_uniform_ui(trans, fui(1.0));
}
}
ret = tgsi_parse_init(&trans->parser, so->base.tokens);
assert(ret == TGSI_PARSE_OK);
- fprintf(stderr, "TGSI:\n");
- tgsi_dump(so->base.tokens, 0);
+ if (vc4_debug & VC4_DEBUG_TGSI) {
+ fprintf(stderr, "TGSI:\n");
+ tgsi_dump(so->base.tokens, 0);
+ }
switch (stage) {
case QSTAGE_FRAG:
break;
}
- qir_dump(c);
+ if (vc4_debug & VC4_DEBUG_QIR) {
+ fprintf(stderr, "QIR:\n");
+ qir_dump(c);
+ }
tgsi_parse_free(&trans->parser);
free(trans->temps);
vc4_generate_code(c);
+ if (vc4_debug & VC4_DEBUG_SHADERDB) {
+ fprintf(stderr, "SHADER-DB: %s: %d instructions\n",
+ qir_get_stage_name(c->stage), c->num_qpu_insts);
+ fprintf(stderr, "SHADER-DB: %s: %d uniforms\n",
+ qir_get_stage_name(c->stage), trans->num_uniforms);
+ }
+
return trans;
}
map[i] = fui(vc4->framebuffer.height * -16.0f / 2.0f);
break;
}
-#if 1
+#if 0
fprintf(stderr, "%p/%d: %d: 0x%08x (%f)\n",
shader, shader_index, i, map[i], uif(map[i]));
#endif
c->qpu_insts = insts;
c->num_qpu_insts = ni;
- vc4_dump_program(c);
+ if (vc4_debug & VC4_DEBUG_QPU)
+ vc4_dump_program(c);
+
vc4_qpu_validate(insts, ni);
}
#include "vc4_resource.h"
static const struct debug_named_value debug_options[] = {
- {"cl", VC4_DBG_CL, "Dump command list during creation"},
+ { "cl", VC4_DEBUG_CL,
+ "Dump command list during creation" },
+ { "qpu", VC4_DEBUG_QPU,
+ "Dump generated QPU instructions" },
+ { "qir", VC4_DEBUG_QIR,
+ "Dump QPU IR during program compile" },
+ { "tgsi", VC4_DEBUG_TGSI,
+ "Dump TGSI during program compile" },
+ { "shaderdb", VC4_DEBUG_SHADERDB,
+ "Dump program compile information for shader-db analysis" },
+ { "perf", VC4_DEBUG_PERF,
+ "Print during performance-related events" },
+ { "norast", VC4_DEBUG_NORAST,
+ "Skip actual hardware execution of commands" },
};
+DEBUG_GET_ONCE_FLAGS_OPTION(vc4_debug, "VC4_DEBUG", debug_options, 0)
+uint32_t vc4_debug;
+
static const char *
vc4_screen_get_name(struct pipe_screen *pscreen)
{
screen->fd = fd;
+ vc4_debug = debug_get_option_vc4_debug();
+ if (vc4_debug & VC4_DEBUG_SHADERDB)
+ vc4_debug |= VC4_DEBUG_NORAST;
+
#if USE_VC4_SIMULATOR
vc4_simulator_init(screen);
#endif
struct vc4_bo;
-#define VC4_DBG_CL 0x0001
+#define VC4_DEBUG_CL 0x0001
+#define VC4_DEBUG_QPU 0x0002
+#define VC4_DEBUG_QIR 0x0004
+#define VC4_DEBUG_TGSI 0x0008
+#define VC4_DEBUG_SHADERDB 0x0010
+#define VC4_DEBUG_PERF 0x0020
+#define VC4_DEBUG_NORAST 0x0040
#define VC4_MAX_MIP_LEVELS 11
uint8_t vc4_get_texture_format(enum pipe_format format);
+extern uint32_t vc4_debug;
+
#endif /* VC4_SCREEN_H */