aarch64: Fix -mtrack-speculation for irreversible conditions [PR93341]

We can't yet represent the inverse of all conditions in rtl
(see g:865257c447cc50f5819e), triggering an ICE in the pass
that handles -mtrack-speculation.  Since we don't expect these
insns to be optimised in any way, the easiest fix seemed to be
to add an insn that reverses the condition internally.

2020-01-23  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	PR target/93341
	* config/aarch64/aarch64.md (UNSPEC_SPECULATION_TRACKER_REV): New
	unspec.
	(speculation_tracker_rev): New pattern.
	* config/aarch64/aarch64-speculation.cc (aarch64_do_track_speculation):
	Use speculation_tracker_rev to track the inverse condition.

gcc/testsuite/
	PR target/93341
	* gcc.target/aarch64/pr93341.c: New test.

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index cf8e21201cb3a725f35e089ee18e9fbfe19880ca..ac8b18f1a8490515ed553906145b6f58931c5822 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2020-01-23  Richard Sandiford  <richard.sandiford@arm.com>
+
+       PR target/93341
+       * config/aarch64/aarch64.md (UNSPEC_SPECULATION_TRACKER_REV): New
+       unspec.
+       (speculation_tracker_rev): New pattern.
+       * config/aarch64/aarch64-speculation.cc (aarch64_do_track_speculation):
+       Use speculation_tracker_rev to track the inverse condition.
+
 2020-01-23  Richard Biener  <rguenther@suse.de>
 
        PR tree-optimization/93381

diff --git a/gcc/config/aarch64/aarch64-speculation.cc b/gcc/config/aarch64/aarch64-speculation.cc
index 98dcc11fb75e485580d57a109942586a360bfdae..f490b64ae61b88dd077abe18d89616e9712a4152 100644 (file)
--- a/gcc/config/aarch64/aarch64-speculation.cc
+++ b/gcc/config/aarch64/aarch64-speculation.cc
@@ -215,20 +215,13 @@ aarch64_do_track_speculation ()
                          && REG_P (XEXP (cond, 0))
                          && REGNO (XEXP (cond, 0)) == CC_REGNUM
                          && XEXP (cond, 1) == const0_rtx);
-             enum rtx_code inv_cond_code
-               = reversed_comparison_code (cond, insn);
-             /* We should be able to reverse all conditions.  */
-             gcc_assert (inv_cond_code != UNKNOWN);
-             rtx inv_cond = gen_rtx_fmt_ee (inv_cond_code, GET_MODE (cond),
-                                            copy_rtx (XEXP (cond, 0)),
-                                            copy_rtx (XEXP (cond, 1)));
+             rtx branch_tracker = gen_speculation_tracker (copy_rtx (cond));
+             rtx fallthru_tracker = gen_speculation_tracker_rev (cond);
              if (inverted)
-               std::swap (cond, inv_cond);
+               std::swap (branch_tracker, fallthru_tracker);
 
-             insert_insn_on_edge (gen_speculation_tracker (cond),
-                                  BRANCH_EDGE (bb));
-             insert_insn_on_edge (gen_speculation_tracker (inv_cond),
-                                  FALLTHRU_EDGE (bb));
+             insert_insn_on_edge (branch_tracker, BRANCH_EDGE (bb));
+             insert_insn_on_edge (fallthru_tracker, FALLTHRU_EDGE (bb));
              needs_tracking = true;
            }
          else if (GET_CODE (PATTERN (insn)) == RETURN)

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 55dde54b16a5ce8292a6ed86058102732cad522f..4f5898185f52d0169ac08b9eb676db4c28da6c2b 100644 (file)
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -262,6 +262,7 @@
     UNSPEC_REV_SUBREG
     UNSPEC_REINTERPRET
     UNSPEC_SPECULATION_TRACKER
+    UNSPEC_SPECULATION_TRACKER_REV
     UNSPEC_COPYSIGN
     UNSPEC_TTEST               ; Represent transaction test.
     UNSPEC_UPDATE_FFR
@@ -7219,6 +7220,20 @@
   [(set_attr "type" "csel")]
 )
 
+;; Like speculation_tracker, but track the inverse condition.
+(define_insn "speculation_tracker_rev"
+  [(set (reg:DI SPECULATION_TRACKER_REGNUM)
+       (unspec:DI [(reg:DI SPECULATION_TRACKER_REGNUM) (match_operand 0)]
+        UNSPEC_SPECULATION_TRACKER_REV))]
+  ""
+  {
+    operands[1] = gen_rtx_REG (DImode, SPECULATION_TRACKER_REGNUM);
+    output_asm_insn ("csel\\t%1, %1, xzr, %M0", operands);
+    return "";
+  }
+  [(set_attr "type" "csel")]
+)
+
 ;; BTI <target> instructions
 (define_insn "bti_noarg"
   [(unspec_volatile [(const_int 0)] UNSPECV_BTI_NOARG)]

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 8ad220e6941d0010a941b86e45fc5949fb0d9a9b..7a03ebbaef82b48ca6b0a38c10046ef0e1667cbb 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2020-01-23  Richard Sandiford  <richard.sandiford@arm.com>
+
+       PR target/93341
+       * gcc.target/aarch64/pr93341.c: New test.
+
 2020-01-23  David Malcolm  <dmalcolm@redhat.com>
 
        * gcc.dg/analyzer/data-model-3.c: Remove hardcoded "-O2" and move

diff --git a/gcc/testsuite/gcc.target/aarch64/pr93341.c b/gcc/testsuite/gcc.target/aarch64/pr93341.c
new file mode 100644 (file)
index 0000000..1efebee
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr93341.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-mtrack-speculation" } */
+
+int synths_ ( float * rc)
+{
+  float r1, r2;
+  int i;
+  for (i = 0; i < 128; ++i)
+    {
+      r2 = rc[i];
+      r1 = ((r2) <= (.99f) ? (r2) : (.99f));
+      rc[i] = ((r1) >= (-.99f) ? (r1) : (-.99f));
+    }
+}