[RS6000] power10 scan-assembler tests

On power10 these are "dg-do run" tests, so need -save-temps for the
assembler scanning.

	* gcc.target/powerpc/vsx-load-element-extend-char.c: Add -save-temps.
	* gcc.target/powerpc/vsx-load-element-extend-int.c: Likewise.
	* gcc.target/powerpc/vsx-load-element-extend-longlong.c: Likewise.
	* gcc.target/powerpc/vsx-load-element-extend-short.c: Likewise.
	* gcc.target/powerpc/vsx-store-element-truncate-char.c: Likewise.
	* gcc.target/powerpc/vsx-store-element-truncate-int.c: Likewise.
	* gcc.target/powerpc/vsx-store-element-truncate-longlong.c: Likewise.
	* gcc.target/powerpc/vsx-store-element-truncate-short.c: Likewise.

diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-char.c b/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-char.c
index 58986d636e4ce907a47565aad9f10e5ebb920c91..f386346e059eaa477c27721d02c34fda54e0ce5e 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-char.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-char.c
@@ -5,7 +5,7 @@
 /* { dg-do compile {target power10_ok} } */
 /* { dg-do run {target power10_hw} } */
 /* { dg-require-effective-target int128 } */
-/* { dg-options "-mdejagnu-cpu=power10 -O3" } */
+/* { dg-options "-mdejagnu-cpu=power10 -O3 -save-temps" } */
 
 /* At the time of writing, the number of lxvrbx instructions is
    double what we expect because we are generating a 

diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-int.c b/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-int.c
index 366a01370044990b034d83c323dc0bbf5658d87b..ea737466a58ea34dc438eb662d451f1b4dac894a 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-int.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-int.c
@@ -10,7 +10,7 @@
    the lxvr*x instruction is generated. At higher optimization levels
    the instruction we are looking for is sometimes replaced by other
    load instructions. */
-/* { dg-options "-mdejagnu-cpu=power10 -O0" } */
+/* { dg-options "-mdejagnu-cpu=power10 -O0 -save-temps" } */
 
 /* { dg-final { scan-assembler-times {\mlxvrwx\M} 2 } } */
 

diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-longlong.c b/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-longlong.c
index 8dfbc79a33d7fc2f1c879635584ceda2ac48282f..cd155c2013dc316e0761ae3fb980ada9fcce9de2 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-longlong.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-longlong.c
@@ -5,7 +5,7 @@
 /* { dg-do compile {target power10_ok} } */
 /* { dg-do run {target power10_hw} } */
 /* { dg-require-effective-target int128 } */
-/* { dg-options "-mdejagnu-cpu=power10 -O3" } */
+/* { dg-options "-mdejagnu-cpu=power10 -O3 -save-temps" } */
 
 /* At time of writing, we also geenerate a .constrprop copy
    of the function, so our instruction hit count is

diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-short.c b/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-short.c
index 87e263c864de7a3dc619f86bbdf60ca0d4beb365..68fdcdcea373dcb39e7c90401bb705dbb576bec1 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-short.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-load-element-extend-short.c
@@ -10,7 +10,7 @@
    the lxvr*x instruction is generated. At higher optimization levels
    the instruction we are looking for is sometimes replaced by other
    load instructions.  */
-/* { dg-options "-mdejagnu-cpu=power10 -O0" } */
+/* { dg-options "-mdejagnu-cpu=power10 -O0 -save-temps" } */
 
 /* { dg-final { scan-assembler-times {\mlxvrhx\M} 2 } } */
 

diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-char.c b/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-char.c
index b69a1f3e291a2038e12c712eff7b54f0c94f2bd4..45c49547d664357cb71ea0d88cd9c4e83ae20a13 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-char.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-char.c
@@ -8,7 +8,7 @@
    the stxvr*x instruction is generated. At higher optimization levels
    the instruction we are looking for is sometimes replaced by other
    store instructions.  */
-/* { dg-options "-mdejagnu-cpu=power10 -O0" } */
+/* { dg-options "-mdejagnu-cpu=power10 -O0 -save-temps" } */
 
 /* { dg-final { scan-assembler-times {\mstxvrbx\M} 2 } } */
 /* { dg-final { scan-assembler-times {\mstbx\M} 0 } } */

diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-int.c b/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-int.c
index 76e09fde0683bb692985d1b462077bb4379cb8dd..f263e3d5cc94132eb823174a47f5ba27a89a1e72 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-int.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-int.c
@@ -8,7 +8,7 @@
    the stxvr*x instruction is generated. At higher optimization levels
    the instruction we are looking for is sometimes replaced by other
    store instructions.  */
-/* { dg-options "-mdejagnu-cpu=power10 -O0" } */
+/* { dg-options "-mdejagnu-cpu=power10 -O0 -save-temps" } */
  
 /* { dg-final { scan-assembler-times {\mstxvrwx\M} 2 } } */
 /* { dg-final { scan-assembler-times {\mstwx\M} 0 } } */

diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-longlong.c b/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-longlong.c
index c137ce2d19f680da18aea184c31c45de94df40bf..0eeef5e6ba9e5f6bb20b3fd8fc789bd3df0dcb5e 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-longlong.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-longlong.c
@@ -9,7 +9,7 @@
    the stxvr*x instruction is generated. At higher optimization levels
    the instruction we are looking for is sometimes replaced by other
    store instructions. */
-/* { dg-options "-mdejagnu-cpu=power10 -O0" } */
+/* { dg-options "-mdejagnu-cpu=power10 -O0 -save-temps" } */
 
 /* { dg-final { scan-assembler-times {\mstxvrdx\M} 2 } } */
 /* { dg-final { scan-assembler-times {\mstwx\M} 0 } } */

diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-short.c b/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-short.c
index 7d856e7c3eb278e2c99ef0bb09e50a6a516c5df6..0186ddc552f0d58671cc27f82a27019fa99618a2 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-short.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-store-element-truncate-short.c
@@ -9,7 +9,7 @@
    the stxvr*x instruction is generated. At higher optimization levels
    the instruction we are looking for is sometimes replaced by other
    store instructions.  */
-/* { dg-options "-mdejagnu-cpu=power10 -O0" } */
+/* { dg-options "-mdejagnu-cpu=power10 -O0 -save-temps" } */
 
 /* { dg-final { scan-assembler-times {\mstxvrhx\M} 2 } } */
 /* { dg-final { scan-assembler-times {\msthx\M} 0 } } */