uint32_t surface_count[VK_NUM_SHADER_STAGE] = { 0, };
uint32_t num_dynamic_buffers = 0;
uint32_t count = 0;
+ uint32_t stages = 0;
uint32_t s;
for (uint32_t i = 0; i < pCreateInfo->count; i++) {
break;
}
+ stages |= pCreateInfo->pBinding[i].stageFlags;
count += pCreateInfo->pBinding[i].count;
}
set_layout->num_dynamic_buffers = num_dynamic_buffers;
set_layout->count = count;
+ set_layout->shader_stages = stages;
struct anv_descriptor_slot *p = set_layout->entries;
struct anv_descriptor_slot *sampler[VK_NUM_SHADER_STAGE];
cmd_buffer->dirty = 0;
cmd_buffer->vb_dirty = 0;
+ cmd_buffer->descriptors_dirty = 0;
cmd_buffer->pipeline = NULL;
cmd_buffer->vp_state = NULL;
cmd_buffer->rs_state = NULL;
pDynamicOffsets + dynamic_slot,
set_layout->num_dynamic_buffers * sizeof(*pDynamicOffsets));
+ cmd_buffer->descriptors_dirty |= set_layout->shader_stages;
+
dynamic_slot += set_layout->num_dynamic_buffers;
}
-
- cmd_buffer->dirty |= ANV_CMD_BUFFER_DESCRIPTOR_SET_DIRTY;
}
void anv_CmdBindIndexBuffer(
static void
flush_descriptor_sets(struct anv_cmd_buffer *cmd_buffer)
{
+ uint32_t s, dirty = cmd_buffer->descriptors_dirty &
+ cmd_buffer->pipeline->active_stages;
+
VkResult result;
- for (uint32_t s = 0; s < VK_NUM_SHADER_STAGE; s++) {
+ for_each_bit(s, dirty) {
result = cmd_buffer_emit_binding_table(cmd_buffer, s);
if (result != VK_SUCCESS)
break;
result = anv_cmd_buffer_new_surface_state_bo(cmd_buffer);
assert(result == VK_SUCCESS);
- for (uint32_t s = 0; s < VK_NUM_SHADER_STAGE; s++) {
+ /* Re-emit all active binding tables */
+ for_each_bit(s, cmd_buffer->pipeline->active_stages) {
result = cmd_buffer_emit_binding_table(cmd_buffer, s);
result = cmd_buffer_emit_samplers(cmd_buffer, s);
}
assert(result == VK_SUCCESS);
}
- cmd_buffer->dirty &= ~ANV_CMD_BUFFER_DESCRIPTOR_SET_DIRTY;
+ cmd_buffer->descriptors_dirty &= ~cmd_buffer->pipeline->active_stages;
}
static struct anv_state
if (cmd_buffer->dirty & ANV_CMD_BUFFER_PIPELINE_DIRTY)
anv_batch_emit_batch(&cmd_buffer->batch, &pipeline->batch);
- if (cmd_buffer->dirty & ANV_CMD_BUFFER_DESCRIPTOR_SET_DIRTY)
+ if (cmd_buffer->descriptors_dirty)
flush_descriptor_sets(cmd_buffer);
if (cmd_buffer->dirty & (ANV_CMD_BUFFER_PIPELINE_DIRTY | ANV_CMD_BUFFER_RS_DIRTY)) {
cmd_buffer->framebuffer = framebuffer;
- cmd_buffer->dirty |= ANV_CMD_BUFFER_DESCRIPTOR_SET_DIRTY;
+ cmd_buffer->descriptors_dirty |= VK_SHADER_STAGE_FRAGMENT_BIT;
anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_DRAWING_RECTANGLE,
.ClippedDrawingRectangleYMin = pass->render_area.offset.y,
uint32_t count;
uint32_t num_dynamic_buffers;
+ uint32_t shader_stages;
struct anv_descriptor_slot entries[0];
};
};
#define ANV_CMD_BUFFER_PIPELINE_DIRTY (1 << 0)
-#define ANV_CMD_BUFFER_DESCRIPTOR_SET_DIRTY (1 << 1)
#define ANV_CMD_BUFFER_RS_DIRTY (1 << 2)
#define ANV_CMD_BUFFER_DS_DIRTY (1 << 3)
#define ANV_CMD_BUFFER_CB_DIRTY (1 << 4)
/* State required while building cmd buffer */
uint32_t vb_dirty;
uint32_t dirty;
+ uint32_t descriptors_dirty;
struct anv_pipeline * pipeline;
struct anv_framebuffer * framebuffer;
struct anv_dynamic_rs_state * rs_state;