+2019-01-18 Segher Boessenkool <segher@kernel.crashing.org>
+
+ PR target/88892
+ * config/rs6000/rs6000.md (*movsi_from_df): Allow only register
+ operands.
+
2019-01-18 Richard Biener <rguenther@suse.de>
PR tree-optimization/88903
8, 4")])
;; Like movsi_from_sf, but combine a convert from DFmode to SFmode before
-;; moving it to SImode. We can do a SFmode store without having to do the
-;; conversion explicitly. If we are doing a register->register conversion, use
-;; XSCVDPSP instead of XSCVDPSPN, since the former handles cases where the
-;; input will not fit in a SFmode, and the later assumes the value has already
-;; been rounded.
+;; moving it to SImode. We cannot do a SFmode store without having to do the
+;; conversion explicitly since that doesn't work in most cases if the input
+;; isn't representable as SF. Use XSCVDPSP instead of XSCVDPSPN, since the
+;; former handles cases where the input will not fit in a SFmode, and the
+;; latter assumes the value has already been rounded.
(define_insn "*movsi_from_df"
- [(set (match_operand:SI 0 "nonimmediate_operand" "=wa,m,wY,Z")
+ [(set (match_operand:SI 0 "gpc_reg_operand" "=wa")
(unspec:SI [(float_truncate:SF
- (match_operand:DF 1 "gpc_reg_operand" "wa, f,wb,wa"))]
+ (match_operand:DF 1 "gpc_reg_operand" "wa"))]
UNSPEC_SI_FROM_SF))]
-
"TARGET_NO_SF_SUBREG"
- "@
- xscvdpsp %x0,%x1
- stfs%U0%X0 %1,%0
- stxssp %1,%0
- stxsspx %x1,%y0"
- [(set_attr "type" "fp,fpstore,fpstore,fpstore")])
+ "xscvdpsp %x0,%x1"
+ [(set_attr "type" "fp")])
;; Split a load of a large constant into the appropriate two-insn
;; sequence.