[ARM] Add -mbranch-cost option, and update a few tests
authorChristophe Lyon <christophe.lyon@linaro.org>
Wed, 10 Jan 2018 15:34:33 +0000 (15:34 +0000)
committerChristophe Lyon <clyon@gcc.gnu.org>
Wed, 10 Jan 2018 15:34:33 +0000 (16:34 +0100)
2018-01-10  Christophe Lyon  <christophe.lyon@linaro.org>

gcc/
* config/arm/arm.opt (-mbranch-cost): New option.
* config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
account.

gcc/testsuite/
* lib/target-supports.exp (check_effective_target_branch_cost):
New function.
* gcc.dg/builtin-bswap-7.c: Use branch_cost effective target.
* gcc.dg/pr21643.c: Likewise.
* gcc.dg/pr46309.c: Likewise.
* gcc.dg/tree-ssa/phi-opt-11.c: Likewise.
* gcc.dg/tree-ssa/phi-opt-2.c: Likewise.
* gcc.dg/tree-ssa/reassoc-32.c: Likewise.
* gcc.dg/tree-ssa/reassoc-33.c: Likewise.
* gcc.dg/tree-ssa/reassoc-34.c: Likewise.
* gcc.dg/tree-ssa/reassoc-35.c: Likewise.
* gcc.dg/tree-ssa/reassoc-36.c: Likewise.
* gcc.dg/tree-ssa/ssa-ifcombine-13.c: Likewise.
* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c: Likewise.
* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c: Likewise.
* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c: Likewise.
* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c: Likewise.
* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c: Likewise.
* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c: Likewise.

From-SVN: r256434

22 files changed:
gcc/ChangeLog
gcc/config/arm/arm.h
gcc/config/arm/arm.opt
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.dg/builtin-bswap-7.c
gcc/testsuite/gcc.dg/pr21643.c
gcc/testsuite/gcc.dg/pr46309.c
gcc/testsuite/gcc.dg/tree-ssa/phi-opt-11.c
gcc/testsuite/gcc.dg/tree-ssa/phi-opt-2.c
gcc/testsuite/gcc.dg/tree-ssa/reassoc-32.c
gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-13.c
gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c
gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c
gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c
gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c
gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c
gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c
gcc/testsuite/lib/target-supports.exp

index 8b5bda301cab911793466230213f6b3c7db3aac4..a7b22a83fcfe705fb7b18587235db6deadd8be5e 100644 (file)
@@ -1,3 +1,9 @@
+2018-01-10  Christophe Lyon  <christophe.lyon@linaro.org>
+
+       * config/arm/arm.opt (-mbranch-cost): New option.
+       * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
+       account.
+
 2018-01-10  Segher Boessenkool  <segher@kernel.crashing.org>
 
        PR target/83629
index 536f36f01bc42cfd7057c2d3677760eaaca9ef90..bd736423204b0062f5e396728d581798b694af78 100644 (file)
@@ -1899,8 +1899,9 @@ enum arm_auto_incmodes
 
 /* Try to generate sequences that don't involve branches, we can then use
    conditional instructions.  */
-#define BRANCH_COST(speed_p, predictable_p) \
-  (current_tune->branch_cost (speed_p, predictable_p))
+#define BRANCH_COST(speed_p, predictable_p)                    \
+  ((arm_branch_cost != -1) ? arm_branch_cost :                 \
+   (current_tune->branch_cost (speed_p, predictable_p)))
 
 /* False if short circuit operation is preferred.  */
 #define LOGICAL_OP_NON_SHORT_CIRCUIT                                   \
index def35d75034a5314631cf98ea821a5075408f39a..a1286a4a8614c16494ae66a65c74e2eeb9db34d9 100644 (file)
@@ -298,3 +298,7 @@ When linking for big-endian targets, generate a BE8 format image.
 mbe32
 Target Report RejectNegative Negative(mbe8) InverseMask(BE8)
 When linking for big-endian targets, generate a legacy BE32 format image.
+
+mbranch-cost=
+Target RejectNegative Joined UInteger Var(arm_branch_cost) Init(-1)
+Cost to assume for a branch insn.
index 11266ff69eefd3ecb233ca06fd83a4f31a8fada9..c6adde8486687f82677124da37d49a4c146ffd2a 100644 (file)
@@ -1,3 +1,25 @@
+2018-01-10  Christophe Lyon  <christophe.lyon@linaro.org>
+
+       * lib/target-supports.exp (check_effective_target_branch_cost):
+       New function.
+       * gcc.dg/builtin-bswap-7.c: Use branch_cost effective target.
+       * gcc.dg/pr21643.c: Likewise.
+       * gcc.dg/pr46309.c: Likewise.
+       * gcc.dg/tree-ssa/phi-opt-11.c: Likewise.
+       * gcc.dg/tree-ssa/phi-opt-2.c: Likewise.
+       * gcc.dg/tree-ssa/reassoc-32.c: Likewise.
+       * gcc.dg/tree-ssa/reassoc-33.c: Likewise.
+       * gcc.dg/tree-ssa/reassoc-34.c: Likewise.
+       * gcc.dg/tree-ssa/reassoc-35.c: Likewise.
+       * gcc.dg/tree-ssa/reassoc-36.c: Likewise.
+       * gcc.dg/tree-ssa/ssa-ifcombine-13.c: Likewise.
+       * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c: Likewise.
+       * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c: Likewise.
+       * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c: Likewise.
+       * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c: Likewise.
+       * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c: Likewise.
+       * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c: Likewise.
+
 2018-01-10  Segher Boessenkool  <segher@kernel.crashing.org>
 
        PR target/83629
index 3e1718d906d12eeccd9bd50f54989bdfb677f864..fe854416c40a677dce127253f1dfefcdd63b5987 100644 (file)
@@ -5,7 +5,7 @@
 
 /* The branch cost setting prevents the return value from being
    calculated with arithmetic instead of doing a compare.  */
-/* { dg-additional-options "-mbranch-cost=0" { target s390x-*-* } } */
+/* { dg-additional-options "-mbranch-cost=0" { target branch_cost } } */
 
 #include <stdint.h>
 
index bd76aa8091bbbfe6ff46f457dae5a4175b06ed6d..d981fbc8b3bccc7a79a6e4df103f5bf6d3d8db25 100644 (file)
@@ -1,6 +1,7 @@
 /* PR tree-optimization/21643 */
 /* { dg-do compile } */
 /* { dg-options "-O2 -fdump-tree-reassoc1-details" } */
+/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 int
 f1 (unsigned char c)
index 68229cf61d94b9dcb37d7c7becf371e8521f005f..c9645292c6fbf0dadc7cfa2886c23d3383199401 100644 (file)
@@ -4,7 +4,7 @@
 /* The transformation depends on BRANCH_COST being greater than 1
    (see the notes in the PR), so try to force that.  */
 /* { dg-additional-options "-mtune=octeon2" { target mips*-*-* } } */
-/* { dg-additional-options "-mbranch-cost=2" { target avr*-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 int
 f1 (int a)
index cda3abf9ec5be0d11361cdba7b9d2f96c9fbc04a..20728fcacc5f303865a21798d833781ba4701242 100644 (file)
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O1 -fdump-tree-optimized" } */
+/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 int f(int a, int b, int c)
 {
index 140812272b89b2f48c5521e3cacd1bb1728af881..e0b261810382083253ca8b76156bf5847c518484 100644 (file)
@@ -1,6 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O1 -fdump-tree-optimized" } */
-/* { dg-additional-options "-mbranch-cost=1" { target { i?86-*-* x86_64-*-* mips*-*-* s390*-*-* avr*-*-* } } } */
+/* { dg-additional-options "-mbranch-cost=1" { target branch_cost } } */
 
 _Bool f1(_Bool a, _Bool b)
 {
index 3ac1fb6a4f668c13ff7431b683031bccca416d4f..b6ca8e2bb39e762561d65b22a6029cc74c22b876 100644 (file)
@@ -1,7 +1,7 @@
 /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*"} } } */
 
 /* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
-/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 
 int test (int a, int b, int c)
index 6811a42133e667a7d4df633dc963b00dab494e07..5572df4ae2412294e71d055840d67e6eed484ecf 100644 (file)
@@ -1,7 +1,7 @@
 /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* nios2*-*-*"} } } */
 
 /* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
-/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 int test (int a, int b, int c)
 {
index 523654d26d4ec271c20e0ab550cdbc6ea5cbe577..9b45f1cd9be85416f4962eaf3bfb76e95ebbfa4f 100644 (file)
@@ -1,7 +1,7 @@
 /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* nios2*-*-*"} } } */
 
 /* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
-/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 int test (int a, int b, int c)
 {
index 216604ee7147aa43c9d0c88c08230bdabb9a95e8..9ee3abca04eedaf7b22108dc084645e8d56294c9 100644 (file)
@@ -1,7 +1,7 @@
 /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* nios2*-*-*"} } } */
 
 /* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
-/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 int test (unsigned int a, int b, int c)
 {
index dbbf8a1c83393fb4fbb6dddea3ebd2aac2daf486..ac3a04291b79b6386f26016eeb5434c82cef389b 100644 (file)
@@ -1,7 +1,7 @@
 /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* nios2*-*-*"} } } */
 
 /* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
-/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 int test (int a, int b, int c)
 {
index 7f4f011faeea8c6ec64fd862972cf4f5161ae265..5f3147a8c004fe679dbd76e9483a820e50fa0646 100644 (file)
@@ -1,6 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O1 -fdump-tree-optimized-details-blocks" } */
-/* { dg-additional-options "-mbranch-cost=2" { target { i?86-*-* x86_64-*-* s390*-*-* avr*-*-* } } } */
+/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 _Bool f1(_Bool a, _Bool b)
 {
index acfcb7d12a35dfa519448a6eadfd1be9b793bdbe..1714fcf97c0501a960cb8ac7f9fe7950ffb5301c 100644 (file)
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */
 
 /* { dg-options "-O2 -g -fdump-tree-optimized" } */
-/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 int t (int a, int b)
 {
index 0435d559ac60aa81fd1c344c0b1e4340bcec2a42..f35ec5edac23784af738ccca0a60f8ac99490b1f 100644 (file)
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */
 
 /* { dg-options "-O2 -g -fdump-tree-optimized" } */
-/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 int t (int a, int b)
 {
index 4f2b57046a485318dcfbc8389d643620fe1a67ee..d84bdd51c749eaf6de0613721a9328cd97d5c866 100644 (file)
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */
 
 /* { dg-options "-O2 -g -fdump-tree-optimized" } */
-/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 int t (int a, int b)
 {
index 9c64b5ec96fb6395f1b8d5b2c4b513749c0454ce..be0ee264e359927958ae2cd62eaddb0b0d657877 100644 (file)
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */
 
 /* { dg-options "-O2 -g -fdump-tree-optimized" } */
-/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 int t (int a, int b)
 {
index 8cd4a60e425cc333cb9d44947ede61191e7be1ae..09c22abb071aa5fd8bee0536a85b6f662fac20df 100644 (file)
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */
 
 /* { dg-options "-O2 -g -fdump-tree-optimized" } */
-/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 int t (int a, int b, int c)
 {
index c161b16a247d6a290de7dd9657a2bdb9e5e16de6..a0dc82db1564ab730390a827cca9df3d20c7e292 100644 (file)
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */
 
 /* { dg-options "-O2 -g -fdump-tree-optimized" } */
-/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
 
 int t (int a, int b, int c)
 {
index 3c3ece59a2df45c501e9b7323100604014dd41b7..7de961b45e18af8f3029a8d046bbd5557aec191f 100644 (file)
@@ -8595,6 +8595,24 @@ proc check_effective_target_logical_op_short_circuit {} {
     return 0
 }
 
+# Return 1 if the target supports -mbranch-cost=N option.
+
+proc check_effective_target_branch_cost {} {
+    if { [   istarget arm*-*-*]
+        || [istarget avr*-*-*]
+        || [istarget epiphany*-*-*]
+        || [istarget frv*-*-*]
+        || [istarget i?86-*-linux*] || [istarget x86_64-*-linux*]
+        || [istarget mips*-*-*]
+        || [istarget s390*-*-*]
+        || [istarget riscv*-*-*]
+        || [istarget sh*-*-*]
+        || [istarget spu*-*-*] } {
+       return 1
+    }
+    return 0
+}
+
 # Record that dg-final test TEST requires convential compilation.
 
 proc force_conventional_output_for { test } {