i386.h (processor_costs): Add new fields fadd, fmul, fdiv, fabs, fchs and fsqrt to...
authorRoger Sayle <roger@eyesopen.com>
Fri, 4 Oct 2002 16:08:18 +0000 (16:08 +0000)
committerRoger Sayle <sayle@gcc.gnu.org>
Fri, 4 Oct 2002 16:08:18 +0000 (16:08 +0000)
* config/i386/i386.h (processor_costs): Add new fields fadd,
fmul, fdiv, fabs, fchs and fsqrt to costs structure.
(RTX_COSTS): Use these fields to determine the RTX costs
of floating point addition/subtraction, multiplication,
division, fabs, negation and square root respectively.
* config/i386/i386.c (size_cost): Provide instruction sizes
for these new fields.
(i386_cost, i486_cost, pentium_cost, pentiumpro_cost,
k6_cost, athlon_cost, pentium4_cost): Provide typical cycle
counts for these new fields for all x86 processor variants.

From-SVN: r57820

gcc/ChangeLog
gcc/config/i386/i386.c
gcc/config/i386/i386.h

index d93efc77439c141bb15820d2f499f305139a84ea..8c68ceba3c7d11f34253bb7689b7022f75072ed5 100644 (file)
@@ -1,3 +1,16 @@
+2002-10-04  Roger Sayle  <roger@eyesopen.com>
+
+       * config/i386/i386.h (processor_costs): Add new fields fadd,
+       fmul, fdiv, fabs, fchs and fsqrt to costs structure.
+       (RTX_COSTS): Use these fields to determine the RTX costs
+       of floating point addition/subtraction, multiplication,
+       division, fabs, negation and square root respectively.
+       * config/i386/i386.c (size_cost): Provide instruction sizes
+       for these new fields.
+       (i386_cost, i486_cost, pentium_cost, pentiumpro_cost,
+       k6_cost, athlon_cost, pentium4_cost): Provide typical cycle
+       counts for these new fields for all x86 processor variants.
+
 2002-10-04  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 
        * mips.c (mips_const_double_ok): Delete unused variable.
index f912fa94d38602f552c8346b3bcf0019d8bf1263..f612623ea6bad7f98ae19d4910623513acf4db89 100644 (file)
@@ -84,7 +84,14 @@ struct processor_costs size_cost = { /* costs for tunning for size */
   3,                                   /* MMX or SSE register to integer */
   0,                                   /* size of prefetch block */
   0,                                   /* number of parallel prefetches */
+  2,                                   /* cost of FADD and FSUB insns.  */
+  2,                                   /* cost of FMUL instruction.  */
+  2,                                   /* cost of FDIV instruction.  */
+  2,                                   /* cost of FABS instruction.  */
+  2,                                   /* cost of FCHS instruction.  */
+  2,                                   /* cost of FSQRT instruction.  */
 };
+
 /* Processor costs (relative to an add) */
 static const
 struct processor_costs i386_cost = {   /* 386 specific costs */
@@ -121,6 +128,12 @@ struct processor_costs i386_cost = {       /* 386 specific costs */
   3,                                   /* MMX or SSE register to integer */
   0,                                   /* size of prefetch block */
   0,                                   /* number of parallel prefetches */
+  23,                                  /* cost of FADD and FSUB insns.  */
+  27,                                  /* cost of FMUL instruction.  */
+  88,                                  /* cost of FDIV instruction.  */
+  22,                                  /* cost of FABS instruction.  */
+  24,                                  /* cost of FCHS instruction.  */
+  122,                                 /* cost of FSQRT instruction.  */
 };
 
 static const
@@ -158,6 +171,12 @@ struct processor_costs i486_cost = {       /* 486 specific costs */
   3,                                   /* MMX or SSE register to integer */
   0,                                   /* size of prefetch block */
   0,                                   /* number of parallel prefetches */
+  8,                                   /* cost of FADD and FSUB insns.  */
+  16,                                  /* cost of FMUL instruction.  */
+  73,                                  /* cost of FDIV instruction.  */
+  3,                                   /* cost of FABS instruction.  */
+  3,                                   /* cost of FCHS instruction.  */
+  83,                                  /* cost of FSQRT instruction.  */
 };
 
 static const
@@ -195,6 +214,12 @@ struct processor_costs pentium_cost = {
   3,                                   /* MMX or SSE register to integer */
   0,                                   /* size of prefetch block */
   0,                                   /* number of parallel prefetches */
+  3,                                   /* cost of FADD and FSUB insns.  */
+  3,                                   /* cost of FMUL instruction.  */
+  39,                                  /* cost of FDIV instruction.  */
+  1,                                   /* cost of FABS instruction.  */
+  1,                                   /* cost of FCHS instruction.  */
+  70,                                  /* cost of FSQRT instruction.  */
 };
 
 static const
@@ -232,6 +257,12 @@ struct processor_costs pentiumpro_cost = {
   3,                                   /* MMX or SSE register to integer */
   32,                                  /* size of prefetch block */
   6,                                   /* number of parallel prefetches */
+  3,                                   /* cost of FADD and FSUB insns.  */
+  5,                                   /* cost of FMUL instruction.  */
+  56,                                  /* cost of FDIV instruction.  */
+  2,                                   /* cost of FABS instruction.  */
+  2,                                   /* cost of FCHS instruction.  */
+  56,                                  /* cost of FSQRT instruction.  */
 };
 
 static const
@@ -269,6 +300,12 @@ struct processor_costs k6_cost = {
   6,                                   /* MMX or SSE register to integer */
   32,                                  /* size of prefetch block */
   1,                                   /* number of parallel prefetches */
+  2,                                   /* cost of FADD and FSUB insns.  */
+  2,                                   /* cost of FMUL instruction.  */
+  2,                                   /* cost of FDIV instruction.  */
+  56,                                  /* cost of FABS instruction.  */
+  2,                                   /* cost of FCHS instruction.  */
+  56,                                  /* cost of FSQRT instruction.  */
 };
 
 static const
@@ -306,6 +343,12 @@ struct processor_costs athlon_cost = {
   5,                                   /* MMX or SSE register to integer */
   64,                                  /* size of prefetch block */
   6,                                   /* number of parallel prefetches */
+  4,                                   /* cost of FADD and FSUB insns.  */
+  4,                                   /* cost of FMUL instruction.  */
+  24,                                  /* cost of FDIV instruction.  */
+  2,                                   /* cost of FABS instruction.  */
+  2,                                   /* cost of FCHS instruction.  */
+  35,                                  /* cost of FSQRT instruction.  */
 };
 
 static const
@@ -343,6 +386,12 @@ struct processor_costs pentium4_cost = {
   10,                                  /* MMX or SSE register to integer */
   64,                                  /* size of prefetch block */
   6,                                   /* number of parallel prefetches */
+  5,                                   /* cost of FADD and FSUB insns.  */
+  7,                                   /* cost of FMUL instruction.  */
+  43,                                  /* cost of FDIV instruction.  */
+  2,                                   /* cost of FABS instruction.  */
+  2,                                   /* cost of FCHS instruction.  */
+  43,                                  /* cost of FSQRT instruction.  */
 };
 
 const struct processor_costs *ix86_cost = &pentium_cost;
index a59168bd898e6fa56ae23c8d345aecf609e7a682..a2f1cc2e5ce8b7fb0e1b4833c4a5cb05d43b5702 100644 (file)
@@ -75,6 +75,12 @@ struct processor_costs {
   const int prefetch_block;    /* bytes moved to cache for prefetch.  */
   const int simultaneous_prefetches; /* number of parallel prefetch
                                   operations.  */
+  const int fadd;              /* cost of FADD and FSUB instructions.  */
+  const int fmul;              /* cost of FMUL instruction.  */
+  const int fdiv;              /* cost of FDIV instruction.  */
+  const int fabs;              /* cost of FABS instruction.  */
+  const int fchs;              /* cost of FCHS instruction.  */
+  const int fsqrt;             /* cost of FSQRT instruction.  */
 };
 
 extern const struct processor_costs *ix86_cost;
@@ -2632,7 +2638,9 @@ do {                                                      \
     break;                                                             \
                                                                        \
   case MULT:                                                           \
-    if (GET_CODE (XEXP (X, 1)) == CONST_INT)                           \
+    if (FLOAT_MODE_P (GET_MODE (X)))                                   \
+      TOPLEVEL_COSTS_N_INSNS (ix86_cost->fmul);                                \
+    else if (GET_CODE (XEXP (X, 1)) == CONST_INT)                      \
       {                                                                        \
        unsigned HOST_WIDE_INT value = INTVAL (XEXP (X, 1));            \
        int nbits = 0;                                                  \
@@ -2654,10 +2662,16 @@ do {                                                    \
   case UDIV:                                                           \
   case MOD:                                                            \
   case UMOD:                                                           \
-    TOPLEVEL_COSTS_N_INSNS (ix86_cost->divide);                                \
+    if (FLOAT_MODE_P (GET_MODE (X)))                                   \
+      TOPLEVEL_COSTS_N_INSNS (ix86_cost->fdiv);                                \
+    else                                                               \
+      TOPLEVEL_COSTS_N_INSNS (ix86_cost->divide);                      \
+    break;                                                             \
                                                                        \
   case PLUS:                                                           \
-    if (!TARGET_DECOMPOSE_LEA                                          \
+    if (FLOAT_MODE_P (GET_MODE (X)))                                   \
+      TOPLEVEL_COSTS_N_INSNS (ix86_cost->fadd);                                \
+    else if (!TARGET_DECOMPOSE_LEA                                     \
        && INTEGRAL_MODE_P (GET_MODE (X))                               \
        && GET_MODE_BITSIZE (GET_MODE (X)) <= GET_MODE_BITSIZE (Pmode)) \
       {                                                                        \
@@ -2697,21 +2711,29 @@ do {                                                    \
                    + rtx_cost (XEXP (X, 1), (OUTER_CODE)));            \
          }                                                             \
       }                                                                        \
+    /* fall through */                                                 \
                                                                        \
+  case MINUS:                                                          \
+    if (FLOAT_MODE_P (GET_MODE (X)))                                   \
+      TOPLEVEL_COSTS_N_INSNS (ix86_cost->fadd);                                \
     /* fall through */                                                 \
+                                                                       \
   case AND:                                                            \
   case IOR:                                                            \
   case XOR:                                                            \
-  case MINUS:                                                          \
     if (!TARGET_64BIT && GET_MODE (X) == DImode)                       \
       return (COSTS_N_INSNS (ix86_cost->add) * 2                       \
              + (rtx_cost (XEXP (X, 0), (OUTER_CODE))                   \
                 << (GET_MODE (XEXP (X, 0)) != DImode))                 \
              + (rtx_cost (XEXP (X, 1), (OUTER_CODE))                   \
                 << (GET_MODE (XEXP (X, 1)) != DImode)));               \
-                                                                       \
     /* fall through */                                                 \
+                                                                       \
   case NEG:                                                            \
+    if (FLOAT_MODE_P (GET_MODE (X)))                                   \
+      TOPLEVEL_COSTS_N_INSNS (ix86_cost->fchs);                                \
+    /* fall through */                                                 \
+                                                                       \
   case NOT:                                                            \
     if (!TARGET_64BIT && GET_MODE (X) == DImode)                       \
       TOPLEVEL_COSTS_N_INSNS (ix86_cost->add * 2);                     \
@@ -2723,6 +2745,16 @@ do {                                                     \
       TOPLEVEL_COSTS_N_INSNS (0);                                      \
     break;                                                             \
                                                                        \
+  case ABS:                                                            \
+    if (FLOAT_MODE_P (GET_MODE (X)))                                   \
+      TOPLEVEL_COSTS_N_INSNS (ix86_cost->fabs);                                \
+    break;                                                             \
+                                                                       \
+  case SQRT:                                                           \
+    if (FLOAT_MODE_P (GET_MODE (X)))                                   \
+      TOPLEVEL_COSTS_N_INSNS (ix86_cost->fsqrt);                       \
+    break;                                                             \
+                                                                       \
   egress_rtx_costs:                                                    \
     break;