r600: don't emit reloc for ring buffer out into the blue

It looks like this reloc belongs to setting the constant reg, which is skipped
for gs ring.

Reviewed-by: Dave Airlie <airlied@redhat.com>

diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index 0da665f634052817337846671827a15cc9b87790..81b7c4a2853abcf1fb6b0de5239150a188758092 100644 (file)
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -2172,12 +2172,11 @@ static void evergreen_emit_constant_buffers(struct r600_context *rctx,
                                                    DIV_ROUND_UP(cb->buffer_size, 256), pkt_flags);
                        radeon_set_context_reg_flag(cs, reg_alu_const_cache + buffer_index * 4, va >> 8,
                                                    pkt_flags);
+                       radeon_emit(cs, PKT3(PKT3_NOP, 0, 0) | pkt_flags);
+                       radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, rbuffer,
+                                                                 RADEON_USAGE_READ, RADEON_PRIO_CONST_BUFFER));
                }
 
-               radeon_emit(cs, PKT3(PKT3_NOP, 0, 0) | pkt_flags);
-               radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, rbuffer,
-                                                     RADEON_USAGE_READ, RADEON_PRIO_CONST_BUFFER));
-
                radeon_emit(cs, PKT3(PKT3_SET_RESOURCE, 8, 0) | pkt_flags);
                radeon_emit(cs, (buffer_id_base + buffer_index) * 8);
                radeon_emit(cs, va); /* RESOURCEi_WORD0 */

diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index cbf860f45f6cdd788371472eae365b429e051ca1..253ff57a98fb557c9f0e9dbda43716530cd1486b 100644 (file)
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -1715,12 +1715,11 @@ static void r600_emit_constant_buffers(struct r600_context *rctx,
                        radeon_set_context_reg(cs, reg_alu_constbuf_size + buffer_index * 4,
                                               DIV_ROUND_UP(cb->buffer_size, 256));
                        radeon_set_context_reg(cs, reg_alu_const_cache + buffer_index * 4, offset >> 8);
+                       radeon_emit(cs, PKT3(PKT3_NOP, 0, 0));
+                       radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, rbuffer,
+                                                                 RADEON_USAGE_READ, RADEON_PRIO_CONST_BUFFER));
                }
 
-               radeon_emit(cs, PKT3(PKT3_NOP, 0, 0));
-               radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, rbuffer,
-                                                     RADEON_USAGE_READ, RADEON_PRIO_CONST_BUFFER));
-
                radeon_emit(cs, PKT3(PKT3_SET_RESOURCE, 7, 0));
                radeon_emit(cs, (buffer_id_base + buffer_index) * 7);
                radeon_emit(cs, offset); /* RESOURCEi_WORD0 */