+2004-12-17 Uros Bizjak <uros@kss-loka.si>
+
+ * config/i386/i386.md (extendsfdf2, *extendsfdf2_1,
+ *extendsfdf2_1_sse_only): Unify enable constraint with
+ respect to TARGET_SSE2, TARGET_80387, TARGET_SSE_MATH
+ and TARGET_MIX_SSE_I387.
+ (*extendsfdf2_i387): New insn pattern.
+ (*extendsfdf2_1): Rename to *extendsfdf2_mixed. Fix
+ register constraint for operand 0.
+ (*extendsfdf2_1_sse_only): Rename to *extendsfdf2_sse.
+ (*extend{s,d}fxf2_1): Rename to *extend{s,d}fxf2_i387.
+
2004-12-16 Andrew Pinski <pinskia@physics.uc.edu>
PR target/19041
(define_expand "extendsfdf2"
[(set (match_operand:DF 0 "nonimmediate_operand" "")
(float_extend:DF (match_operand:SF 1 "general_operand" "")))]
- "TARGET_80387 || TARGET_SSE2"
+ "TARGET_80387 || (TARGET_SSE2 && TARGET_SSE_MATH)"
{
/* ??? Needed for compress_float_constant since all fp constants
are LEGITIMATE_CONSTANT_P. */
operands[1] = force_reg (SFmode, operands[1]);
})
-(define_insn "*extendsfdf2_1"
- [(set (match_operand:DF 0 "nonimmediate_operand" "=f#Y,mf#Y,Y#f")
+(define_insn "*extendsfdf2_mixed"
+ [(set (match_operand:DF 0 "nonimmediate_operand" "=f#Y,m#fY,Y#f")
(float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "fm#Y,f#Y,mY#f")))]
- "(TARGET_80387 || TARGET_SSE2)
+ "TARGET_SSE2 && TARGET_MIX_SSE_I387
&& (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
{
switch (which_alternative)
[(set_attr "type" "fmov,fmov,ssecvt")
(set_attr "mode" "SF,XF,DF")])
-(define_insn "*extendsfdf2_1_sse_only"
+(define_insn "*extendsfdf2_sse"
[(set (match_operand:DF 0 "register_operand" "=Y")
(float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "mY")))]
- "!TARGET_80387 && TARGET_SSE2
+ "TARGET_SSE2 && TARGET_SSE_MATH
&& (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
"cvtss2sd\t{%1, %0|%0, %1}"
[(set_attr "type" "ssecvt")
(set_attr "mode" "DF")])
+(define_insn "*extendsfdf2_i387"
+ [(set (match_operand:DF 0 "nonimmediate_operand" "=f,m")
+ (float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "fm,f")))]
+ "TARGET_80387
+ && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
+{
+ switch (which_alternative)
+ {
+ case 0:
+ return output_387_reg_move (insn, operands);
+
+ case 1:
+ if (find_regno_note (insn, REG_DEAD, REGNO (operands[1])))
+ return "fstp%z0\t%y0";
+ else
+ return "fst%z0\t%y0";
+
+ default:
+ abort ();
+ }
+}
+ [(set_attr "type" "fmov")
+ (set_attr "mode" "SF,XF")])
+
(define_expand "extendsfxf2"
[(set (match_operand:XF 0 "nonimmediate_operand" "")
(float_extend:XF (match_operand:SF 1 "general_operand" "")))]
operands[1] = force_reg (SFmode, operands[1]);
})
-(define_insn "*extendsfxf2_1"
+(define_insn "*extendsfxf2_i387"
[(set (match_operand:XF 0 "nonimmediate_operand" "=f,m")
(float_extend:XF (match_operand:SF 1 "nonimmediate_operand" "fm,f")))]
"TARGET_80387
case 1:
/* There is no non-popping store to memory for XFmode. So if
we need one, follow the store with a load. */
- if (! find_regno_note (insn, REG_DEAD, REGNO (operands[1])))
- return "fstp%z0\t%y0\n\tfld%z0\t%y0";
- else
+ if (find_regno_note (insn, REG_DEAD, REGNO (operands[1])))
return "fstp%z0\t%y0";
+ else
+ return "fstp%z0\t%y0\n\tfld%z0\t%y0";
default:
abort ();
operands[1] = force_reg (DFmode, operands[1]);
})
-(define_insn "*extenddfxf2_1"
+(define_insn "*extenddfxf2_i387"
[(set (match_operand:XF 0 "nonimmediate_operand" "=f,m")
(float_extend:XF (match_operand:DF 1 "nonimmediate_operand" "fm,f")))]
"TARGET_80387