Forgot to set ud_variable.minlen

diff --git a/passes/pmgen/xilinx_srl.cc b/passes/pmgen/xilinx_srl.cc
index 36833839b3021c556b0d4f9297a45cf81b6da1b2..d1dbd77aeeca92eaf2f8a34c317820f27c232484 100644 (file)
--- a/passes/pmgen/xilinx_srl.cc
+++ b/passes/pmgen/xilinx_srl.cc
@@ -204,6 +204,7 @@ struct XilinxSrlPass : public Pass {
                for (auto module : design->selected_modules()) {
                        auto pm = xilinx_srl_pm(module, module->selected_cells());
                        pm.ud_fixed.minlen = minlen;
+                       pm.ud_variable.minlen = minlen;
 
                        if (fixed) {
                                // TODO: How to get these automatically?