+2017-07-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * config/arm/arm-cpus.in (cortex-r52): Add new entry.
+ (armv8-r): Set ARM Cortex-R52 as default CPU.
+ * config/arm/arm-tables.opt: Regenerate.
+ * config/arm/arm-tune.md: Regenerate.
+ * config/arm/driver-arm.c (arm_cpu_table): Add entry for ARM
+ Cortex-R52.
+ * doc/invoke.texi: Mention -mtune=cortex-r52 and availability of fp.dp
+ extension for -mcpu=cortex-r52.
+
2017-07-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm-isa.h (isa_bit_FP_ARMv8): Delete enumerator.
end arch armv8-m.main
begin arch armv8-r
- tune for cortex-r4
+ tune for cortex-r52
tune flags CO_PROC
base 8R
profile R
costs v7m
end cpu cortex-m33
+# V8 R-profile implementations.
+begin cpu cortex-r52
+ cname cortexr52
+ tune flags LDSCHED
+ architecture armv8-r+crc+simd
+ fpu neon-fp-armv8
+ option nofp.dp remove FP_DBL ALL_SIMD
+ costs cortex
+end cpu cortex-r52
+
# FPU entries
# format:
# begin fpu <name>
EnumValue
Enum(processor_type) String(cortex-m33) Value( TARGET_CPU_cortexm33)
+EnumValue
+Enum(processor_type) String(cortex-r52) Value( TARGET_CPU_cortexr52)
+
Enum
Name(arm_arch) Type(int)
Known ARM architectures (for use with the -march= option):
cortexa73,exynosm1,xgene1,
cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,
cortexa73cortexa53,cortexa55,cortexa75,
- cortexa75cortexa55,cortexm23,cortexm33"
+ cortexa75cortexa55,cortexm23,cortexm33,
+ cortexr52"
(const (symbol_ref "((enum attr_tune) arm_tune)")))
{"0xc15", "armv7-r", "cortex-r5"},
{"0xc17", "armv7-r", "cortex-r7"},
{"0xc18", "armv7-r", "cortex-r8"},
+ {"0xd13", "armv8-r+crc", "cortex-r52"},
{"0xc20", "armv6-m", "cortex-m0"},
{"0xc21", "armv6-m", "cortex-m1"},
{"0xc23", "armv7-m", "cortex-m3"},
@samp{cortex-a32}, @samp{cortex-a35}, @samp{cortex-a53}, @samp{cortex-a55},
@samp{cortex-a57}, @samp{cortex-a72}, @samp{cortex-a73}, @samp{cortex-a75},
@samp{cortex-r4}, @samp{cortex-r4f}, @samp{cortex-r5}, @samp{cortex-r7},
-@samp{cortex-r8},
+@samp{cortex-r8}, @samp{cortex-r52},
@samp{cortex-m33},
@samp{cortex-m23},
@samp{cortex-m7},
@item +nofp.dp
Disables the double-precision component of the floating-point instructions
-on @samp{cortex-r5} and @samp{cortex-m7}.
+on @samp{cortex-r5}, @samp{cortex-r52} and @samp{cortex-m7}.
@item +nosimd
Disables the SIMD (but not floating-point) instructions on