re PR target/29693 (ICE while compiling gcc-3.4.3 with gcc-4.1.1)
authorRamana Radhakrishnan <ramana.radhakrishnan@arm.com>
Thu, 25 Jun 2015 08:18:19 +0000 (08:18 +0000)
committerRamana Radhakrishnan <ramana@gcc.gnu.org>
Thu, 25 Jun 2015 08:18:19 +0000 (08:18 +0000)
Fix PR target/29693

2015-06-25  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

PR target/29693
* config/arm/arm.c (arm_dbx_register_number): Return
DWARF_FRAME_REGISTERS by default.

From-SVN: r224932

gcc/ChangeLog
gcc/config/arm/arm.c

index d60bd5fcbb39bb3b2cbe6e74c67baf5dbbefaf2e..9e37094678d27dae3416ad3450b84cbe5fdd65ee 100644 (file)
@@ -1,3 +1,9 @@
+2015-06-25  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+
+       PR target/29693
+       * config/arm/arm.c (arm_dbx_register_number): Return
+       DWARF_FRAME_REGISTERS by default.
+
 2015-06-25  Tom de Vries  <tom@codesourcery.com>
 
        * dominance.c (calculate_dominance_info): Fix verify_dominators call
index 09191e5d2c2e403808eefc6c91bc931b571585a8..9f4e3950789c3310783c7b7f6c66159263f5b7d4 100644 (file)
@@ -26389,7 +26389,7 @@ arm_dbx_register_number (unsigned int regno)
   if (IS_IWMMXT_REGNUM (regno))
     return 112 + regno - FIRST_IWMMXT_REGNUM;
 
-  gcc_unreachable ();
+  return DWARF_FRAME_REGISTERS;
 }
 
 /* Dwarf models VFPv3 registers as 32 64-bit registers.