struct list_head list;
};
-struct r600_context;
-struct r600_screen;
+struct si_context;
+struct si_screen;
-void si_get_backend_mask(struct r600_context *ctx);
-void si_context_flush(struct r600_context *ctx, unsigned flags);
-void si_begin_new_cs(struct r600_context *ctx);
+void si_get_backend_mask(struct si_context *ctx);
+void si_context_flush(struct si_context *ctx, unsigned flags);
+void si_begin_new_cs(struct si_context *ctx);
-struct r600_query *r600_context_query_create(struct r600_context *ctx, unsigned query_type);
-void r600_context_query_destroy(struct r600_context *ctx, struct r600_query *query);
-boolean r600_context_query_result(struct r600_context *ctx,
+struct r600_query *r600_context_query_create(struct si_context *ctx, unsigned query_type);
+void r600_context_query_destroy(struct si_context *ctx, struct r600_query *query);
+boolean r600_context_query_result(struct si_context *ctx,
struct r600_query *query,
boolean wait, void *vresult);
-void r600_query_begin(struct r600_context *ctx, struct r600_query *query);
-void r600_query_end(struct r600_context *ctx, struct r600_query *query);
-void r600_context_queries_suspend(struct r600_context *ctx);
-void r600_context_queries_resume(struct r600_context *ctx);
-void r600_query_predication(struct r600_context *ctx, struct r600_query *query, int operation,
+void r600_query_begin(struct si_context *ctx, struct r600_query *query);
+void r600_query_end(struct si_context *ctx, struct r600_query *query);
+void r600_context_queries_suspend(struct si_context *ctx);
+void r600_context_queries_resume(struct si_context *ctx);
+void r600_query_predication(struct si_context *ctx, struct r600_query *query, int operation,
int flag_wait);
bool si_is_timer_query(unsigned type);
bool si_query_needs_begin(unsigned type);
-void si_need_cs_space(struct r600_context *ctx, unsigned num_dw, boolean count_draw_in);
+void si_need_cs_space(struct si_context *ctx, unsigned num_dw, boolean count_draw_in);
-int si_context_init(struct r600_context *ctx);
+int si_context_init(struct si_context *ctx);
#endif
static void r600_blitter_begin(struct pipe_context *ctx, enum r600_blitter_op op)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
r600_context_queries_suspend(rctx);
static void r600_blitter_end(struct pipe_context *ctx)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
if (rctx->saved_render_cond) {
rctx->b.b.render_condition(&rctx->b.b,
rctx->saved_render_cond,
unsigned first_layer, unsigned last_layer,
unsigned first_sample, unsigned last_sample)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
unsigned layer, level, sample, checked_last_layer, max_layer, max_sample;
float depth = 1.0f;
const struct util_format_description *desc;
}
}
-static void si_blit_decompress_depth_in_place(struct r600_context *rctx,
+static void si_blit_decompress_depth_in_place(struct si_context *rctx,
struct r600_texture *texture,
unsigned first_level, unsigned last_level,
unsigned first_layer, unsigned last_layer)
}
}
-void si_flush_depth_textures(struct r600_context *rctx,
- struct r600_textures_info *textures)
+void si_flush_depth_textures(struct si_context *rctx,
+ struct si_textures_info *textures)
{
unsigned i;
unsigned first_level, unsigned last_level,
unsigned first_layer, unsigned last_layer)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
unsigned layer, level, checked_last_layer, max_layer;
if (!rtex->dirty_level_mask)
}
}
-void r600_decompress_color_textures(struct r600_context *rctx,
- struct r600_textures_info *textures)
+void r600_decompress_color_textures(struct si_context *rctx,
+ struct si_textures_info *textures)
{
unsigned i;
unsigned mask = textures->compressed_colortex_mask;
const union pipe_color_union *color,
double depth, unsigned stencil)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
struct pipe_framebuffer_state *fb = &rctx->framebuffer;
r600_blitter_begin(ctx, R600_CLEAR);
unsigned dstx, unsigned dsty,
unsigned width, unsigned height)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
r600_blitter_begin(ctx, R600_CLEAR_SURFACE);
util_blitter_clear_render_target(rctx->blitter, dst, color,
unsigned dstx, unsigned dsty,
unsigned width, unsigned height)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
r600_blitter_begin(ctx, R600_CLEAR_SURFACE);
util_blitter_clear_depth_stencil(rctx->blitter, dst, clear_flags, depth, stencil,
unsigned level,
unsigned first_layer, unsigned last_layer)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
struct r600_texture *rtex = (struct r600_texture*)tex;
if (rtex->is_depth && !rtex->is_flushing_texture) {
unsigned src_level,
const struct pipe_box *src_box)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
struct texture_orig_info orig_info[2];
struct pipe_box sbox;
const struct pipe_box *psbox = src_box;
static bool do_hardware_msaa_resolve(struct pipe_context *ctx,
const struct pipe_blit_info *info)
{
- struct r600_context *rctx = (struct r600_context*)ctx;
+ struct si_context *rctx = (struct si_context*)ctx;
struct r600_texture *dst = (struct r600_texture*)info->dst.resource;
unsigned dst_width = u_minify(info->dst.resource->width0, info->dst.level);
unsigned dst_height = u_minify(info->dst.resource->height0, info->dst.level);
static void si_blit(struct pipe_context *ctx,
const struct pipe_blit_info *info)
{
- struct r600_context *rctx = (struct r600_context*)ctx;
+ struct si_context *rctx = (struct si_context*)ctx;
if (do_hardware_msaa_resolve(ctx, info)) {
return;
{
}
-void si_init_blit_functions(struct r600_context *rctx)
+void si_init_blit_functions(struct si_context *rctx)
{
rctx->b.b.clear = r600_clear;
rctx->b.b.clear_render_target = r600_clear_render_target;
#include "si.h"
#include "si_pipe.h"
-void r600_upload_index_buffer(struct r600_context *rctx,
+void r600_upload_index_buffer(struct si_context *rctx,
struct pipe_index_buffer *ib, unsigned count)
{
u_upload_data(rctx->b.uploader, 0, count * ib->index_size,
ib->user_buffer, &ib->offset, &ib->buffer);
}
-void r600_upload_const_buffer(struct r600_context *rctx, struct r600_resource **rbuffer,
+void r600_upload_const_buffer(struct si_context *rctx, struct r600_resource **rbuffer,
const uint8_t *ptr, unsigned size,
uint32_t *const_offset)
{
#define MAX_GLOBAL_BUFFERS 20
struct si_pipe_compute {
- struct r600_context *ctx;
+ struct si_context *ctx;
unsigned local_size;
unsigned private_size;
struct pipe_context *ctx,
const struct pipe_compute_state *cso)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
struct si_pipe_compute *program =
CALLOC_STRUCT(si_pipe_compute);
const struct pipe_llvm_program_header *header;
static void radeonsi_bind_compute_state(struct pipe_context *ctx, void *state)
{
- struct r600_context *rctx = (struct r600_context*)ctx;
+ struct si_context *rctx = (struct si_context*)ctx;
rctx->cs_shader_state.program = (struct si_pipe_compute*)state;
}
uint32_t **handles)
{
unsigned i;
- struct r600_context *rctx = (struct r600_context*)ctx;
+ struct si_context *rctx = (struct si_context*)ctx;
struct si_pipe_compute *program = rctx->cs_shader_state.program;
if (!resources) {
const uint *block_layout, const uint *grid_layout,
uint32_t pc, const void *input)
{
- struct r600_context *rctx = (struct r600_context*)ctx;
+ struct si_context *rctx = (struct si_context*)ctx;
struct si_pipe_compute *program = rctx->cs_shader_state.program;
struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state);
struct r600_resource *kernel_args_buffer = NULL;
unsigned start, unsigned count,
struct pipe_surface ** surfaces) { }
-void si_init_compute_functions(struct r600_context *rctx)
+void si_init_compute_functions(struct si_context *rctx)
{
rctx->b.b.create_compute_state = radeonsi_create_compute_state;
rctx->b.b.delete_compute_state = si_delete_compute_state;
/* Emit a CP DMA packet to do a copy from one buffer to another.
* The size must fit in bits [20:0].
*/
-static void si_emit_cp_dma_copy_buffer(struct r600_context *rctx,
+static void si_emit_cp_dma_copy_buffer(struct si_context *rctx,
uint64_t dst_va, uint64_t src_va,
unsigned size, unsigned flags)
{
}
/* Emit a CP DMA packet to clear a buffer. The size must fit in bits [20:0]. */
-static void si_emit_cp_dma_clear_buffer(struct r600_context *rctx,
+static void si_emit_cp_dma_clear_buffer(struct si_context *rctx,
uint64_t dst_va, unsigned size,
uint32_t clear_value, unsigned flags)
{
}
}
-static void si_init_descriptors(struct r600_context *rctx,
+static void si_init_descriptors(struct si_context *rctx,
struct si_descriptors *desc,
unsigned shader_userdata_reg,
unsigned element_dw_size,
unsigned num_elements,
- void (*emit_func)(struct r600_context *ctx, struct r600_atom *state))
+ void (*emit_func)(struct si_context *ctx, struct r600_atom *state))
{
uint64_t va;
pipe_resource_reference((struct pipe_resource**)&desc->buffer, NULL);
}
-static void si_update_descriptors(struct r600_context *rctx,
+static void si_update_descriptors(struct si_context *rctx,
struct si_descriptors *desc)
{
if (desc->dirty_mask) {
}
}
-static void si_emit_shader_pointer(struct r600_context *rctx,
+static void si_emit_shader_pointer(struct si_context *rctx,
struct si_descriptors *desc)
{
struct radeon_winsys_cs *cs = rctx->b.rings.gfx.cs;
radeon_emit(cs, va >> 32);
}
-static void si_emit_descriptors(struct r600_context *rctx,
+static void si_emit_descriptors(struct si_context *rctx,
struct si_descriptors *desc,
uint32_t **descriptors)
{
/* SAMPLER VIEWS */
-static void si_emit_sampler_views(struct r600_context *rctx, struct r600_atom *atom)
+static void si_emit_sampler_views(struct si_context *rctx, struct r600_atom *atom)
{
struct si_sampler_views *views = (struct si_sampler_views*)atom;
si_emit_descriptors(rctx, &views->desc, views->desc_data);
}
-static void si_init_sampler_views(struct r600_context *rctx,
+static void si_init_sampler_views(struct si_context *rctx,
struct si_sampler_views *views,
unsigned shader)
{
si_release_descriptors(&views->desc);
}
-static void si_sampler_views_begin_new_cs(struct r600_context *rctx,
+static void si_sampler_views_begin_new_cs(struct si_context *rctx,
struct si_sampler_views *views)
{
unsigned mask = views->desc.enabled_mask;
si_emit_shader_pointer(rctx, &views->desc);
}
-void si_set_sampler_view(struct r600_context *rctx, unsigned shader,
+void si_set_sampler_view(struct si_context *rctx, unsigned shader,
unsigned slot, struct pipe_sampler_view *view,
unsigned *view_desc)
{
/* BUFFER RESOURCES */
-static void si_emit_buffer_resources(struct r600_context *rctx, struct r600_atom *atom)
+static void si_emit_buffer_resources(struct si_context *rctx, struct r600_atom *atom)
{
struct si_buffer_resources *buffers = (struct si_buffer_resources*)atom;
si_emit_descriptors(rctx, &buffers->desc, buffers->desc_data);
}
-static void si_init_buffer_resources(struct r600_context *rctx,
+static void si_init_buffer_resources(struct si_context *rctx,
struct si_buffer_resources *buffers,
unsigned num_buffers, unsigned shader,
unsigned shader_userdata_index,
si_release_descriptors(&buffers->desc);
}
-static void si_buffer_resources_begin_new_cs(struct r600_context *rctx,
+static void si_buffer_resources_begin_new_cs(struct si_context *rctx,
struct si_buffer_resources *buffers)
{
unsigned mask = buffers->desc.enabled_mask;
static void si_set_constant_buffer(struct pipe_context *ctx, uint shader, uint slot,
struct pipe_constant_buffer *input)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
struct si_buffer_resources *buffers = &rctx->const_buffers[shader];
if (shader >= SI_NUM_SHADERS)
struct pipe_stream_output_target **targets,
unsigned append_bitmask)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
struct si_buffer_resources *buffers = &rctx->streamout_buffers;
unsigned old_num_targets = rctx->b.streamout.num_targets;
unsigned i;
*/
static void si_invalidate_buffer(struct pipe_context *ctx, struct pipe_resource *buf)
{
- struct r600_context *rctx = (struct r600_context*)ctx;
+ struct si_context *rctx = (struct si_context*)ctx;
struct r600_resource *rbuffer = r600_resource(buf);
unsigned i, shader, alignment = rbuffer->buf->alignment;
uint64_t old_va = r600_resource_va(ctx->screen, buf);
static void si_clear_buffer(struct pipe_context *ctx, struct pipe_resource *dst,
unsigned offset, unsigned size, unsigned value)
{
- struct r600_context *rctx = (struct r600_context*)ctx;
+ struct si_context *rctx = (struct si_context*)ctx;
if (!size)
return;
R600_CONTEXT_FLUSH_AND_INV_DB_META;
}
-void si_copy_buffer(struct r600_context *rctx,
+void si_copy_buffer(struct si_context *rctx,
struct pipe_resource *dst, struct pipe_resource *src,
uint64_t dst_offset, uint64_t src_offset, unsigned size)
{
/* INIT/DEINIT */
-void si_init_all_descriptors(struct r600_context *rctx)
+void si_init_all_descriptors(struct si_context *rctx)
{
int i;
rctx->b.invalidate_buffer = si_invalidate_buffer;
}
-void si_release_all_descriptors(struct r600_context *rctx)
+void si_release_all_descriptors(struct si_context *rctx)
{
int i;
si_release_buffer_resources(&rctx->streamout_buffers);
}
-void si_all_descriptors_begin_new_cs(struct r600_context *rctx)
+void si_all_descriptors_begin_new_cs(struct si_context *rctx)
{
int i;
#define GROUP_FORCE_NEW_BLOCK 0
/* Get backends mask */
-void si_get_backend_mask(struct r600_context *ctx)
+void si_get_backend_mask(struct si_context *ctx)
{
struct radeon_winsys_cs *cs = ctx->b.rings.gfx.cs;
struct r600_resource *buffer;
}
/* initialize */
-void si_need_cs_space(struct r600_context *ctx, unsigned num_dw,
+void si_need_cs_space(struct si_context *ctx, unsigned num_dw,
boolean count_draw_in)
{
int i;
}
}
-void si_context_flush(struct r600_context *ctx, unsigned flags)
+void si_context_flush(struct si_context *ctx, unsigned flags)
{
struct radeon_winsys_cs *cs = ctx->b.rings.gfx.cs;
#if R600_TRACE_CS
if (ctx->screen->trace_bo) {
- struct r600_screen *rscreen = ctx->screen;
+ struct si_screen *rscreen = ctx->screen;
unsigned i;
for (i = 0; i < cs->cdw; i++) {
#if R600_TRACE_CS
if (ctx->screen->trace_bo) {
- struct r600_screen *rscreen = ctx->screen;
+ struct si_screen *rscreen = ctx->screen;
unsigned i;
for (i = 0; i < 10; i++) {
si_begin_new_cs(ctx);
}
-void si_begin_new_cs(struct r600_context *ctx)
+void si_begin_new_cs(struct si_context *ctx)
{
ctx->pm4_dirty_cdwords = 0;
return 0;
}
-static boolean r600_query_result(struct r600_context *ctx, struct r600_query *query, boolean wait)
+static boolean r600_query_result(struct si_context *ctx, struct r600_query *query, boolean wait)
{
unsigned results_base = query->results_start;
char *map;
return TRUE;
}
-void r600_query_begin(struct r600_context *ctx, struct r600_query *query)
+void r600_query_begin(struct si_context *ctx, struct r600_query *query)
{
struct radeon_winsys_cs *cs = ctx->b.rings.gfx.cs;
unsigned new_results_end, i;
}
}
-void r600_query_end(struct r600_context *ctx, struct r600_query *query)
+void r600_query_end(struct si_context *ctx, struct r600_query *query)
{
struct radeon_winsys_cs *cs = ctx->b.rings.gfx.cs;
uint64_t va;
}
}
-void r600_query_predication(struct r600_context *ctx, struct r600_query *query, int operation,
+void r600_query_predication(struct si_context *ctx, struct r600_query *query, int operation,
int flag_wait)
{
struct radeon_winsys_cs *cs = ctx->b.rings.gfx.cs;
}
}
-struct r600_query *r600_context_query_create(struct r600_context *ctx, unsigned query_type)
+struct r600_query *r600_context_query_create(struct si_context *ctx, unsigned query_type)
{
struct r600_query *query;
unsigned buffer_size = 4096;
return query;
}
-void r600_context_query_destroy(struct r600_context *ctx, struct r600_query *query)
+void r600_context_query_destroy(struct si_context *ctx, struct r600_query *query)
{
r600_resource_reference(&query->buffer, NULL);
free(query);
}
-boolean r600_context_query_result(struct r600_context *ctx,
+boolean r600_context_query_result(struct si_context *ctx,
struct r600_query *query,
boolean wait, void *vresult)
{
return TRUE;
}
-void r600_context_queries_suspend(struct r600_context *ctx)
+void r600_context_queries_suspend(struct si_context *ctx)
{
struct r600_query *query;
assert(ctx->num_cs_dw_nontimer_queries_suspend == 0);
}
-void r600_context_queries_resume(struct r600_context *ctx)
+void r600_context_queries_resume(struct si_context *ctx)
{
struct r600_query *query;
}
#if R600_TRACE_CS
-void r600_trace_emit(struct r600_context *rctx)
+void r600_trace_emit(struct si_context *rctx)
{
- struct r600_screen *rscreen = rctx->screen;
+ struct si_screen *rscreen = rctx->screen;
struct radeon_winsys_cs *cs = rctx->cs;
uint64_t va;
void radeonsi_flush(struct pipe_context *ctx, struct pipe_fence_handle **fence,
unsigned flags)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
struct pipe_query *render_cond = NULL;
boolean render_cond_cond = FALSE;
unsigned render_cond_mode = 0;
static void r600_destroy_context(struct pipe_context *context)
{
- struct r600_context *rctx = (struct r600_context *)context;
+ struct si_context *rctx = (struct si_context *)context;
si_release_all_descriptors(rctx);
static struct pipe_context *r600_create_context(struct pipe_screen *screen, void *priv)
{
- struct r600_context *rctx = CALLOC_STRUCT(r600_context);
- struct r600_screen* rscreen = (struct r600_screen *)screen;
+ struct si_context *rctx = CALLOC_STRUCT(si_context);
+ struct si_screen* rscreen = (struct si_screen *)screen;
int shader, i;
if (rctx == NULL)
static const char* r600_get_name(struct pipe_screen* pscreen)
{
- struct r600_screen *rscreen = (struct r600_screen *)pscreen;
+ struct si_screen *rscreen = (struct si_screen *)pscreen;
return r600_get_family_name(rscreen->b.family);
}
static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
{
- struct r600_screen *rscreen = (struct r600_screen *)pscreen;
+ struct si_screen *rscreen = (struct si_screen *)pscreen;
switch (param) {
/* Supported features (boolean caps). */
enum pipe_compute_cap param,
void *ret)
{
- struct r600_screen *rscreen = (struct r600_screen *)screen;
+ struct si_screen *rscreen = (struct si_screen *)screen;
//TODO: select these params by asic
switch (param) {
case PIPE_COMPUTE_CAP_IR_TARGET: {
static void r600_destroy_screen(struct pipe_screen* pscreen)
{
- struct r600_screen *rscreen = (struct r600_screen *)pscreen;
+ struct si_screen *rscreen = (struct si_screen *)pscreen;
if (rscreen == NULL)
return;
static uint64_t r600_get_timestamp(struct pipe_screen *screen)
{
- struct r600_screen *rscreen = (struct r600_screen*)screen;
+ struct si_screen *rscreen = (struct si_screen*)screen;
return 1000000 * rscreen->b.ws->query_value(rscreen->b.ws, RADEON_TIMESTAMP) /
rscreen->b.info.r600_clock_crystal_freq;
struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws)
{
- struct r600_screen *rscreen = CALLOC_STRUCT(r600_screen);
+ struct si_screen *rscreen = CALLOC_STRUCT(si_screen);
if (rscreen == NULL) {
return NULL;
}
struct si_pipe_compute;
-struct r600_screen {
+struct si_screen {
struct r600_common_screen b;
#if R600_TRACE_CS
struct r600_resource *trace_bo;
struct si_pipe_compute *program;
};
-struct r600_textures_info {
+struct si_textures_info {
struct si_sampler_views views;
struct si_pipe_sampler_state *samplers[NUM_TEX_UNITS];
unsigned n_views;
#define SI_NUM_ATOMS(rctx) (sizeof((rctx)->atoms)/sizeof((rctx)->atoms.array[0]))
#define SI_NUM_SHADERS (PIPE_SHADER_FRAGMENT+1)
-struct r600_context {
+struct si_context {
struct r600_common_context b;
struct blitter_context *blitter;
void *custom_dsa_flush_depth_stencil[8];
void *custom_dsa_flush_inplace;
void *custom_blend_resolve;
void *custom_blend_decompress;
- struct r600_screen *screen;
+ struct si_screen *screen;
union {
struct {
unsigned export_16bpc;
struct si_buffer_resources const_buffers[SI_NUM_SHADERS];
struct si_buffer_resources streamout_buffers;
- struct r600_textures_info samplers[SI_NUM_SHADERS];
+ struct si_textures_info samplers[SI_NUM_SHADERS];
struct r600_resource *border_color_table;
unsigned border_color_offset;
};
/* si_blit.c */
-void si_init_blit_functions(struct r600_context *rctx);
-void si_flush_depth_textures(struct r600_context *rctx,
- struct r600_textures_info *textures);
-void r600_decompress_color_textures(struct r600_context *rctx,
- struct r600_textures_info *textures);
+void si_init_blit_functions(struct si_context *rctx);
+void si_flush_depth_textures(struct si_context *rctx,
+ struct si_textures_info *textures);
+void r600_decompress_color_textures(struct si_context *rctx,
+ struct si_textures_info *textures);
/* si_buffer.c */
-void r600_upload_index_buffer(struct r600_context *rctx,
+void r600_upload_index_buffer(struct si_context *rctx,
struct pipe_index_buffer *ib, unsigned count);
const char *r600_get_llvm_processor_name(enum radeon_family family);
/* si_query.c */
-void r600_init_query_functions(struct r600_context *rctx);
+void r600_init_query_functions(struct si_context *rctx);
/* si_resource.c */
-void r600_init_context_resource_functions(struct r600_context *r600);
+void r600_init_context_resource_functions(struct si_context *r600);
/* si_translate.c */
-void r600_translate_index_buffer(struct r600_context *r600,
+void r600_translate_index_buffer(struct si_context *r600,
struct pipe_index_buffer *ib,
unsigned count);
#if R600_TRACE_CS
-void r600_trace_emit(struct r600_context *rctx);
+void r600_trace_emit(struct si_context *rctx);
#endif
/* si_compute.c */
-void si_init_compute_functions(struct r600_context *rctx);
+void si_init_compute_functions(struct si_context *rctx);
/* si_uvd.c */
struct pipe_video_codec *radeonsi_uvd_create_decoder(struct pipe_context *context,
state->cp_coher_cntl |= S_0085F0_TCL1_ACTION_ENA(1);
}
-void si_pm4_free_state(struct r600_context *rctx,
+void si_pm4_free_state(struct si_context *rctx,
struct si_pm4_state *state,
unsigned idx)
{
FREE(state);
}
-struct si_pm4_state * si_pm4_alloc_state(struct r600_context *rctx)
+struct si_pm4_state * si_pm4_alloc_state(struct si_context *rctx)
{
struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state);
return pm4;
}
-uint32_t si_pm4_sync_flags(struct r600_context *rctx)
+uint32_t si_pm4_sync_flags(struct si_context *rctx)
{
uint32_t cp_coher_cntl = 0;
return cp_coher_cntl;
}
-unsigned si_pm4_dirty_dw(struct r600_context *rctx)
+unsigned si_pm4_dirty_dw(struct si_context *rctx)
{
unsigned count = 0;
return count;
}
-void si_pm4_emit(struct r600_context *rctx, struct si_pm4_state *state)
+void si_pm4_emit(struct si_context *rctx, struct si_pm4_state *state)
{
struct radeon_winsys_cs *cs = rctx->b.rings.gfx.cs;
for (int i = 0; i < state->nbo; ++i) {
#endif
}
-void si_pm4_emit_dirty(struct r600_context *rctx)
+void si_pm4_emit_dirty(struct si_context *rctx)
{
for (int i = 0; i < NUMBER_OF_STATES; ++i) {
struct si_pm4_state *state = rctx->queued.array[i];
}
}
-void si_pm4_reset_emitted(struct r600_context *rctx)
+void si_pm4_reset_emitted(struct si_context *rctx)
{
memset(&rctx->emitted, 0, sizeof(rctx->emitted));
}
#define SI_PM4_MAX_RELOCS 4
// forward defines
-struct r600_context;
+struct si_context;
enum chip_class;
struct si_pm4_state
void si_pm4_inval_shader_cache(struct si_pm4_state *state);
void si_pm4_inval_texture_cache(struct si_pm4_state *state);
-void si_pm4_free_state(struct r600_context *rctx,
+void si_pm4_free_state(struct si_context *rctx,
struct si_pm4_state *state,
unsigned idx);
-struct si_pm4_state * si_pm4_alloc_state(struct r600_context *rctx);
+struct si_pm4_state * si_pm4_alloc_state(struct si_context *rctx);
-uint32_t si_pm4_sync_flags(struct r600_context *rctx);
-unsigned si_pm4_dirty_dw(struct r600_context *rctx);
-void si_pm4_emit(struct r600_context *rctx, struct si_pm4_state *state);
-void si_pm4_emit_dirty(struct r600_context *rctx);
-void si_pm4_reset_emitted(struct r600_context *rctx);
+uint32_t si_pm4_sync_flags(struct si_context *rctx);
+unsigned si_pm4_dirty_dw(struct si_context *rctx);
+void si_pm4_emit(struct si_context *rctx, struct si_pm4_state *state);
+void si_pm4_emit_dirty(struct si_context *rctx);
+void si_pm4_reset_emitted(struct si_context *rctx);
#endif
static struct pipe_query *r600_create_query(struct pipe_context *ctx, unsigned query_type)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
return (struct pipe_query*)r600_context_query_create(rctx, query_type);
}
static void r600_destroy_query(struct pipe_context *ctx, struct pipe_query *query)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
r600_context_query_destroy(rctx, (struct r600_query *)query);
}
static void r600_begin_query(struct pipe_context *ctx, struct pipe_query *query)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
struct r600_query *rquery = (struct r600_query *)query;
if (!si_query_needs_begin(rquery->type)) {
static void r600_end_query(struct pipe_context *ctx, struct pipe_query *query)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
struct r600_query *rquery = (struct r600_query *)query;
if (!si_query_needs_begin(rquery->type)) {
struct pipe_query *query,
boolean wait, union pipe_query_result *vresult)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
struct r600_query *rquery = (struct r600_query *)query;
return r600_context_query_result(rctx, rquery, wait, vresult);
boolean condition,
uint mode)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
struct r600_query *rquery = (struct r600_query *)query;
int wait_flag = 0;
}
}
-void r600_init_query_functions(struct r600_context *rctx)
+void r600_init_query_functions(struct si_context *rctx)
{
rctx->b.b.create_query = r600_create_query;
rctx->b.b.destroy_query = r600_destroy_query;
screen->resource_destroy = u_resource_destroy_vtbl;
}
-void r600_init_context_resource_functions(struct r600_context *r600)
+void r600_init_context_resource_functions(struct si_context *r600)
{
r600->b.b.transfer_map = u_transfer_map_vtbl;
r600->b.b.transfer_flush_region = u_default_transfer_flush_region;
void r600_init_screen_resource_functions(struct pipe_screen *screen);
-struct r600_context;
+struct si_context;
-void r600_upload_const_buffer(struct r600_context *rctx, struct r600_resource **rbuffer,
+void r600_upload_const_buffer(struct si_context *rctx, struct r600_resource **rbuffer,
const uint8_t *ptr, unsigned size,
uint32_t *const_offset);
}
}
-int si_compile_llvm(struct r600_context *rctx, struct si_pipe_shader *shader,
+int si_compile_llvm(struct si_context *rctx, struct si_pipe_shader *shader,
LLVMModuleRef mod)
{
unsigned i;
struct pipe_context *ctx,
struct si_pipe_shader *shader)
{
- struct r600_context *rctx = (struct r600_context*)ctx;
+ struct si_context *rctx = (struct si_context*)ctx;
struct si_pipe_shader_selector *sel = shader->selector;
struct si_shader_context si_shader_ctx;
struct tgsi_shader_info shader_info;
/* radeonsi_shader.c */
int si_pipe_shader_create(struct pipe_context *ctx, struct si_pipe_shader *shader);
int si_pipe_shader_create(struct pipe_context *ctx, struct si_pipe_shader *shader);
-int si_compile_llvm(struct r600_context *rctx, struct si_pipe_shader *shader,
+int si_compile_llvm(struct si_context *rctx, struct si_pipe_shader *shader,
LLVMModuleRef mod);
void si_pipe_shader_destroy(struct pipe_context *ctx, struct si_pipe_shader *shader);
#include "../radeon/r600_cs.h"
#include "sid.h"
-static uint32_t cik_num_banks(struct r600_screen *rscreen, unsigned bpe, unsigned tile_split)
+static uint32_t cik_num_banks(struct si_screen *rscreen, unsigned bpe, unsigned tile_split)
{
if (rscreen->b.info.cik_macrotile_mode_array_valid) {
unsigned index, tileb;
return bankwh;
}
-static unsigned cik_db_pipe_config(struct r600_screen *rscreen, unsigned tile_mode)
+static unsigned cik_db_pipe_config(struct si_screen *rscreen, unsigned tile_mode)
{
if (rscreen->b.info.si_tile_mode_array_valid) {
uint32_t gb_tile_mode = rscreen->b.info.si_tile_mode_array[tile_mode];
/*
* inferred framebuffer and blender state
*/
-static void si_update_fb_blend_state(struct r600_context *rctx)
+static void si_update_fb_blend_state(struct si_context *rctx)
{
struct si_pm4_state *pm4;
struct si_state_blend *blend = rctx->queued.named.blend;
static void si_bind_blend_state(struct pipe_context *ctx, void *state)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
si_pm4_bind_state(rctx, blend, (struct si_state_blend *)state);
si_update_fb_blend_state(rctx);
}
static void si_delete_blend_state(struct pipe_context *ctx, void *state)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
si_pm4_delete_state(rctx, blend, (struct si_state_blend *)state);
}
static void si_set_blend_color(struct pipe_context *ctx,
const struct pipe_blend_color *state)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
struct si_pm4_state *pm4 = si_pm4_alloc_state(rctx);
if (pm4 == NULL)
static void si_set_clip_state(struct pipe_context *ctx,
const struct pipe_clip_state *state)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
struct si_pm4_state *pm4 = si_pm4_alloc_state(rctx);
struct pipe_constant_buffer cb;
unsigned num_scissors,
const struct pipe_scissor_state *state)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
struct si_pm4_state *pm4 = si_pm4_alloc_state(rctx);
uint32_t tl, br;
unsigned num_viewports,
const struct pipe_viewport_state *state)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
struct si_state_viewport *viewport = CALLOC_STRUCT(si_state_viewport);
struct si_pm4_state *pm4 = &viewport->pm4;
/*
* inferred state between framebuffer and rasterizer
*/
-static void si_update_fb_rs_state(struct r600_context *rctx)
+static void si_update_fb_rs_state(struct si_context *rctx)
{
struct si_state_rasterizer *rs = rctx->queued.named.rasterizer;
struct si_pm4_state *pm4;
static void si_bind_rs_state(struct pipe_context *ctx, void *state)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
struct si_state_rasterizer *rs = (struct si_state_rasterizer *)state;
if (state == NULL)
static void si_delete_rs_state(struct pipe_context *ctx, void *state)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
si_pm4_delete_state(rctx, rasterizer, (struct si_state_rasterizer *)state);
}
/*
* infeered state between dsa and stencil ref
*/
-static void si_update_dsa_stencil_ref(struct r600_context *rctx)
+static void si_update_dsa_stencil_ref(struct si_context *rctx)
{
struct si_pm4_state *pm4 = si_pm4_alloc_state(rctx);
struct pipe_stencil_ref *ref = &rctx->stencil_ref;
static void si_set_pipe_stencil_ref(struct pipe_context *ctx,
const struct pipe_stencil_ref *state)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
rctx->stencil_ref = *state;
si_update_dsa_stencil_ref(rctx);
}
static void si_bind_dsa_state(struct pipe_context *ctx, void *state)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
struct si_state_dsa *dsa = state;
if (state == NULL)
static void si_delete_dsa_state(struct pipe_context *ctx, void *state)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
si_pm4_delete_state(rctx, dsa, (struct si_state_dsa *)state);
}
-static void *si_create_db_flush_dsa(struct r600_context *rctx, bool copy_depth,
+static void *si_create_db_flush_dsa(struct si_context *rctx, bool copy_depth,
bool copy_stencil, int sample)
{
struct pipe_depth_stencil_alpha_state dsa;
const struct util_format_description *desc,
int first_non_void)
{
- struct r600_screen *rscreen = (struct r600_screen*)screen;
+ struct si_screen *rscreen = (struct si_screen*)screen;
bool enable_s3tc = rscreen->b.info.drm_minor >= 31;
boolean uniform = TRUE;
int i;
unsigned sample_count,
unsigned usage)
{
- struct r600_screen *rscreen = (struct r600_screen *)screen;
+ struct si_screen *rscreen = (struct si_screen *)screen;
unsigned retval = 0;
if (target >= PIPE_MAX_TEXTURE_TYPES) {
* framebuffer handling
*/
-static void si_cb(struct r600_context *rctx, struct si_pm4_state *pm4,
+static void si_cb(struct si_context *rctx, struct si_pm4_state *pm4,
const struct pipe_framebuffer_state *state, int cb)
{
struct r600_texture *rtex;
}
}
-static void si_db(struct r600_context *rctx, struct si_pm4_state *pm4,
+static void si_db(struct si_context *rctx, struct si_pm4_state *pm4,
const struct pipe_framebuffer_state *state)
{
- struct r600_screen *rscreen = rctx->screen;
+ struct si_screen *rscreen = rctx->screen;
struct r600_texture *rtex;
struct r600_surface *surf;
unsigned level, pitch, slice, format, tile_mode_index, array_mode;
}
}
-static void si_set_msaa_state(struct r600_context *rctx, struct si_pm4_state *pm4, int nr_samples)
+static void si_set_msaa_state(struct si_context *rctx, struct si_pm4_state *pm4, int nr_samples)
{
unsigned max_dist = 0;
static void si_set_framebuffer_state(struct pipe_context *ctx,
const struct pipe_framebuffer_state *state)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
struct si_pm4_state *pm4 = si_pm4_alloc_state(rctx);
uint32_t tl, br;
int tl_x, tl_y, br_x, br_y, nr_samples, i;
struct si_pipe_shader_selector *sel,
union si_shader_key *key)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
memset(key, 0, sizeof(*key));
if (sel->type == PIPE_SHADER_VERTEX) {
static void si_bind_vs_shader(struct pipe_context *ctx, void *state)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
struct si_pipe_shader_selector *sel = state;
if (rctx->vs_shader == sel)
static void si_bind_ps_shader(struct pipe_context *ctx, void *state)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
struct si_pipe_shader_selector *sel = state;
if (rctx->ps_shader == sel)
static void si_delete_shader_selector(struct pipe_context *ctx,
struct si_pipe_shader_selector *sel)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
struct si_pipe_shader *p = sel->current, *c;
while (p) {
static void si_delete_vs_shader(struct pipe_context *ctx, void *state)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
struct si_pipe_shader_selector *sel = (struct si_pipe_shader_selector *)state;
if (rctx->vs_shader == sel) {
static void si_delete_ps_shader(struct pipe_context *ctx, void *state)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
struct si_pipe_shader_selector *sel = (struct si_pipe_shader_selector *)state;
if (rctx->ps_shader == sel) {
unsigned count,
struct pipe_sampler_view **views)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
- struct r600_textures_info *samplers = &rctx->samplers[shader];
+ struct si_context *rctx = (struct si_context *)ctx;
+ struct si_textures_info *samplers = &rctx->samplers[shader];
struct si_pipe_sampler_view **rviews = (struct si_pipe_sampler_view **)views;
int i;
rctx->b.flags |= R600_CONTEXT_INV_TEX_CACHE;
}
-static struct si_pm4_state *si_set_sampler_states(struct r600_context *rctx, unsigned count,
+static struct si_pm4_state *si_set_sampler_states(struct si_context *rctx, unsigned count,
void **states,
- struct r600_textures_info *samplers,
+ struct si_textures_info *samplers,
unsigned user_data_reg)
{
struct si_pipe_sampler_state **rstates = (struct si_pipe_sampler_state **)states;
static void si_bind_vs_sampler_states(struct pipe_context *ctx, unsigned count, void **states)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
struct si_pm4_state *pm4;
pm4 = si_set_sampler_states(rctx, count, states, &rctx->samplers[PIPE_SHADER_VERTEX],
static void si_bind_ps_sampler_states(struct pipe_context *ctx, unsigned count, void **states)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
struct si_pm4_state *pm4;
pm4 = si_set_sampler_states(rctx, count, states, &rctx->samplers[PIPE_SHADER_FRAGMENT],
static void si_set_sample_mask(struct pipe_context *ctx, unsigned sample_mask)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
struct si_pm4_state *pm4 = si_pm4_alloc_state(rctx);
uint16_t mask = sample_mask;
static void si_bind_vertex_elements(struct pipe_context *ctx, void *state)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
struct si_vertex_element *v = (struct si_vertex_element*)state;
rctx->vertex_elements = v;
static void si_delete_vertex_element(struct pipe_context *ctx, void *state)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
if (rctx->vertex_elements == state)
rctx->vertex_elements = NULL;
static void si_set_vertex_buffers(struct pipe_context *ctx, unsigned start_slot, unsigned count,
const struct pipe_vertex_buffer *buffers)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
util_set_vertex_buffers_count(rctx->vertex_buffer, &rctx->nr_vertex_buffers, buffers, start_slot, count);
}
static void si_set_index_buffer(struct pipe_context *ctx,
const struct pipe_index_buffer *ib)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
if (ib) {
pipe_resource_reference(&rctx->index_buffer.buffer, ib->buffer);
static void si_texture_barrier(struct pipe_context *ctx)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
rctx->b.flags |= R600_CONTEXT_INV_TEX_CACHE |
R600_CONTEXT_FLUSH_AND_INV_CB;
}
-static void *si_create_blend_custom(struct r600_context *rctx, unsigned mode)
+static void *si_create_blend_custom(struct si_context *rctx, unsigned mode)
{
struct pipe_blend_state blend;
return FALSE;
}
-void si_init_state_functions(struct r600_context *rctx)
+void si_init_state_functions(struct si_context *rctx)
{
int i;
rctx->b.b.draw_vbo = si_draw_vbo;
}
-void si_init_config(struct r600_context *rctx)
+void si_init_config(struct si_context *rctx)
{
struct si_pm4_state *pm4 = si_pm4_alloc_state(rctx);
} while(0)
/* si_descriptors.c */
-void si_set_sampler_view(struct r600_context *rctx, unsigned shader,
+void si_set_sampler_view(struct si_context *rctx, unsigned shader,
unsigned slot, struct pipe_sampler_view *view,
unsigned *view_desc);
-void si_init_all_descriptors(struct r600_context *rctx);
-void si_release_all_descriptors(struct r600_context *rctx);
-void si_all_descriptors_begin_new_cs(struct r600_context *rctx);
-void si_copy_buffer(struct r600_context *rctx,
+void si_init_all_descriptors(struct si_context *rctx);
+void si_release_all_descriptors(struct si_context *rctx);
+void si_all_descriptors_begin_new_cs(struct si_context *rctx);
+void si_copy_buffer(struct si_context *rctx,
struct pipe_resource *dst, struct pipe_resource *src,
uint64_t dst_offset, uint64_t src_offset, unsigned size);
int si_shader_select(struct pipe_context *ctx,
struct si_pipe_shader_selector *sel,
unsigned *dirty);
-void si_init_state_functions(struct r600_context *rctx);
-void si_init_config(struct r600_context *rctx);
+void si_init_state_functions(struct si_context *rctx);
+void si_init_config(struct si_context *rctx);
/* si_state_draw.c */
extern const struct r600_atom si_atom_cache_flush;
static void si_pipe_shader_vs(struct pipe_context *ctx, struct si_pipe_shader *shader)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
struct si_pm4_state *pm4;
unsigned num_sgprs, num_user_sgprs;
unsigned nparams, i, vgpr_comp_cnt;
static void si_pipe_shader_ps(struct pipe_context *ctx, struct si_pipe_shader *shader)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
struct si_pm4_state *pm4;
unsigned i, exports_ps, spi_ps_in_control, db_shader_control;
unsigned num_sgprs, num_user_sgprs;
return prim_conv[mode];
}
-static bool si_update_draw_info_state(struct r600_context *rctx,
+static bool si_update_draw_info_state(struct si_context *rctx,
const struct pipe_draw_info *info,
const struct pipe_index_buffer *ib)
{
return true;
}
-static void si_update_spi_map(struct r600_context *rctx)
+static void si_update_spi_map(struct si_context *rctx)
{
struct si_shader *ps = &rctx->ps_shader->current->shader;
struct si_shader *vs = &rctx->vs_shader->current->shader;
si_pm4_set_state(rctx, spi, pm4);
}
-static void si_update_derived_state(struct r600_context *rctx)
+static void si_update_derived_state(struct si_context *rctx)
{
struct pipe_context * ctx = (struct pipe_context*)rctx;
unsigned vs_dirty = 0, ps_dirty = 0;
}
}
-static void si_vertex_buffer_update(struct r600_context *rctx)
+static void si_vertex_buffer_update(struct si_context *rctx)
{
struct pipe_context *ctx = &rctx->b.b;
struct si_pm4_state *pm4 = si_pm4_alloc_state(rctx);
si_pm4_set_state(rctx, vertex_buffers, pm4);
}
-static void si_state_draw(struct r600_context *rctx,
+static void si_state_draw(struct si_context *rctx,
const struct pipe_draw_info *info,
const struct pipe_index_buffer *ib)
{
void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
{
- struct r600_context *rctx = (struct r600_context *)ctx;
+ struct si_context *rctx = (struct si_context *)ctx;
struct pipe_index_buffer ib = {};
uint32_t i;
#include "si_pipe.h"
-void r600_translate_index_buffer(struct r600_context *r600,
+void r600_translate_index_buffer(struct si_context *r600,
struct pipe_index_buffer *ib,
unsigned count)
{
struct pipe_video_buffer *radeonsi_video_buffer_create(struct pipe_context *pipe,
const struct pipe_video_buffer *tmpl)
{
- struct r600_context *ctx = (struct r600_context *)pipe;
+ struct si_context *ctx = (struct si_context *)pipe;
struct r600_texture *resources[VL_NUM_COMPONENTS] = {};
struct radeon_surface *surfaces[VL_NUM_COMPONENTS] = {};
struct pb_buffer **pbs[VL_NUM_COMPONENTS] = {};