Only very few places where realy converted so there isa lot of to do.
endif
RADEON_COMMON_SOURCES = \
- radeon_texture.c \
+ radeon_bo_legacy.c \
radeon_common_context.c \
radeon_common.c \
+ radeon_cs_legacy.c \
radeon_dma.c \
+ radeon_debug.c \
+ radeon_fbo.c \
radeon_lock.c \
- radeon_bo_legacy.c \
- radeon_cs_legacy.c \
radeon_mipmap_tree.c \
+ radeon_queryobj.c \
radeon_span.c \
- radeon_fbo.c \
- radeon_queryobj.c
+ radeon_texture.c
DRIVER_SOURCES = r200_context.c \
radeonEmitState(&rmesa->radeon);
- if (R200_DEBUG & (DEBUG_IOCTL|DEBUG_PRIMS))
- fprintf(stderr, "%s cmd_used/4: %d prim %x nr %d\n", __FUNCTION__,
- rmesa->store.cmd_used/4, primitive, vertex_nr);
+ radeon_print(RADEON_RENDER|RADEON_SWRENDER,RADEON_VERBOSE,
+ "%s cmd_used/4: %d prim %x nr %d\n", __FUNCTION__,
+ rmesa->store.cmd_used/4, primitive, vertex_nr);
BEGIN_BATCH(3);
OUT_BATCH_PACKET3_CLIP(R200_CP_CMD_3D_DRAW_VBUF_2, 0);
r200ContextPtr rmesa = R200_CONTEXT(ctx);
int nr, elt_used = rmesa->tcl.elt_used;
- if (R200_DEBUG & (DEBUG_IOCTL|DEBUG_PRIMS))
- fprintf(stderr, "%s %x %d\n", __FUNCTION__, rmesa->tcl.hw_primitive, elt_used);
+ radeon_print(RADEON_RENDER, RADEON_VERBOSE, "%s %x %d\n", __FUNCTION__, rmesa->tcl.hw_primitive, elt_used);
assert( rmesa->radeon.dma.flush == r200FlushElts );
rmesa->radeon.dma.flush = NULL;
if (R200_ELT_BUF_SZ > elt_used)
radeonReturnDmaRegion(&rmesa->radeon, R200_ELT_BUF_SZ - elt_used);
- if (R200_DEBUG & DEBUG_SYNC) {
- fprintf(stderr, "%s: Syncing\n", __FUNCTION__);
+ if (radeon_is_debug_enabled(RADEON_SYNC, RADEON_CRITICAL)) {
+ radeon_print(RADEON_SYNC, RADEON_NORMAL, "%s: Syncing\n", __FUNCTION__);
radeonFinish( rmesa->radeon.glCtx );
}
}
{
GLushort *retval;
- if (R200_DEBUG & DEBUG_IOCTL)
- fprintf(stderr, "%s %d prim %x\n", __FUNCTION__, min_nr, primitive);
+ radeon_print(RADEON_RENDER, RADEON_VERBOSE, "%s %d prim %x\n", __FUNCTION__, min_nr, primitive);
assert((primitive & R200_VF_PRIM_WALK_IND));
radeon_bo_map(rmesa->radeon.tcl.elt_dma_bo, 1);
retval = rmesa->radeon.tcl.elt_dma_bo->ptr + rmesa->radeon.tcl.elt_dma_offset;
- if (R200_DEBUG & DEBUG_PRIMS)
- fprintf(stderr, "%s: header prim %x \n",
- __FUNCTION__, primitive);
-
assert(!rmesa->radeon.dma.flush);
rmesa->radeon.glCtx->Driver.NeedFlush |= FLUSH_STORED_VERTICES;
rmesa->radeon.dma.flush = r200FlushElts;
{
BATCH_LOCALS(&rmesa->radeon);
- if (R200_DEBUG & (DEBUG_PRIMS|DEBUG_IOCTL))
- fprintf(stderr, "%s: vertex_size 0x%x offset 0x%x \n",
+ radeon_print(RADEON_SWRENDER, RADEON_VERBOSE, "%s: vertex_size 0x%x offset 0x%x \n",
__FUNCTION__, vertex_size, offset);
int sz = 1 + (nr >> 1) * 3 + (nr & 1) * 2;
int i;
- if (RADEON_DEBUG & DEBUG_VERTS)
- fprintf(stderr, "%s: nr=%d, ofs=0x%08x\n", __FUNCTION__, nr,
- offset);
+ radeon_print(RADEON_RENDER, RADEON_VERBOSE,
+ "%s: nr=%d, ofs=0x%08x\n",
+ __FUNCTION__, nr, offset);
BEGIN_BATCH(sz+2+ (nr*2));
OUT_BATCH_PACKET3(R200_CP_CMD_3D_LOAD_VBPNTR, sz - 1);
functions->GetString = r200GetString;
}
-static const struct dri_debug_control debug_control[] =
-{
- { "fall", DEBUG_FALLBACKS },
- { "tex", DEBUG_TEXTURE },
- { "ioctl", DEBUG_IOCTL },
- { "prim", DEBUG_PRIMS },
- { "vert", DEBUG_VERTS },
- { "state", DEBUG_STATE },
- { "code", DEBUG_CODEGEN },
- { "vfmt", DEBUG_VFMT },
- { "vtxf", DEBUG_VFMT },
- { "verb", DEBUG_VERBOSE },
- { "dri", DEBUG_DRI },
- { "dma", DEBUG_DMA },
- { "san", DEBUG_SANITY },
- { "sync", DEBUG_SYNC },
- { "pix", DEBUG_PIXEL },
- { "mem", DEBUG_MEMORY },
- { NULL, 0 }
-};
static void r200_get_lock(radeonContextPtr radeon)
{
rmesa->prefer_gart_client_texturing =
(getenv("R200_GART_CLIENT_TEXTURES") != 0);
-#if DO_DEBUG
- R200_DEBUG = driParseDebugString( getenv( "R200_DEBUG" ),
- debug_control );
- R200_DEBUG |= driParseDebugString( getenv( "RADEON_DEBUG" ),
- debug_control );
-#endif
-
tcl_mode = driQueryOptioni(&rmesa->radeon.optionCache, "tcl_mode");
if (driQueryOptionb(&rmesa->radeon.optionCache, "no_rast")) {
fprintf(stderr, "disabling 3D acceleration\n");
GLuint color_mask = 0;
GLuint orig_mask = mask;
- if ( R200_DEBUG & DEBUG_IOCTL ) {
+ if ( R200_DEBUG & RADEON_IOCTL ) {
if (rmesa->radeon.sarea)
fprintf( stderr, "r200Clear %x %d\n", mask, rmesa->radeon.sarea->pfCurrentPage);
else
}
if ( mask ) {
- if (R200_DEBUG & DEBUG_FALLBACKS)
+ if (R200_DEBUG & RADEON_FALLBACKS)
fprintf(stderr, "%s: swrast clear, mask: %x\n", __FUNCTION__, mask);
_swrast_Clear( ctx, mask );
}
drm_radeon_mem_alloc_t alloc;
int ret;
- if (R200_DEBUG & DEBUG_IOCTL)
+ if (R200_DEBUG & RADEON_IOCTL)
fprintf(stderr, "%s sz %d %f/%f/%f\n", __FUNCTION__, size, readfreq,
writefreq, priority);
drm_radeon_mem_free_t memfree;
int ret;
- if (R200_DEBUG & DEBUG_IOCTL)
+ if (R200_DEBUG & RADEON_IOCTL)
fprintf(stderr, "%s %p\n", __FUNCTION__, pointer);
if (!ctx || !(rmesa = R200_CONTEXT(ctx)) || !rmesa->radeon.radeonScreen->gartTextures.map) {
offset >= 0 &&
offset + size < rmesa->radeon.radeonScreen->gartTextures.size);
- if (R200_DEBUG & DEBUG_IOCTL)
+ if (R200_DEBUG & RADEON_IOCTL)
fprintf(stderr, "r200IsGartMemory( %p ) : %d\n", pointer, valid );
return valid;
r200ContextPtr rmesa = R200_CONTEXT(ctx);
GLuint cpp = rmesa->radeon.radeonScreen->cpp;
- if (R200_DEBUG & DEBUG_PIXEL)
+ if (R200_DEBUG & RADEON_PIXEL)
fprintf(stderr, "%s\n", __FUNCTION__);
if ( (pitch & 63) ||
ctx->_ImageTransferState ||
packing->SwapBytes ||
packing->LsbFirst) {
- if (R200_DEBUG & DEBUG_PIXEL)
+ if (R200_DEBUG & RADEON_PIXEL)
fprintf(stderr, "%s: failed 1\n", __FUNCTION__);
return GL_FALSE;
}
if ( type == GL_UNSIGNED_INT_8_8_8_8_REV &&
cpp == 4 &&
format == GL_BGRA ) {
- if (R200_DEBUG & DEBUG_PIXEL)
+ if (R200_DEBUG & RADEON_PIXEL)
fprintf(stderr, "%s: passed 2\n", __FUNCTION__);
return GL_TRUE;
}
- if (R200_DEBUG & DEBUG_PIXEL)
+ if (R200_DEBUG & RADEON_PIXEL)
fprintf(stderr, "%s: failed\n", __FUNCTION__);
return GL_FALSE;
GLuint cpp = rmesa->radeon.radeonScreen->cpp;
GLint size = width * height * cpp;
- if (R200_DEBUG & DEBUG_PIXEL)
+ if (R200_DEBUG & RADEON_PIXEL)
fprintf(stderr, "%s\n", __FUNCTION__);
/* Only accelerate reading to GART buffers.
*/
if ( !r200IsGartMemory(rmesa, pixels,
pitch * height * rmesa->radeon.radeonScreen->cpp ) ) {
- if (R200_DEBUG & DEBUG_PIXEL)
+ if (R200_DEBUG & RADEON_PIXEL)
fprintf(stderr, "%s: dest not GART\n", __FUNCTION__);
}
* blitter:
*/
if (!pack->Invert) {
- if (R200_DEBUG & DEBUG_PIXEL)
+ if (R200_DEBUG & RADEON_PIXEL)
fprintf(stderr, "%s: MESA_PACK_INVERT not set\n", __FUNCTION__);
return GL_FALSE;
}
if (!clip_pixelrect(ctx, ctx->ReadBuffer, &x, &y, &width, &height,
&size)) {
UNLOCK_HARDWARE( &rmesa->radeon );
- if (R200_DEBUG & DEBUG_PIXEL)
+ if (R200_DEBUG & RADEON_PIXEL)
fprintf(stderr, "%s totally clipped -- nothing to do\n",
__FUNCTION__);
return GL_TRUE;
y += dPriv->y;
- if (R200_DEBUG & DEBUG_PIXEL)
+ if (R200_DEBUG & RADEON_PIXEL)
fprintf(stderr, "readpixel blit src_pitch %d dst_pitch %d\n",
src_pitch, dst_pitch);
const struct gl_pixelstore_attrib *pack,
GLvoid *pixels )
{
- if (R200_DEBUG & DEBUG_PIXEL)
+ if (R200_DEBUG & RADEON_PIXEL)
fprintf(stderr, "%s\n", __FUNCTION__);
if (!r200TryReadPixels( ctx, x, y, width, height, format, type, pack,
const void *pixels,
GLuint planemask)
{
- if (R200_DEBUG & DEBUG_PIXEL)
+ if (R200_DEBUG & RADEON_PIXEL)
fprintf(stderr, "%s\n", __FUNCTION__);
#if 0
GLuint cpp = rmesa->radeon.radeonScreen->cpp;
GLint size = height * pitch * cpp;
- if (R200_DEBUG & DEBUG_PIXEL)
+ if (R200_DEBUG & RADEON_PIXEL)
fprintf(stderr, "%s\n", __FUNCTION__);
/* check that we're drawing to exactly one color buffer */
/* Can't do conversions on GART reads/draws.
*/
if ( !r200IsGartMemory( rmesa, pixels, size ) ) {
- if (R200_DEBUG & DEBUG_PIXEL)
+ if (R200_DEBUG & RADEON_PIXEL)
fprintf(stderr, "%s: not GART memory\n", __FUNCTION__);
return GL_FALSE;
}
const struct gl_pixelstore_attrib *unpack,
const GLvoid *pixels )
{
- if (R200_DEBUG & DEBUG_PIXEL)
+ if (R200_DEBUG & RADEON_PIXEL)
fprintf(stderr, "%s\n", __FUNCTION__);
if (!r200TryDrawPixels( ctx, x, y, width, height, format, type,
#define MORE_VERBOSE 1
#if MORE_VERBOSE
-#define VERBOSE (R200_DEBUG & DEBUG_VERBOSE)
+#define VERBOSE (R200_DEBUG & RADEON_VERBOSE)
#define NORMAL (1)
#else
#define VERBOSE 0
-#define NORMAL (R200_DEBUG & DEBUG_VERBOSE)
+#define NORMAL (R200_DEBUG & RADEON_VERBOSE)
#endif
if (ctx->Light.ColorMaterialEnabled)
mask &= ~ctx->Light.ColorMaterialBitmask;
- if (R200_DEBUG & DEBUG_STATE)
+ if (R200_DEBUG & RADEON_STATE)
fprintf(stderr, "%s\n", __FUNCTION__);
if (mask & MAT_BIT_FRONT_EMISSION) {
r200ContextPtr rmesa = R200_CONTEXT(ctx);
GLuint p, flag;
- if ( R200_DEBUG & DEBUG_STATE )
+ if ( R200_DEBUG & RADEON_STATE )
fprintf( stderr, "%s( %s = %s )\n", __FUNCTION__,
_mesa_lookup_enum_by_nr( cap ),
state ? "GL_TRUE" : "GL_FALSE" );
r200ContextPtr rmesa = R200_CONTEXT(ctx);
GLboolean tmp;
- if (R200_DEBUG & DEBUG_STATE)
+ if (R200_DEBUG & RADEON_STATE)
fprintf(stderr, "%s %d BEFORE %x\n", __FUNCTION__, ctx->_NeedEyeCoords,
rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL_0]);
rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL_0] &= ~R200_RESCALE_NORMALS;
}
- if (R200_DEBUG & DEBUG_STATE)
+ if (R200_DEBUG & RADEON_STATE)
fprintf(stderr, "%s %d AFTER %x\n", __FUNCTION__, ctx->_NeedEyeCoords,
rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL_0]);
}
GLuint compsel = rmesa->hw.vtx.cmd[VTX_TCL_OUTPUT_COMPSEL];
int unit;
- if (R200_DEBUG & DEBUG_STATE)
+ if (R200_DEBUG & RADEON_STATE)
fprintf(stderr, "%s before COMPSEL: %x\n", __FUNCTION__,
rmesa->hw.vtx.cmd[VTX_TCL_OUTPUT_COMPSEL]);
struct radeon_dma_bo *dma_bo;
int i, ret;
- if (RADEON_DEBUG & DEBUG_IOCTL)
+ if (RADEON_DEBUG & RADEON_IOCTL)
fprintf(stderr, "%s\n", __FUNCTION__);
radeon_cs_space_reset_bos(rmesa->radeon.cmdbuf.cs);
static void r200_predict_emit_size( r200ContextPtr rmesa )
{
- if (RADEON_DEBUG & DEBUG_VERTS)
+ if (RADEON_DEBUG & RADEON_VERTS)
fprintf(stderr, "%s\n", __func__);
const int vertex_array_size = 7;
const int prim_size = 3;
static void r200RenderStart( GLcontext *ctx )
{
r200SetVertexFormat( ctx );
- if (RADEON_DEBUG & DEBUG_VERTS)
+ if (RADEON_DEBUG & RADEON_VERTS)
fprintf(stderr, "%s\n", __func__);
}
void r200_swtcl_flush(GLcontext *ctx, uint32_t current_offset)
{
r200ContextPtr rmesa = R200_CONTEXT(ctx);
- if (RADEON_DEBUG & DEBUG_VERTS)
+ if (RADEON_DEBUG & RADEON_VERTS)
fprintf(stderr, "%s\n", __func__);
const char *r200verts = (char *)rmesa->radeon.swtcl.verts;
#define VERT(x) (radeonVertex *)(r200verts + ((x) * vertsize * sizeof(int)))
#define VERTEX radeonVertex
-#define DO_DEBUG_VERTS (1 && (R200_DEBUG & DEBUG_VERTS))
+#define DO_DEBUG_VERTS (1 && (R200_DEBUG & RADEON_VERTS))
#undef TAG
#define TAG(x) r200_##x
TCL_FALLBACK( ctx, R200_TCL_FALLBACK_RASTER, GL_TRUE );
_swsetup_Wakeup( ctx );
rmesa->radeon.swtcl.RenderIndex = ~0;
- if (R200_DEBUG & DEBUG_FALLBACKS) {
+ if (R200_DEBUG & RADEON_FALLBACKS) {
fprintf(stderr, "R200 begin rasterization fallback: 0x%x %s\n",
bit, getFallbackString(bit));
}
r200ChooseVertexState( ctx );
r200ChooseRenderState( ctx );
}
- if (R200_DEBUG & DEBUG_FALLBACKS) {
+ if (R200_DEBUG & RADEON_FALLBACKS) {
fprintf(stderr, "R200 end rasterization fallback: 0x%x %s\n",
bit, getFallbackString(bit));
}
}
}
- if (RADEON_DEBUG & DEBUG_PRIMS)
- fprintf(stderr, "%s space %u, aos %d\n", __func__, space_required, AOS_BUFSZ(nr_aos) );
+ radeon_print(RADEON_RENDER,RADEON_VERBOSE,
+ "%s space %u, aos %d\n",
+ __func__, space_required, AOS_BUFSZ(nr_aos) );
/* flush the buffer in case we need more than is left. */
if (rcommonEnsureCmdBufSpace(&rmesa->radeon, space_required + state_size, __FUNCTION__))
return space_required + radeonCountStateEmitSize( &rmesa->radeon );
if (rmesa->radeon.TclFallback)
return GL_TRUE; /* fallback to software t&l */
- if (R200_DEBUG & DEBUG_PRIMS)
- fprintf(stderr, "%s\n", __FUNCTION__);
+ radeon_print(RADEON_RENDER, RADEON_NORMAL, "%s\n", __FUNCTION__);
if (VB->Count == 0)
return GL_FALSE;
rmesa->hw.vte.cmd[VTE_SE_VTE_CNTL] &= ~(R200_VTX_XY_FMT|R200_VTX_Z_FMT);
rmesa->hw.vte.cmd[VTE_SE_VTE_CNTL] |= R200_VTX_W0_FMT;
- if (R200_DEBUG & DEBUG_FALLBACKS)
+ if (R200_DEBUG & RADEON_FALLBACKS)
fprintf(stderr, "R200 end tcl fallback\n");
}
if (mode) {
rmesa->radeon.TclFallback |= bit;
if (oldfallback == 0) {
- if (R200_DEBUG & DEBUG_FALLBACKS)
+ if (R200_DEBUG & RADEON_FALLBACKS)
fprintf(stderr, "R200 begin tcl fallback %s\n",
getFallbackString( bit ));
transition_to_swtnl( ctx );
else {
rmesa->radeon.TclFallback &= ~bit;
if (oldfallback == bit) {
- if (R200_DEBUG & DEBUG_FALLBACKS)
+ if (R200_DEBUG & RADEON_FALLBACKS)
fprintf(stderr, "R200 end tcl fallback %s\n",
getFallbackString( bit ));
transition_to_hwtnl( ctx );
GLuint unit = ctx->Texture.CurrentUnit;
struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit];
- if ( R200_DEBUG & DEBUG_STATE ) {
+ if ( R200_DEBUG & RADEON_STATE ) {
fprintf( stderr, "%s( %s )\n",
__FUNCTION__, _mesa_lookup_enum_by_nr( pname ) );
}
{
radeonTexObj* t = radeon_tex_obj(texObj);
- if ( R200_DEBUG & (DEBUG_STATE|DEBUG_TEXTURE) ) {
+ if ( R200_DEBUG & (RADEON_STATE|RADEON_TEXTURE) ) {
fprintf( stderr, "%s( %s )\n", __FUNCTION__,
_mesa_lookup_enum_by_nr( pname ) );
}
r200ContextPtr rmesa = R200_CONTEXT(ctx);
radeonTexObj* t = radeon_tex_obj(texObj);
- if (RADEON_DEBUG & (DEBUG_STATE | DEBUG_TEXTURE)) {
+ if (RADEON_DEBUG & (RADEON_STATE | RADEON_TEXTURE)) {
fprintf(stderr, "%s( %p (target = %s) )\n", __FUNCTION__,
(void *)texObj,
_mesa_lookup_enum_by_nr(texObj->Target));
radeonTexObj* t = CALLOC_STRUCT(radeon_tex_obj);
- if (RADEON_DEBUG & (DEBUG_STATE | DEBUG_TEXTURE)) {
+ if (RADEON_DEBUG & (RADEON_STATE | RADEON_TEXTURE)) {
fprintf(stderr, "%s( %p (target = %s) )\n", __FUNCTION__,
t, _mesa_lookup_enum_by_nr(target));
}
assert( (texUnit->_ReallyEnabled == 0)
|| (texUnit->_Current != NULL) );
- if ( R200_DEBUG & DEBUG_TEXTURE ) {
+ if ( R200_DEBUG & RADEON_TEXTURE ) {
fprintf( stderr, "%s( %p, %d )\n", __FUNCTION__, (void *)ctx, unit );
}
}
if (mixed_fallback) {
- if (R200_DEBUG & DEBUG_FALLBACKS)
+ if (R200_DEBUG & RADEON_FALLBACKS)
fprintf(stderr, "fallback mixed texgen, 0x%x (0x%x 0x%x 0x%x 0x%x)\n",
texUnit->TexGenEnabled, texUnit->GenS.Mode, texUnit->GenT.Mode,
texUnit->GenR.Mode, texUnit->GenQ.Mode);
texUnit->GenR.ObjectPlane,
texUnit->GenQ.ObjectPlane );
if (needtgenable & (S_BIT | T_BIT)) {
- if (R200_DEBUG & DEBUG_FALLBACKS)
+ if (R200_DEBUG & RADEON_FALLBACKS)
fprintf(stderr, "fallback mixed texgen / obj plane, 0x%x\n",
texUnit->TexGenEnabled);
return GL_FALSE;
texUnit->GenR.EyePlane,
texUnit->GenQ.EyePlane );
if (needtgenable & (S_BIT | T_BIT)) {
- if (R200_DEBUG & DEBUG_FALLBACKS)
+ if (R200_DEBUG & RADEON_FALLBACKS)
fprintf(stderr, "fallback mixed texgen / eye plane, 0x%x\n",
texUnit->TexGenEnabled);
return GL_FALSE;
default:
/* Unsupported mode, fallback:
*/
- if (R200_DEBUG & DEBUG_FALLBACKS)
+ if (R200_DEBUG & RADEON_FALLBACKS)
fprintf(stderr, "fallback unsupported texgen, %d\n",
texUnit->GenS.Mode);
return GL_FALSE;
~(VERT_BIT_POS | VERT_BIT_NORMAL | VERT_BIT_COLOR0 | VERT_BIT_COLOR1 |
VERT_BIT_FOG | VERT_BIT_TEX0 | VERT_BIT_TEX1 | VERT_BIT_TEX2 |
VERT_BIT_TEX3 | VERT_BIT_TEX4 | VERT_BIT_TEX5)) != 0) {
- if (R200_DEBUG & DEBUG_FALLBACKS) {
+ if (R200_DEBUG & RADEON_FALLBACKS) {
fprintf(stderr, "can't handle vert prog inputs 0x%x\n",
mesa_vp->Base.InputsRead);
}
(1 << VERT_RESULT_FOGC) | (1 << VERT_RESULT_TEX0) | (1 << VERT_RESULT_TEX1) |
(1 << VERT_RESULT_TEX2) | (1 << VERT_RESULT_TEX3) | (1 << VERT_RESULT_TEX4) |
(1 << VERT_RESULT_TEX5) | (1 << VERT_RESULT_PSIZ))) != 0) {
- if (R200_DEBUG & DEBUG_FALLBACKS) {
+ if (R200_DEBUG & RADEON_FALLBACKS) {
fprintf(stderr, "can't handle vert prog outputs 0x%x\n",
mesa_vp->Base.OutputsWritten);
}
if (mesa_vp->Base.InputsRead & (1 << i)) {
array_count++;
if (array_count > 12) {
- if (R200_DEBUG & DEBUG_FALLBACKS) {
+ if (R200_DEBUG & RADEON_FALLBACKS) {
fprintf(stderr, "more than 12 attribs used in vert prog\n");
}
return GL_FALSE;
}
if (!(mesa_vp->Base.OutputsWritten & (1 << VERT_RESULT_HPOS))) {
- if (R200_DEBUG & DEBUG_FALLBACKS) {
+ if (R200_DEBUG & RADEON_FALLBACKS) {
fprintf(stderr, "can't handle vert prog without position output\n");
}
return GL_FALSE;
}
if (free_inputs & 1) {
- if (R200_DEBUG & DEBUG_FALLBACKS) {
+ if (R200_DEBUG & RADEON_FALLBACKS) {
fprintf(stderr, "can't handle vert prog without position input\n");
}
return GL_FALSE;
mesa_vp->Base.NumTemporaries + u_temp_used;
}
if ((mesa_vp->Base.NumTemporaries + u_temp_used) > R200_VSF_MAX_TEMPS) {
- if (R200_DEBUG & DEBUG_FALLBACKS) {
+ if (R200_DEBUG & RADEON_FALLBACKS) {
fprintf(stderr, "Ran out of temps, num temps %d, us %d\n", mesa_vp->Base.NumTemporaries, u_temp_used);
}
return GL_FALSE;
u_temp_i = R200_VSF_MAX_TEMPS - 1;
if(o_inst - vp->instr >= R200_VSF_MAX_INST) {
mesa_vp->Base.NumNativeInstructions = 129;
- if (R200_DEBUG & DEBUG_FALLBACKS) {
+ if (R200_DEBUG & RADEON_FALLBACKS) {
fprintf(stderr, "more than 128 native instructions\n");
}
return GL_FALSE;