#define IRIS_DIRTY_BLEND_STATE (1ull << 7)
#define IRIS_DIRTY_RASTER (1ull << 8)
#define IRIS_DIRTY_CLIP (1ull << 9)
-#define IRIS_DIRTY_SCISSOR (1ull << 10)
+// XXX: define IRIS_DIRTY_ (1ull << 10)
#define IRIS_DIRTY_LINE_STIPPLE (1ull << 11)
#define IRIS_DIRTY_VERTEX_ELEMENTS (1ull << 12)
#define IRIS_DIRTY_MULTISAMPLE (1ull << 13)
{
assert(cache_id <= MESA_SHADER_STAGES);
- // XXX: ugly
+ // XXX: ugly...
+ // XXX: CLIP: toggle if barycentric modes has any NONPERSPECTIVE or not
if (cache_id == IRIS_CACHE_FS)
- return IRIS_DIRTY_WM | IRIS_DIRTY_FS;
+ return IRIS_DIRTY_WM | IRIS_DIRTY_FS | IRIS_DIRTY_CLIP;
return IRIS_DIRTY_VS << cache_id;
}
ice->state.cso_rast = new_cso;
ice->state.dirty |= IRIS_DIRTY_RASTER;
+ ice->state.dirty |= IRIS_DIRTY_CLIP;
}
static uint32_t
ice->state.dirty |= IRIS_DIRTY_BLEND_STATE;
}
+ if ((cso->layers == 0) == (state->layers == 0)) {
+ ice->state.dirty |= IRIS_DIRTY_CLIP;
+ }
+
util_copy_framebuffer_state(cso, state);
struct iris_depth_buffer_state *cso_z =
pipe_resource_reference(&cbuf->surface_state_resource, NULL);
}
+ ice->state.dirty |= IRIS_DIRTY_CONSTANTS_VS << stage;
// XXX: maybe not necessary all the time...?
ice->state.dirty |= IRIS_DIRTY_BINDINGS_VS << stage;
}
iris_use_optional_res(batch, ice->state.last_res.color_calc, false);
}
- if (clean & IRIS_DIRTY_SCISSOR) {
+ if (clean & IRIS_DIRTY_SCISSOR_RECT) {
iris_use_optional_res(batch, ice->state.last_res.scissor, false);
}
/* XXX: L3 State */
+ // XXX: this is only flagged at setup, we assume a static configuration
if (dirty & IRIS_DIRTY_URB) {
iris_upload_urb_config(ice, batch);
}
iris_emit_merge(batch, cso->wmds, stencil_refs, ARRAY_SIZE(cso->wmds));
}
- if (dirty & IRIS_DIRTY_SCISSOR) {
+ if (dirty & IRIS_DIRTY_SCISSOR_RECT) {
// XXX: allocate at set_scissor time?
uint32_t scissor_offset = ice->state.num_scissors == 0 ? 0 :
emit_state(batch, ice->state.dynamic_uploader,