MIPS: Cleaned up includes to break loops, and got rid of isa_traits.cc
authorGabe Black <gblack@eecs.umich.edu>
Wed, 1 Aug 2007 20:55:47 +0000 (13:55 -0700)
committerGabe Black <gblack@eecs.umich.edu>
Wed, 1 Aug 2007 20:55:47 +0000 (13:55 -0700)
Loops of header files including each other was causing compilation to fail. To fix it, a bunch of unnecessary includes were removed, and the code in isa_traits.cc which brought a bunch of include chains together was broken up and put in proximity to the header files that delcared it.

--HG--
extra : convert_revision : 66ef7762024b72bb91147a5589a0779e279521e0

src/arch/mips/SConscript
src/arch/mips/isa/includes.isa
src/arch/mips/isa_traits.cc [deleted file]
src/arch/mips/mt_constants.hh
src/arch/mips/regfile/misc_regfile.cc
src/arch/mips/regfile/misc_regfile.hh
src/arch/mips/regfile/regfile.hh
src/arch/mips/utility.hh

index de209348a6b9494cd5919e4e681e093cacc31f76..6587103896e546e2536699fe6b98254e163c3998 100644 (file)
@@ -34,8 +34,9 @@ Import('*')
 
 if env['TARGET_ISA'] == 'mips':
     Source('faults.cc')
-    Source('isa_traits.cc')
+    Source('regfile/int_regfile.cc')
     Source('regfile/misc_regfile.cc')
+    Source('regfile/regfile.cc')
     Source('utility.cc')
     Source('dsp.cc')
 
index 0e0cf44eb570da6fe600bd02a3e7cc8e28a716fa..0ce807a243a60fa26e37b3188e20e1784428e180 100644 (file)
@@ -72,6 +72,7 @@ output exec {{
 #include "arch/mips/dsp.hh"
 #include "arch/mips/pra_constants.hh"
 #include "arch/mips/dt_constants.hh"
+#include "arch/mips/mt.hh"
 #include "arch/mips/mt_constants.hh"
 
 #include <math.h>
diff --git a/src/arch/mips/isa_traits.cc b/src/arch/mips/isa_traits.cc
deleted file mode 100644 (file)
index 0c84ce2..0000000
+++ /dev/null
@@ -1,100 +0,0 @@
-/*
- * Copyright (c) 2003-2005 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Gabe Black
- *          Korey Sewell
- */
-
-#include "arch/mips/isa_traits.hh"
-#include "arch/mips/regfile/regfile.hh"
-#include "sim/serialize.hh"
-#include "base/bitfield.hh"
-
-using namespace MipsISA;
-using namespace std;
-
-void
-MipsISA::copyRegs(ThreadContext *src, ThreadContext *dest)
-{
-    panic("Copy Regs Not Implemented Yet\n");
-}
-
-void
-MipsISA::copyMiscRegs(ThreadContext *src, ThreadContext *dest)
-{
-    panic("Copy Misc. Regs Not Implemented Yet\n");
-}
-
-void
-MipsISA::MiscRegFile::copyMiscRegs(ThreadContext *tc)
-{
-    panic("Copy Misc. Regs Not Implemented Yet\n");
-}
-
-void
-IntRegFile::serialize(std::ostream &os)
-{
-    SERIALIZE_ARRAY(regs, NumIntRegs);
-}
-
-void
-IntRegFile::unserialize(Checkpoint *cp, const std::string &section)
-{
-    UNSERIALIZE_ARRAY(regs, NumIntRegs);
-}
-
-void
-RegFile::serialize(std::ostream &os)
-{
-    intRegFile.serialize(os);
-    //SERIALIZE_ARRAY(floatRegFile, NumFloatRegs);
-    //SERIALZE_ARRAY(miscRegFile);
-    //SERIALIZE_SCALAR(miscRegs.fpcr);
-    //SERIALIZE_SCALAR(miscRegs.lock_flag);
-    //SERIALIZE_SCALAR(miscRegs.lock_addr);
-    SERIALIZE_SCALAR(pc);
-    SERIALIZE_SCALAR(npc);
-    SERIALIZE_SCALAR(nnpc);
-}
-
-
-void
-RegFile::unserialize(Checkpoint *cp, const std::string &section)
-{
-    intRegFile.unserialize(cp, section);
-    //UNSERIALIZE_ARRAY(floatRegFile);
-    //UNSERIALZE_ARRAY(miscRegFile);
-    //UNSERIALIZE_SCALAR(miscRegs.fpcr);
-    //UNSERIALIZE_SCALAR(miscRegs.lock_flag);
-    //UNSERIALIZE_SCALAR(miscRegs.lock_addr);
-    UNSERIALIZE_SCALAR(pc);
-    UNSERIALIZE_SCALAR(npc);
-    UNSERIALIZE_SCALAR(nnpc);
-
-}
-
-
index 0f69784330c8ef046b8b626b9af07154e8f2cec2..57306d23716b2aa5d6ca42afb3d6af0b60cb7f29 100755 (executable)
@@ -31,7 +31,6 @@
 #ifndef __ARCH_MIPS_MT_CONSTANTS_HH__
 #define __ARCH_MIPS_MT_CONSTANTS_HH__
 
-#include "arch/mips/types.hh"
 //#include "config/full_system.hh"
 
 namespace MipsISA
index c97d93cf92ca69f8b7719b6d067443109d99787c..8f8899e92b0543927a441576206c3ee05a446a87 100755 (executable)
 
 #include "base/bitfield.hh"
 
-#include "arch/mips/regfile/misc_regfile.hh"
-#include "arch/mips/mt_constants.hh"
 #include "arch/mips/faults.hh"
+#include "arch/mips/mt.hh"
+#include "arch/mips/mt_constants.hh"
+#include "arch/mips/regfile/misc_regfile.hh"
 
-#include "cpu/thread_context.hh"
 #include "cpu/base.hh"
-#include "cpu/exetrace.hh"
+#include "cpu/thread_context.hh"
 //#include "cpu/mixie/cpu.hh"
 
 using namespace std;
index 54b086a8b2d4123646127f6e39b690cf1fb976a6..0846378bb414ee75d8ad15d213756961baf88b01 100644 (file)
 
 #include "arch/mips/isa_traits.hh"
 #include "arch/mips/types.hh"
-#include "arch/mips/mt.hh"
-#include "arch/mips/mt_constants.hh"
-#include "base/bitfield.hh"
-#include "cpu/base.hh"
+#include "sim/eventq.hh"
 #include "sim/faults.hh"
 #include <queue>
 
 class ThreadContext;
+class BaseCPU;
 
 namespace MipsISA
 {
@@ -76,7 +74,10 @@ namespace MipsISA
 
         void expandForMultithreading(unsigned num_threads, unsigned num_vpes);
 
-        void copyMiscRegs(ThreadContext *tc);
+        void copyMiscRegs(ThreadContext *tc)
+        {
+            panic("Copy Misc. Regs Not Implemented Yet\n");
+        }
 
         inline unsigned getVPENum(unsigned tid);
 
index f13653132ce52e0b2476242de16cc791d6a8a7f8..b83bb576ba67566bcdc71db1197a43910fec6c44 100644 (file)
@@ -32,8 +32,6 @@
 #define __ARCH_MIPS_REGFILE_REGFILE_HH__
 
 #include "arch/mips/types.hh"
-#include "arch/mips/isa_traits.hh"
-#include "arch/mips/mt.hh"
 #include "arch/mips/regfile/int_regfile.hh"
 #include "arch/mips/regfile/float_regfile.hh"
 #include "arch/mips/regfile/misc_regfile.hh"
@@ -189,9 +187,11 @@ namespace MipsISA
         return reg;
     }
 
-    void copyRegs(ThreadContext *src, ThreadContext *dest);
+    void
+    copyRegs(ThreadContext *src, ThreadContext *dest);
 
-    void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
+    void
+    copyMiscRegs(ThreadContext *src, ThreadContext *dest);
 
 } // namespace MipsISA
 
index e3fd9daa84cfda49366d63f3292b4433621b0dea..8b35c2f3b1d765e87130a0aca7abe481e9278dd2 100644 (file)
@@ -70,8 +70,6 @@ namespace MipsISA {
 
     void startupCPU(ThreadContext *tc, int cpuId);
 
-    void copyRegs(ThreadContext *src, ThreadContext *dest);
-
     // Instruction address compression hooks
     static inline Addr realPCToFetchPC(const Addr &addr) {
         return addr;