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Add Verific support for OPER_REDUCE_NAND
author
Claire Wolf
<clifford@clifford.at>
Thu, 30 Jan 2020 17:01:13 +0000
(18:01 +0100)
committer
Claire Wolf
<clifford@clifford.at>
Thu, 30 Jan 2020 17:01:13 +0000
(18:01 +0100)
Signed-off-by: Claire Wolf <clifford@clifford.at>
frontends/verific/verific.cc
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diff --git
a/frontends/verific/verific.cc
b/frontends/verific/verific.cc
index 9274cf5ca5f8586878491c3d82f8632c80dc32e1..8a99f19b97c6bcf618d946823bd550ebab6aee06 100644
(file)
--- a/
frontends/verific/verific.cc
+++ b/
frontends/verific/verific.cc
@@
-539,6
+539,14
@@
bool VerificImporter::import_netlist_instance_cells(Instance *inst, RTLIL::IdStr
return true;
}
+ if (inst->Type() == OPER_REDUCE_NAND) {
+ Wire *tmp = module->addWire(NEW_ID);
+ cell = module->addReduceAnd(inst_name, IN, tmp, SIGNED);
+ module->addNot(NEW_ID, tmp, net_map_at(inst->GetOutput()));
+ import_attributes(cell->attributes, inst);
+ return true;
+ }
+
if (inst->Type() == OPER_REDUCE_OR) {
cell = module->addReduceOr(inst_name, IN, net_map_at(inst->GetOutput()), SIGNED);
import_attributes(cell->attributes, inst);