i965: Share the KIL_NV implementation between glsl and non-glsl.

diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h
index 2639d4f26b392e93a69f75988fa89f2293a4dbfa..c28acad24b54b630040d50b4ac84fb3df32ce6f8 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_wm.h
+++ b/src/mesa/drivers/dri/i965/brw_wm.h
@@ -373,6 +373,7 @@ void emit_fb_write(struct brw_wm_compile *c,
 void emit_frontfacing(struct brw_compile *p,
                      const struct brw_reg *dst,
                      GLuint mask);
+void emit_kil_nv(struct brw_wm_compile *c);
 void emit_linterp(struct brw_compile *p,
                  const struct brw_reg *dst,
                  GLuint mask,

diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c
index f3ad01b3fec3b06b08f798b44c12c62835fdef6d..a4754ca8cf6f0522eb9638b18907c07ebfd14e72 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_wm_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c
@@ -1223,7 +1223,7 @@ static void emit_kil( struct brw_wm_compile *c,
 /* KIL_NV kills the pixels that are currently executing, not based on a test
  * of the arguments.
  */
-static void emit_kil_nv( struct brw_wm_compile *c )
+void emit_kil_nv( struct brw_wm_compile *c )
 {
    struct brw_compile *p = &c->func;
    struct brw_reg r0uw = retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UW);

diff --git a/src/mesa/drivers/dri/i965/brw_wm_glsl.c b/src/mesa/drivers/dri/i965/brw_wm_glsl.c
index 7d6724dc1c1feb9be93824882585fed256491b1e..7c05e452ddd1d1a70239f7ca7bc2d664f0646270 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_wm_glsl.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_glsl.c
@@ -614,21 +614,6 @@ static void emit_arl(struct brw_wm_compile *c,
     brw_set_saturate(p, 0);
 }
 
-/**
- * For GLSL shaders, this KIL will be unconditional.
- * It may be contained inside an IF/ENDIF structure of course.
- */
-static void emit_kil(struct brw_wm_compile *c)
-{
-    struct brw_compile *p = &c->func;
-    struct brw_reg depth = retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UW);
-    brw_push_insn_state(p);
-    brw_set_mask_control(p, BRW_MASK_DISABLE);
-    brw_NOT(p, c->emit_mask_reg, brw_mask_reg(1)); /* IMASK */
-    brw_AND(p, depth, c->emit_mask_reg, depth);
-    brw_pop_insn_state(p);
-}
-
 static INLINE struct brw_reg high_words( struct brw_reg reg )
 {
     return stride( suboffset( retype( reg, BRW_REGISTER_TYPE_W ), 1 ),
@@ -898,7 +883,7 @@ static void brw_wm_emit_glsl(struct brw_context *brw, struct brw_wm_compile *c)
                         c->fp->program.Base.SamplerUnits[inst->TexSrcUnit]);
                break;
            case OPCODE_KIL_NV:
-               emit_kil(c);
+               emit_kil_nv(c);
                break;
            case OPCODE_IF:
                assert(if_depth < MAX_IF_DEPTH);