i965/vec4: Drop writemasks on scratch reads.

This code is complete nonsense and has apparently existed since I first
implemented register spilling in the VS two years ago.

Scratch reads are SEND messages, which ignore the destination writemask.

The comment about "data that may not have been written to scratch" is
also confusing - we always spill whole 4x2 registers, so such data
simply does not exist.  We can safely ignore the writemask.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
index 828a70e27527ceceb59656521e19dcdb80dc2ffb..e8e2185ac1a29a50702943dde5d1118a5d57f3c2 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
@@ -335,14 +335,6 @@ vec4_visitor::spill_reg(int spill_reg_nr)
             inst->src[i].reg = virtual_grf_alloc(1);
             dst_reg temp = dst_reg(inst->src[i]);
 
-            /* Only read the necessary channels, to avoid overwriting the rest
-             * with data that may not have been written to scratch.
-             */
-            temp.writemask = 0;
-            for (int c = 0; c < 4; c++)
-               temp.writemask |= (1 << BRW_GET_SWZ(inst->src[i].swizzle, c));
-            assert(temp.writemask != 0);
-
             emit_scratch_read(block, inst, temp, spill_reg, spill_offset);
          }
       }