+2012-07-04 H.J. Lu <hongjiu.lu@intel.com>
+
+ * amd64-tdep.c (amd64_x32_init_abi): Set sp_regnum_from_eax to
+ AMD64_RSP_REGNUM and pc_regnum_from_eax to AMD64_RIP_REGNUM.
+
+ * i386-tdep.c (i386_gdbarch_init): Initialize sp_regnum_from_eax
+ and pc_regnum_from_eax to -1. Update SP regnum from
+ sp_regnum_from_eax and PC regnum from pc_regnum_from_eax if
+ needed.
+
+ * i386-tdep.h (gdbarch_tdep): Add sp_regnum_from_eax and
+ pc_regnum_from_eax.
+
2012-07-03 Jan Kratochvil <jan.kratochvil@redhat.com>
Fix 'warning: parameter has incomplete type' with gcc-3.4.6.
tdesc = tdesc_x32;
tdep->tdesc = tdesc;
+ tdep->sp_regnum_from_eax = AMD64_RSP_REGNUM;
+ tdep->pc_regnum_from_eax = AMD64_RIP_REGNUM;
+
tdep->num_dword_regs = 17;
set_tdesc_pseudo_register_type (gdbarch, amd64_x32_pseudo_register_type);
tdep->num_mmx_regs = 8;
tdep->num_ymm_regs = 0;
+ tdep->sp_regnum_from_eax = -1;
+ tdep->pc_regnum_from_eax = -1;
+
tdesc_data = tdesc_data_alloc ();
set_gdbarch_relocate_instruction (gdbarch, i386_relocate_instruction);
/* Support dword pseudo-register if it hasn't been disabled. */
tdep->eax_regnum = ymm0_regnum;
ymm0_regnum += tdep->num_dword_regs;
+ if (tdep->sp_regnum_from_eax != -1)
+ set_gdbarch_sp_regnum (gdbarch,
+ (tdep->eax_regnum
+ + tdep->sp_regnum_from_eax));
+ if (tdep->pc_regnum_from_eax != -1)
+ set_gdbarch_pc_regnum (gdbarch,
+ (tdep->eax_regnum
+ + tdep->pc_regnum_from_eax));
}
else
tdep->eax_regnum = -1;
of pseudo dword register support. */
int eax_regnum;
+ /* Register number for SP, relative to %eax. Set this to -1 to
+ indicate the absence of pseudo SP register support. */
+ int sp_regnum_from_eax;
+
+ /* Register number for PC, relative to %eax. Set this to -1 to
+ indicate the absence of pseudo PC register support. */
+ int pc_regnum_from_eax;
+
/* Number of core registers. */
int num_core_regs;