radeonsi: Separate states for samplers and sampler views.
authorMichel Dänzer <michel.daenzer@amd.com>
Mon, 14 May 2012 13:32:02 +0000 (15:32 +0200)
committerMichel Dänzer <michel@daenzer.net>
Mon, 14 May 2012 15:56:02 +0000 (17:56 +0200)
And reset nregs on updates. Prevents eventual assertion failure.

src/gallium/drivers/radeonsi/evergreen_state.c
src/gallium/drivers/radeonsi/radeonsi_pipe.h

index 0fdcdec8670790995acb25c9e91e2ab35d821c77..264618b069333e83921365d578af47e92fdcf445 100644 (file)
@@ -1274,7 +1274,7 @@ static void evergreen_set_ps_sampler_view(struct pipe_context *ctx, unsigned cou
 {
        struct r600_context *rctx = (struct r600_context *)ctx;
        struct si_pipe_sampler_view **resource = (struct si_pipe_sampler_view **)views;
-       struct r600_pipe_state *rstate = &rctx->ps_samplers.rstate;
+       struct r600_pipe_state *rstate = &rctx->ps_samplers.views_state;
        struct r600_resource *bo;
        int i;
        int has_depth = 0;
@@ -1312,6 +1312,7 @@ static void evergreen_set_ps_sampler_view(struct pipe_context *ctx, unsigned cou
                        pipe_sampler_view_reference((struct pipe_sampler_view **)&rctx->ps_samplers.views[i], NULL);
        }
 
+       rstate->nregs = 0;
        va = r600_resource_va(ctx->screen, (void *)bo);
        r600_pipe_state_add_reg(rstate, R_00B040_SPI_SHADER_USER_DATA_PS_4, va, bo, RADEON_USAGE_READ);
        r600_pipe_state_add_reg(rstate, R_00B044_SPI_SHADER_USER_DATA_PS_5, va >> 32, NULL, 0);
@@ -1326,7 +1327,7 @@ static void evergreen_bind_ps_sampler(struct pipe_context *ctx, unsigned count,
 {
        struct r600_context *rctx = (struct r600_context *)ctx;
        struct si_pipe_sampler_state **rstates = (struct si_pipe_sampler_state **)states;
-       struct r600_pipe_state *rstate = &rctx->ps_samplers.rstate;
+       struct r600_pipe_state *rstate = &rctx->ps_samplers.samplers_state;
        struct r600_resource *bo;
        uint64_t va;
        char *ptr;
@@ -1348,6 +1349,7 @@ static void evergreen_bind_ps_sampler(struct pipe_context *ctx, unsigned count,
 
        rctx->ws->buffer_unmap(bo->cs_buf);
 
+       rstate->nregs = 0;
        va = r600_resource_va(ctx->screen, (void *)bo);
        r600_pipe_state_add_reg(rstate, R_00B038_SPI_SHADER_USER_DATA_PS_2, va, bo, RADEON_USAGE_READ);
        r600_pipe_state_add_reg(rstate, R_00B03C_SPI_SHADER_USER_DATA_PS_3, va >> 32, NULL, 0);
index bcb5ec64d5cc6d1646bd855cd3c04817b6899cd1..366dd0c51fd18483c6b4eeb9aec82d711865040e 100644 (file)
@@ -203,7 +203,8 @@ struct si_pipe_shader {
 #define NUM_TEX_UNITS 16
 
 struct r600_textures_info {
-       struct r600_pipe_state          rstate;
+       struct r600_pipe_state          views_state;
+       struct r600_pipe_state          samplers_state;
        struct si_pipe_sampler_view     *views[NUM_TEX_UNITS];
        struct si_pipe_sampler_state    *samplers[NUM_TEX_UNITS];
        unsigned                        n_views;