{
struct r600_context *rctx = (struct r600_context *)ctx;
struct si_pipe_sampler_view **resource = (struct si_pipe_sampler_view **)views;
- struct r600_pipe_state *rstate = &rctx->ps_samplers.rstate;
+ struct r600_pipe_state *rstate = &rctx->ps_samplers.views_state;
struct r600_resource *bo;
int i;
int has_depth = 0;
pipe_sampler_view_reference((struct pipe_sampler_view **)&rctx->ps_samplers.views[i], NULL);
}
+ rstate->nregs = 0;
va = r600_resource_va(ctx->screen, (void *)bo);
r600_pipe_state_add_reg(rstate, R_00B040_SPI_SHADER_USER_DATA_PS_4, va, bo, RADEON_USAGE_READ);
r600_pipe_state_add_reg(rstate, R_00B044_SPI_SHADER_USER_DATA_PS_5, va >> 32, NULL, 0);
{
struct r600_context *rctx = (struct r600_context *)ctx;
struct si_pipe_sampler_state **rstates = (struct si_pipe_sampler_state **)states;
- struct r600_pipe_state *rstate = &rctx->ps_samplers.rstate;
+ struct r600_pipe_state *rstate = &rctx->ps_samplers.samplers_state;
struct r600_resource *bo;
uint64_t va;
char *ptr;
rctx->ws->buffer_unmap(bo->cs_buf);
+ rstate->nregs = 0;
va = r600_resource_va(ctx->screen, (void *)bo);
r600_pipe_state_add_reg(rstate, R_00B038_SPI_SHADER_USER_DATA_PS_2, va, bo, RADEON_USAGE_READ);
r600_pipe_state_add_reg(rstate, R_00B03C_SPI_SHADER_USER_DATA_PS_3, va >> 32, NULL, 0);
#define NUM_TEX_UNITS 16
struct r600_textures_info {
- struct r600_pipe_state rstate;
+ struct r600_pipe_state views_state;
+ struct r600_pipe_state samplers_state;
struct si_pipe_sampler_view *views[NUM_TEX_UNITS];
struct si_pipe_sampler_state *samplers[NUM_TEX_UNITS];
unsigned n_views;