Re: testsuite: Enable and adjust powerpc fold-vec-extract/insert testcases
authorAlan Modra <amodra@gmail.com>
Tue, 27 Oct 2020 23:37:44 +0000 (10:07 +1030)
committerAlan Modra <amodra@gmail.com>
Wed, 28 Oct 2020 22:43:15 +0000 (09:13 +1030)
git commit badeac77f552 changed expected number of addi instructions,
causing these fails on powerpc-linux.

gcc.target/powerpc/fold-vec-insert-int-p9.c: \\maddi\\M found 12 times
FAIL: gcc.target/powerpc/fold-vec-insert-int-p9.c scan-assembler-times \\maddi\\M 8
gcc.target/powerpc/fold-vec-extract-char.p9.c: addi found 6 times
FAIL: gcc.target/powerpc/fold-vec-extract-char.p9.c scan-assembler-times addi 3
gcc.target/powerpc/fold-vec-extract-int.p9.c: \\maddi\\M found 6 times
FAIL: gcc.target/powerpc/fold-vec-extract-int.p9.c scan-assembler-times \\maddi\\M 3
gcc.target/powerpc/fold-vec-extract-longlong.p7.c: \\maddi\\M found 6 times
FAIL: gcc.target/powerpc/fold-vec-extract-longlong.p7.c scan-assembler-times \\maddi\\M 4
gcc.target/powerpc/fold-vec-extract-longlong.p8.c: \\maddi\\M found 6 times
FAIL: gcc.target/powerpc/fold-vec-extract-longlong.p8.c scan-assembler-times \\maddi\\M 4
changed by badeac77f552

I'm not at all sure why we are counting addi.  On linux I see
eight in fold-vec-insert-int-p9.c tearing down the stack frame in
function epilogues, and four in
        addi 9,1,16
        lvewx 0,0,9
For aix you have the above four but with a -16 offset.  There are no
stack frames, and you have four addressing stack red-zone as
        addi 9,1,-64

fold-vec-extract-char.p9.c on linux just has epilogue addi, aix has
red-zone addressing.  The same for fold-vec-extract-int.p9.c,
fold-vec-extract-longlong.p7.c and fold-vec-extract-longlong.p8.c.

It seems silly to count addi in a function epilogue, and fragile to
count them in code.  So remove the ilp32 addi checks.

* gcc.target/powerpc/fold-vec-extract-char.p9.c: Don't check addi
count for ilp32.
* gcc.target/powerpc/fold-vec-extract-int.p9.c: Likewise.
* gcc.target/powerpc/fold-vec-extract-longlong.p7.c: Likewise.
* gcc.target/powerpc/fold-vec-extract-longlong.p8.c: Likewise.
* gcc.target/powerpc/fold-vec-insert-int-p9.c: Likewise.

gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p9.c
gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p9.c
gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p7.c
gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p8.c
gcc/testsuite/gcc.target/powerpc/fold-vec-insert-int-p9.c

index ff03c9a722b9479cb8edb3c265f48b841f88851b..8a4c380edad51bfeb33c992257a6e35cd12eecd6 100644 (file)
@@ -12,7 +12,6 @@
 
 /* { dg-final { scan-assembler-times "stxv" 6 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times "lbz" 6 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "addi" 3 { target ilp32 } } } */
 
 
 #include <altivec.h>
index 868b673cdaf7ef05d5c800d2c97837851f66b56a..1abf19da40d454d05184bfb6e6c743e3a8767832 100644 (file)
@@ -18,7 +18,6 @@
 /* { dg-final { scan-assembler-times {\madd\M} 3 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times {\mstxv\M} 6 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times {\mlwz\M} 6 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times {\maddi\M} 3 { target ilp32 } } } */
 
 
 #include <altivec.h>
index 033d21c9a436a2c23d3c5f9dce23169d62ab9373..b97fcb40eda0db937360e42bbb2fd163308bc832 100644 (file)
@@ -22,7 +22,6 @@
 /* -m32 target with constant test uses (+2)li where the -m64 has an ld */
 /* { dg-final { scan-assembler-times {\mli\M} 5 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times {\maddi\M} 6 { target lp64 } } } */
-/* { dg-final { scan-assembler-times {\maddi\M} 4 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstvx\M} 3 } } */
 /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 3 } } */
 /* { dg-final { scan-assembler-times {\mldx\M} 3 { target lp64 } } } */
index 0b624d262e1fffaec3230a4fbd44d481ff31752a..8ddce3fd2d858f411e7cf251aea008226d0945aa 100644 (file)
@@ -17,7 +17,6 @@
 /* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstxvw4x\M} 4 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times {\madd\M} 3 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times {\mlwz\M} 11 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times {\maddi\M} 4 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times {\mmfvsrd\M} 6 { target lp64 } } } */
 /* { dg-final { scan-assembler-times {\mmtvsrd\M} 3 { target lp64 } } } */
 /* { dg-final { scan-assembler-times {\mxxpermdi\M} 3 { target le } } } */
index 81ac1f1a00a344af5a5b8a703ef19a5d1a6b5e58..a851fd6b8dc0d89c141c0e110299f0cc0c75813f 100644 (file)
@@ -58,8 +58,6 @@ testui2_cst(unsigned int x, vector unsigned int v)
 /* { dg-final { scan-assembler-times {\mmtvsrwz\M} 4 { target lp64 } } } */
 /* { dg-final { scan-assembler-times {\mxxinsertw\M} 4 { target lp64 } } } */
 
-
-/* { dg-final { scan-assembler-times {\maddi\M} 8 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times {\mstw\M} 8 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times {\mlxv\M} 8 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times {\mlvewx\M} 4 { target ilp32 } } } */