ARM: Make ldrs into the PC and ldm exception return do interworking branches.

diff --git a/src/arch/arm/isa/insts/ldr.isa b/src/arch/arm/isa/insts/ldr.isa
index 86cb763837dc85ed304f977475e440ab137ef475..b058ba73c01da3d9cf99876de52a6d1b68ebe250 100644 (file)
--- a/src/arch/arm/isa/insts/ldr.isa
+++ b/src/arch/arm/isa/insts/ldr.isa
@@ -90,7 +90,7 @@ let {{
             eaCode += offset
         eaCode += ";"
 
-        accCode = "Dest = Mem%s;\n" % buildMemSuffix(sign, size)
+        accCode = "IWDest = Mem%s;\n" % buildMemSuffix(sign, size)
         if writeback:
             accCode += "Base = Base %s;\n" % offset
         base = buildMemBase("MemoryImm", post, writeback)
@@ -115,7 +115,7 @@ let {{
             eaCode += offset
         eaCode += ";"
 
-        accCode = "Dest = Mem%s;\n" % buildMemSuffix(sign, size)
+        accCode = "IWDest = Mem%s;\n" % buildMemSuffix(sign, size)
         if writeback:
             accCode += "Base = Base %s;\n" % offset
         base = buildMemBase("MemoryReg", post, writeback)

diff --git a/src/arch/arm/isa/insts/macromem.isa b/src/arch/arm/isa/insts/macromem.isa
index 3a080625f3fdfbf9dc0d65a954c50660f3142cfb..474e4fab0504bb0315356a74e5efb75698415399 100644 (file)
--- a/src/arch/arm/isa/insts/macromem.isa
+++ b/src/arch/arm/isa/insts/macromem.isa
@@ -66,11 +66,11 @@ let {{
                                      ['IsMicroop'])
 
     microLdrRetUopCode = '''
-        Ra = Mem;
         uint32_t newCpsr =
             cpsrWriteByInstr(Cpsr | CondCodes, Spsr, 0xF, true);
         Cpsr = ~CondCodesMask & newCpsr;
         CondCodes = CondCodesMask & newCpsr;
+        IWNPC = Mem | ((Spsr & 0x20) ? 1 : 0);
     '''
     microLdrRetUopIop = InstObjParams('ldr_ret_uop', 'MicroLdrRetUop',
                                       'MicroMemOp',