re PR target/57623 (BEXTR intrinsic has memory operands switched around (fails to...

	PR target/57623
	* config/i386/i386.md (bmi2_bzhi_<mode>3): Swap AND arguments
	to match RTL canonicalization.  Swap predicates and
	constraints of operand 1 and 2.

	* gcc.target/i386/bmi2-bzhi-1.c: New test.

From-SVN: r200477

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index bd319c03e5b870062a28d9ce783c4f757cb6b073..74cf1b4056538fba4cb0114a091eddae3f2aaf28 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2013-06-27  Jakub Jelinek  <jakub@redhat.com>
+
+       PR target/57623
+       * config/i386/i386.md (bmi2_bzhi_<mode>3): Swap AND arguments
+       to match RTL canonicalization.  Swap predicates and
+       constraints of operand 1 and 2.
+
 2013-06-27  Vladimir Makarov  <vmakarov@redhat.com>
 
        * lra-constraints.c (inherit_in_ebb): Process static hard regs

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index e97a4570501cd3d833612f319f0deff8441c837a..e0e1a63fa5f85f2f80856a468248ac26bddaeb5d 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -11733,9 +11733,9 @@
 ;; BMI2 instructions.
 (define_insn "bmi2_bzhi_<mode>3"
   [(set (match_operand:SWI48 0 "register_operand" "=r")
-       (and:SWI48 (match_operand:SWI48 1 "register_operand" "r")
-                  (lshiftrt:SWI48 (const_int -1)
-                                  (match_operand:SWI48 2 "nonimmediate_operand" "rm"))))
+       (and:SWI48 (lshiftrt:SWI48 (const_int -1)
+                                  (match_operand:SWI48 2 "register_operand" "r"))
+                  (match_operand:SWI48 1 "nonimmediate_operand" "rm")))
    (clobber (reg:CC FLAGS_REG))]
   "TARGET_BMI2"
   "bzhi\t{%2, %1, %0|%0, %1, %2}"

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 73cf781d1fe0f3df6ca5ac6a238bfa1b99e0a45c..43f6caf630c7f8ce5f623c83f85db2df76f860ca 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2013-06-27  Jakub Jelinek  <jakub@redhat.com>
+
+       PR target/57623
+       * gcc.target/i386/bmi2-bzhi-1.c: New test.
+
 2013-06-27  Marc Glisse  <marc.glisse@inria.fr>
 
        PR c++/57172

diff --git a/gcc/testsuite/gcc.target/i386/bmi2-bzhi-1.c b/gcc/testsuite/gcc.target/i386/bmi2-bzhi-1.c
new file mode 100644 (file)
index 0000000..42e002d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/bmi2-bzhi-1.c
@@ -0,0 +1,31 @@
+/* PR target/57623 */
+/* { dg-do assemble { target bmi2 } } */
+/* { dg-options "-O2 -mbmi2" } */
+
+#include <x86intrin.h>
+
+unsigned int
+f1 (unsigned int x, unsigned int *y)
+{
+  return _bzhi_u32 (x, *y);
+}
+
+unsigned int
+f2 (unsigned int *x, unsigned int y)
+{
+  return _bzhi_u32 (*x, y);
+}
+
+#ifdef  __x86_64__
+unsigned long long
+f3 (unsigned long long x, unsigned long long *y)
+{
+  return _bzhi_u64 (x, *y);
+}
+
+unsigned long long
+f4 (unsigned long long *x, unsigned long long y)
+{
+  return _bzhi_u64 (*x, y);
+}
+#endif