[libre-riscv-dev] [Bug 276] SR NAND Latch needed in nmigen

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+Date: Fri, 03 Apr 2020 12:05:29 +0000
+X-Bugzilla-Reason: CC
+X-Bugzilla-Type: changed
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+X-Bugzilla-Product: Libre-SOC's first SoC
+X-Bugzilla-Component: Source Code
+X-Bugzilla-Version: unspecified
+X-Bugzilla-Keywords: 
+X-Bugzilla-Severity: enhancement
+X-Bugzilla-Who: lkcl@lkcl.net
+X-Bugzilla-Status: CONFIRMED
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+X-Bugzilla-Priority: ---
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+Message-ID: <bug-276-13-XCCSJWf0Zl@http.bugs.libre-riscv.org/>
+In-Reply-To: <bug-276-13@http.bugs.libre-riscv.org/>
+References: <bug-276-13@http.bugs.libre-riscv.org/>
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+Subject: [libre-riscv-dev] [Bug 276] SR NAND Latch needed in nmigen
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