+2011-08-05 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.md (*push<mode>2): Use "o" constraint instead
+ of "m" for operand 0. Add type and mode attribute.
+ (*pushxf_nointeger"): Use "<" constraint for operand 0.
+ (*pushdf_rex64): New pattern, split out of *pushdf. Use "m"
+ constraint instead of "o" for opreand 1.
+ (*pushdf): Disable for TARGET_64BIT. Correct mode attribute.
+
+2011-08-05 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/predicates.md (lea_address_operand): Rename from
+ no_seg_address_operand.
+ * config/i386/i386.md (*lea_1): Update operand 1 predicate for rename.
+ (*lea_1_zext): Ditto.
+ (*lea_2): Ditto.
+ (*lea_2_zext): Ditto.
+
+2011-08-05 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.c (ix86_print_operand_address): Handle SUBREGs of
+ parts.base and parts.index.
+ * config/i386/predicates.md (aligned_operand): Ditto.
+ (cmpxchg8b_pic_memory_operand): Ditto.
+
2011-08-05 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
* config/soft-fp: Move to ../libgcc.
(i[34567]86-*-linux*, x86_64-*-linux*, i[34567]86-*-kfreebsd*-gnu)
(x86_64-*-kfreebsd*-gnu, i[34567]86-*-gnu*): Likewise.
(i[34567]86-*-solaris2*, x86_64-*-solaris2.1[0-9]*): Likewise.
- (i[34567]86-*-cygwin*, i[34567]86-*-mingw*, x86_64-*-mingw*):
- Likewise.
+ (i[34567]86-*-cygwin*, i[34567]86-*-mingw*, x86_64-*-mingw*): Likewise.
(i[34567]86-*-freebsd*, x86_64-*-freebsd*): Likewise.
2011-08-05 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
* Makefile.in (FPBIT_FUNCS, DPBIT_FUNCS, TPBIT_FUNCS): Remove.
- (libgcc-support): Remove $(FPBIT), $(DPBIT), $(TPBIT)
- dependencies.
+ (libgcc-support): Remove $(FPBIT), $(DPBIT), $(TPBIT) dependencies.
(libgcc.mvars): Remove FPBIT, FPBIT_FUNCS, DPBIT, DPBIT_FUNCS,
TPBIT, TPBIT_FUNCS.
* config/fp-bit.c, config/fp-bit.h: Move to ../libgcc.
LIBUNWIND, SHLIBUNWIND_LINK, SHLIBUNWIND_INSTALL.
(stmp-int-hdrs): Remove $(UNWIND_H) dependency.
Don't copy $(UNWIND_H).
- * config.gcc (ia64*-*-linux*): Remove with_system_libunwind
- handling.
+ * config.gcc (ia64*-*-linux*): Remove with_system_libunwind handling.
* configure.ac (GCC_CHECK_UNWIND_GETIPINFO): Remove.
* aclocal.m4: Regenerate.
* configure: Regenerate.
gcc_assert (ok);
+ if (parts.base && GET_CODE (parts.base) == SUBREG)
+ {
+ rtx tmp = SUBREG_REG (parts.base);
+ parts.base = simplify_subreg (GET_MODE (parts.base),
+ tmp, GET_MODE (tmp), 0);
+ }
+
+ if (parts.index && GET_CODE (parts.index) == SUBREG)
+ {
+ rtx tmp = SUBREG_REG (parts.index);
+ parts.index = simplify_subreg (GET_MODE (parts.index),
+ tmp, GET_MODE (tmp), 0);
+ }
+
base = parts.base;
index = parts.index;
disp = parts.disp;
(define_insn "*push<mode>2"
[(set (match_operand:DWI 0 "push_operand" "=<")
- (match_operand:DWI 1 "general_no_elim_operand" "riF*m"))]
+ (match_operand:DWI 1 "general_no_elim_operand" "riF*o"))]
""
- "#")
+ "#"
+ [(set_attr "type" "multi")
+ (set_attr "mode" "<MODE>")])
(define_split
[(set (match_operand:TI 0 "push_operand" "")
;; only once, but this ought to be handled elsewhere).
(define_insn "*pushxf_nointeger"
- [(set (match_operand:XF 0 "push_operand" "=X,X")
+ [(set (match_operand:XF 0 "push_operand" "=<,<")
(match_operand:XF 1 "general_no_elim_operand" "f,*rFo"))]
"optimize_function_for_size_p (cfun)"
{
(set (mem:XF (reg:P SP_REG)) (match_dup 1))]
"operands[2] = GEN_INT (-GET_MODE_SIZE (XFmode));")
+(define_insn "*pushdf_rex64"
+ [(set (match_operand:DF 0 "push_operand" "=<,<,<")
+ (match_operand:DF 1 "general_no_elim_operand" "f,Yd*rFm,Y2"))]
+ "TARGET_64BIT"
+{
+ /* This insn should be already split before reg-stack. */
+ gcc_unreachable ();
+}
+ [(set_attr "type" "multi")
+ (set_attr "unit" "i387,*,*")
+ (set_attr "mode" "DF,DI,DF")])
+
;; Size of pushdf is 3 (for sub) + 2 (for fstp) + memory operand size.
;; Size of pushdf using integer instructions is 2+2*memory operand size
;; On the average, pushdf using integers can be still shorter.
(define_insn "*pushdf"
[(set (match_operand:DF 0 "push_operand" "=<,<,<")
(match_operand:DF 1 "general_no_elim_operand" "f,Yd*rFo,Y2"))]
- ""
+ "!TARGET_64BIT"
{
/* This insn should be already split before reg-stack. */
gcc_unreachable ();
}
[(set_attr "type" "multi")
(set_attr "unit" "i387,*,*")
- (set_attr "mode" "DF,SI,DF")])
+ (set_attr "mode" "DF,DI,DF")])
;; %%% Kill this when call knows how to work this out.
(define_split
(define_insn "*lea_1"
[(set (match_operand:SWI48 0 "register_operand" "=r")
- (match_operand:SWI48 1 "no_seg_address_operand" "p"))]
+ (match_operand:SWI48 1 "lea_address_operand" "p"))]
""
"lea{<imodesuffix>}\t{%a1, %0|%0, %a1}"
[(set_attr "type" "lea")
(define_insn "*lea_1_zext"
[(set (match_operand:DI 0 "register_operand" "=r")
(zero_extend:DI
- (match_operand:SI 1 "no_seg_address_operand" "p")))]
+ (match_operand:SI 1 "lea_address_operand" "p")))]
"TARGET_64BIT"
"lea{l}\t{%a1, %k0|%k0, %a1}"
[(set_attr "type" "lea")
(define_insn "*lea_2"
[(set (match_operand:SI 0 "register_operand" "=r")
- (subreg:SI (match_operand:DI 1 "no_seg_address_operand" "p") 0))]
+ (subreg:SI (match_operand:DI 1 "lea_address_operand" "p") 0))]
"TARGET_64BIT"
"lea{l}\t{%a1, %0|%0, %a1}"
[(set_attr "type" "lea")
(define_insn "*lea_2_zext"
[(set (match_operand:DI 0 "register_operand" "=r")
(zero_extend:DI
- (subreg:SI (match_operand:DI 1 "no_seg_address_operand" "p") 0)))]
+ (subreg:SI (match_operand:DI 1 "lea_address_operand" "p") 0)))]
"TARGET_64BIT"
"lea{l}\t{%a1, %k0|%k0, %a1}"
[(set_attr "type" "lea")
(ior (match_operand 0 "register_operand")
(match_operand 0 "const0_operand")))
-;; Return true if op if a valid address, and does not contain
+;; Return true if op if a valid address for LEA, and does not contain
;; a segment override.
-(define_predicate "no_seg_address_operand"
+(define_predicate "lea_address_operand"
(match_operand 0 "address_operand")
{
struct ix86_address parts;
ok = ix86_decompose_address (op, &parts);
gcc_assert (ok);
+ if (parts.base && GET_CODE (parts.base) == SUBREG)
+ parts.base = SUBREG_REG (parts.base);
+ if (parts.index && GET_CODE (parts.index) == SUBREG)
+ parts.index = SUBREG_REG (parts.index);
+
/* Look for some component that isn't known to be aligned. */
if (parts.index)
{
ok = ix86_decompose_address (XEXP (op, 0), &parts);
gcc_assert (ok);
+
+ if (parts.base && GET_CODE (parts.base) == SUBREG)
+ parts.base = SUBREG_REG (parts.base);
+ if (parts.index && GET_CODE (parts.index) == SUBREG)
+ parts.index = SUBREG_REG (parts.index);
+
if (parts.base == NULL_RTX
|| parts.base == arg_pointer_rtx
|| parts.base == frame_pointer_rtx
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