Revert an incorrect change

From-SVN: r42262

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index cf694258dc770d95b6120674ff027b6cc7b87810..a2ee872c903a25d898a65e5319dbcc3d3c4b0034 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2001-05-18  Bernd Schmidt  <bernds@redhat.com>
+
+       Revert
+       2001-02-09  Nick Clifton  <nickc@redhat.com>
+       * config/arm/arm.md: Change output constraint on post inc
+       load/store multiple patterns to be a read/write constraint.
+
 2001-05-18  Mark Mitchell  <mark@codesourcery.com>
 
        * function.c (expand_function_start): Avoid creating BLKmode

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index f69e0fee17015a3bae13a6f21ab7b5fcb107be4a..17c40b0b9dda13c03848929a20fbb1b26e7866ff 100644 (file)
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -5239,7 +5239,7 @@
 
 (define_insn "*ldmsi_postinc4"
   [(match_parallel 0 "load_multiple_operation"
-    [(set (match_operand:SI 1 "s_register_operand" "+r")
+    [(set (match_operand:SI 1 "s_register_operand" "=r")
          (plus:SI (match_operand:SI 2 "s_register_operand" "1")
                   (const_int 16)))
      (set (match_operand:SI 3 "arm_hard_register_operand" "")
@@ -5258,7 +5258,7 @@
 
 (define_insn "*ldmsi_postinc3"
   [(match_parallel 0 "load_multiple_operation"
-    [(set (match_operand:SI 1 "s_register_operand" "+r")
+    [(set (match_operand:SI 1 "s_register_operand" "=r")
          (plus:SI (match_operand:SI 2 "s_register_operand" "1")
                   (const_int 12)))
      (set (match_operand:SI 3 "arm_hard_register_operand" "")
@@ -5275,7 +5275,7 @@
 
 (define_insn "*ldmsi_postinc2"
   [(match_parallel 0 "load_multiple_operation"
-    [(set (match_operand:SI 1 "s_register_operand" "+r")
+    [(set (match_operand:SI 1 "s_register_operand" "=r")
          (plus:SI (match_operand:SI 2 "s_register_operand" "1")
                   (const_int 8)))
      (set (match_operand:SI 3 "arm_hard_register_operand" "")
@@ -5361,7 +5361,7 @@
 
 (define_insn "*stmsi_postinc4"
   [(match_parallel 0 "store_multiple_operation"
-    [(set (match_operand:SI 1 "s_register_operand" "+r")
+    [(set (match_operand:SI 1 "s_register_operand" "=r")
          (plus:SI (match_operand:SI 2 "s_register_operand" "1")
                   (const_int 16)))
      (set (mem:SI (match_dup 2))
@@ -5380,7 +5380,7 @@
 
 (define_insn "*stmsi_postinc3"
   [(match_parallel 0 "store_multiple_operation"
-    [(set (match_operand:SI 1 "s_register_operand" "+r")
+    [(set (match_operand:SI 1 "s_register_operand" "=r")
          (plus:SI (match_operand:SI 2 "s_register_operand" "1")
                   (const_int 12)))
      (set (mem:SI (match_dup 2))
@@ -5397,7 +5397,7 @@
 
 (define_insn "*stmsi_postinc2"
   [(match_parallel 0 "store_multiple_operation"
-    [(set (match_operand:SI 1 "s_register_operand" "+r")
+    [(set (match_operand:SI 1 "s_register_operand" "=r")
          (plus:SI (match_operand:SI 2 "s_register_operand" "1")
                   (const_int 8)))
      (set (mem:SI (match_dup 2))